Rohm BH1730FVC-TR Specification sheet

BH1730FVC
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Ambient Light Sensor ICs
Digital 16bit Serial Output Type
Ambient Light Sensor IC
BH1730FVC
●Descriptions
BH1730FVC is a digital Ambient Light Sensor IC for I2C bus interface. This IC is the most suitable to obtain the ambient light
data for adjusting LCD backlight power of TV, mobile phone. It is possible to detect very wide range light intensity. (0.008 -
65535 lx ).
●Features
1) I2C bus Interface ( f / s Mode Support, Slave address "0101001". )
2) There are two outputs that peaks of a spectrum response are in visible light (Type0) and in infrared light (Type1).
3) Illuminance to Digital Converter
4) Very wide range and High resolution. ( 0.008 - 65535 lx )
5) Low Current by power down function
6) 50Hz / 60Hz light noise reject-function
7) Correspond to 1.8V logic input interface
8) Light source dependency is little by calculating with Type0 and Type1.
( ex. Incandescent Lamp. Fluorescent Lamp. Halogen Lamp. White LED. Sun Light )
9) Interrupt function is available.
10) Adjustable measurement result for influence of optical window
( It is possible to detect min. 0.001 lx, max. 100000 lx by using this function. )
11) Small measurement variation (+/- 15%)
12) Built in power on reset circuit.
●Applications
LCD TV, Mobile phone, NOTE PC, Portable game machine, Digital camera, Digital video camera, PDA, LCD display
●Absolute Maximum Ratings
Parameter Symbol Limits Units
Supply Voltage VCCmax 4.5 V
INT , SDA, DVI, SCL, Terminal Voltage VINTmax, VSDAmax, VDVImax, VSCLmax 7 V
Operating Temperature Topr -40~70 ℃
Storage Temperature Tstg -40~100 ℃
SDA, INT Sink Current Imax 7 mA
Power Dissipation Pd 260※mW
※70mm ×70mm ×1.6mm glass epoxy board. Derating in done at 3.47mW/℃for operating above Ta=25℃.
●Operating Conditions
Parameter Symbol Min. Typ. Max. Units
VCC Voltage Vcc 2.4 3.0 3.6 V
I2C Reference Voltage VDVI 1.65 - VCC V
No.11046EAT13

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●Electrical Characteristics ( VCC = 3.0V, VDVI = 3.0V, Ta = 25℃, unless otherwise noted )
Parameter Symbol Limits Units Conditions
Min. Typ. Max.
Supply Current Icc1 -150 200 uA
Ev = 100 lx ※
1
CONTROL register(00h) = ”03h”
and the other registers are default.
Powerdown Current Icc2 -0.85 1.5 uA
No input Light
All registers are default.
Peak Wave Length in Type0 λp0 -600 -nm Visible light response
Peak Wave Length in Type1 λp1 -840 -nm Infrared light response
ADC count value in Type0 D1k_0 1020 1200 1380 count
EV = 1000 lx ※
1
TIMING register(01h) = “DAh”
GAIN register(07h) = “00h”
ADC count value in Type1 D1k_1 153 180 207 count
EV = 1000 lx ※
1
TIMING register(01h) = “DAh”
GAIN register(07h) = “00h”
Dark ( 0 lx ) Sensor out in Type0 S0_0 0 0 2 count
No input Light
TIMING register(01h) = “DAh”
GAIN register(07h) = “00h”
Dark ( 0 lx ) Sensor out in Type1 S0_1 0 0 2 count
No input Light
TIMING register(01h) = “DAh”
GAIN register(07h) = “00h”
Gain X1 resolution in Type0 rG1 -0.83 -lx/count TIMING register(01h) = “DAh” ※1
Gain X2 resolution in Type0 rG2 -0.42 -lx/count TIMING register(01h) = “DAh” ※1
Gain X64 resolution in Type0 rG64 -0.014 -lx/count TIMING register(01h) = “DAh” ※1
Gain X128 resolution in Type0 rG128 -0.007 -lx/count TIMING register(01h) = “DAh” ※1
Measurement Time tmt1 -100 150 ms TIMING register(01h) = “DAh”
Incandescent / Fluorescent ratio
by calculating with Type0 and
Type1
rIF -1 -times EV = 1000 lx
INT Output ‘L’ Voltage VINT 0 -0.4 V IINT = 3 mA
DVI Input ‘L’ Voltage VDVL --0.4 V
SCL, SDA Input ‘H’ Voltage 1 VIH1 0.7*DVI --V DVI ≧1.8V
SCL, SDA Input ‘H’ Voltage 2 VIH2 1.26 --V 1.65V ≦DVI <1.8V
SCL, SDA Input ‘L’ Voltage 1 VIL1 --0.3*DVI V DVI ≧1.8V
SCL, SDA Input ‘L’ Voltage 2 VIL2 --DVI–1.26 V 1.65V ≦DVI <1.8V
SCL, SDA, INT Input ‘H’ Current IIH --10 µA
SCL, SDA, INT Input ‘L’ Current IIL --10 µA
I2C SCL Clock Frequency fSCL --400 kHz
I2C Bus Free Time tBUF 1.3 --µs
I
2
C Hold Time ( repeated ) START
Condition tHDSTA 0.6 --µs
I
2
C Set up time for a Repeated
START Condition tSUSTA 0.6 --µs
I
2
C Set up time for STOP
Condition tSUSTO 0.6 --µs
I2C Data Hold Time tHDDAT 0 -0.9 µs
I2C Data Setup Time tSUDAT 100 --ns
I2C ‘L’ Period of the SCL Clock tLOW 1.3 --µs
I2C ‘H’ Period of the SCL Clock tHIGH 0.6 --µs
I2C SDA Output ‘L’ Voltage VOL 0 -0.4 V IOL = 3 mA
※1 White LED is used as optical source.

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●Reference Data
0
0. 2
0. 4
0. 6
0. 8
1
1. 2
400 500 600 700 800 900 1000 1100
Waveleng th [ nm ]
Ratio
0
0.2
0.4
0.6
0.8
1
1.2
-90 -60 -30 0 30 60 90
Ang l e [ deg ]
Ratio
0
0.2
0.4
0.6
0.8
1
1.2
-90 -60 -30 0 30 60 90
Ang l e [ deg ]
Ratio
Fig.5 Directional Characteristics 1 Fig.6 Directional Characteristics 2
Fig.4 Dark Response of Type0
0
2
4
6
8
10
-40-20 0 20406080
Ta [ ℃]
Measurement Result
0
50
100
150
200
250
300
2 2.5 3 3.5 4
VCC [ V ]
ICC @ Measuremen
-
+
-
+
-
+
-
+
1pin
1pin
Fig.7 ADC count value in Type0
Temperature Dependency
Fig.3 Illuminance -Measurement
Result of Type0, Gain 1X, ITIME=DAh
Fig.9 VCC - ICC
( During measurement )
Fig.1 Spectral Response of Type0
(visible light peak)
0
0.2
0.4
0.6
0.8
1
1.2
2 2.5 3 3.5 4
VCC [ V ]
Ratio
Fig.11 Measurement Result
VCC Dependency
DVI=1.8V
0
0.2
0.4
0.6
0.8
1
1.2
1. 5 2 2. 5 3 3. 5
DVI [ V ]
Ratio
Fig.12 Measurement Result
DVI Dependency
VCC=3V
0.1
1
10
-40-200 20406080
Ta [ ℃]
ICC @ POWER DOWN [ uA
0
0.2
0.4
0.6
0.8
1
1.2
-40-20020406080
Ta [ ℃]
Ratio
Fig.2 Spectral Response of Type1
(infrared light peak)
0
0. 2
0. 4
0. 6
0. 8
1
1. 2
400 500 600 700 800 900 1000 1100
Wavelength [ nm ]
Ratio
1
10
100
1000
10000
100000
1 10 100 1000 10000 100000
Illuminance [ lx ]
Measurement Resu
l
Fig.10 Power down ICC@0Lx
Temperature Dependency
Fig.8 Light Source Dependency in
calculation from Type0 and Type1.
( Fluorescent Light is set to '1' )
00.511.52
Fluorescent
Lig ht
Incandescent
Lig ht
Halogen
Li g ht
Kr ipton Li g ht
White LED
Ratio

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●Block Diagram
●Block Diagram Descriptions
・PD
Photo diodes (PD) with peaks in visible light and in infrared light.
・AMP
Integration OPAMP for converting from PD current to voltage.
・ADC
AD converter for obtainment digital 16bit data.
・ADC Logic + I2C Interface + INT Interface
Ambient light calculation logic and I2C Bus Interface and Interrupt function Interface.
・OSC
Internal oscillator ( typ. 360kHz ). It is clock for internal logic.
・POR
Power on reset. All register is reset after VCC is supplied. Please refer P14 (Caution of power on reset function).
SCL
SDA
GND INT
PD for visible light
VCC DVI
ADC
AMP
OSC POR
ADC Logic
+
I2C Interface
+
INT Interface
PD for infrared light
AMP ADC

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●I2C Bus Access and Write / Read format
1 ) I2C Bus interface timing chart
Write measurement command and Read measurement result are done by I2C Bus interface. Please refer the formally
specification of I2C Bus interface, and follow the formally timing chart.
2) Main write Format
1. Case of “Write to Command Register”
ST Slave Address
0101001
W
0 ACK Data to Command Register
1XXXXXXX ACK SP
2. Case of “Write to Data Register”
ST Slave Address
0101001
W
0 ACK Data specified at register address field
0XXXXXXX ACK
Data specified at register address
field +1 ACK ・・・ ACK Data specified at register address
field +N ACK SP
※The register address that set in Command register is used.
3. Case of "write to data register after write to Command Register"
ST Slave Address
0101001
W
0 ACK Data to Command Register
1XXXXXXX ACK
Data specified at register address
field ACK ・・・ ACK Data specified at register address
field +N ACK SP
3) Main read Format
ST Slave Address
0101001
R
1 ACK Data specified at register address field ACK
Data specified at register
address field +1 ACK ・・・ ACK Data specified at register
address field +N NACK SP
※The register address that set in Command register is used.
※ BH1730FVC operates as I2C bus slave device.
※
Please refer formality I2C bus specification of NXP semiconductor
BH1730FVC continues to write or read data with address increments until master issues stop condition.
Read cycle is 00h - 01h - 02h - 03h - 04h - 05h - 06h – 07h – 12h – 14h – 15h – 16h – 17h - 00h ………
from master to slave from slave to master
tHD ; DAT
S
SDA
SCL
tHD ; STA
tLOW
tftr
t
Sr
tSU ; STA
tSU ; DAT tf
tHD
tSU;STO
tBUF
P
tr
S
tHIGH
tHD ; STA

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●Measurement Procedure
●Explanation of Asynchronous reset and Software reset command.
1) Asynchronous reset
All registers are reset and BH1730FVC becomes power down during DVI = 'L'. Initial reset is not necessary, because
power on reset function is included in this product.
2) Software reset command
All registers are reset and BH1730FVC becomes power down by Software reset command.
State Transition by I2C write-command.
Automatically State Transition
Power supply
Initial state is Power Down mode after
VCC and DVI supply.
Measurement
Power Down
ONE_TIME bit = H?
INT_STOP bit = H and
INT is active?
Yes
Yes
No
No
POWER bit = H and
ADC_EN bit =H

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●Command set
Address Type Register name Register function
-- W COMMAND Specifies register address or set special command
00h RW CONTROL Operation mode control
01h RW TIMING Light integration time control
02h RW INTERRUPT Interrupt function control
03h RW THLLOW Low byte of low interrupt threshold setting
04h RW THLHIGH High byte of low interrupt threshold setting
05h RW THHLOW Low byte of high interrupt threshold setting
06h RW THHHIGH High byte of high interrupt threshold setting
07h RW GAIN Gain control
12h R ID Part number and Revision ID
14h R DATA0LOW ADC Type0 low byte data register
15h R DATA0HIGH ADC Type0 high byte data register
16h R DATA1LOW ADC Type1 low byte data register
17h R DATA1HIGH ADC Type1 high byte data register
○COMMAND
7 6 5 4 3 2 1 0
CMD TRANSACTION ADDRESS / Special command
default value 00h
Field Bit Type Description
CMD 7
W Write 1
TRANSACTION 6 : 5 W
00 : COMMAND<4:0> is ADDRESS field.
01 : Reserved.
10 : Reserved.
11 : COMMAND<4:0> is Special command field.
ADDRESS
4 : 0 W
Specify register address.
Don’t specify invalid register address.
Special command
00001 : Interrupt output reset.
00010 : Stop manual integration mode.
00011 : Start manual integration mode.
00100 : Software reset
Don’t input other commands.

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○CONTROL (00h)
7 6 5 4 3 2 1 0
RES ADC_
INTR
ADC_
VALID
ONE_
TIME
DATA_
SEL
ADC_
EN POWER
default value 00h
Field Bit Type Description
RES 7: 6 RW Write 00
ADC_INTR 5 R
0 : Interrupt is inactive.
1 : Interrupt is active.
ADC_VALID 4 R
0 : ADC data is not updated after last reading.
1 : ADC data is updated after last reading.
ONE_TIME 3 RW
0 : ADC measurement is continuous.
1 : ADC measurement is one time.
ADC changes to power down automatically.
DATA_SEL 2 RW
0 : ADC measurement Type0 and Type1.
1 : ADC measurement Type0 only.
ADC_EN 1 RW
0 : ADC measurement is not started.
1 : ADC measurement is started.
POWER 0 RW
0 : ADC power down.
1 : ADC power on.
○TIMING (01h)
7 6 5 4 3 2 1 0
ITIME
default value DAh
Field Bit Type Description
ITIME 7 : 0 RW
ADC Light Integration time control.
00000000 : Use manual integration mode.
11111111 : 1 cycle. 2.7ms.
11111110 : 2 cycle. 5.4ms.
11101101 : 19 cycle. 51.3ms.
11011010 : 38 cycle. 102.6ms.
10110110 : 74 cycle. 199.8ms.
01101100 : 148 cycle. 399.6ms.
00000001 : 255 cycle. 688.5ms.
Cycle is defined 256-ITIME<7:0>.
Integration time is typically cycle*2.7ms.
ADC needs additional 2ms for internal calculation.

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○INTERRUPT (02h)
7 6 5 4 3 2 1 0
RES INT_
STOP RES INT_
EN PERSIST
default value 00h
Field Bit Type Description
RES 7 RW Write 0.
INT_STOP 6 RW
0 : ADC measurement is continuous.
1 : ADC measurement is stopped and ADC becomes
power down state when interrupt becomes active.
RES 5 RW Write 0.
INT_EN 4 RW 0 : Interrupt function is invalid.
1 : Interrupt function is valid.
PERSIST 3 : 0 RW
Interrupt persistence function.
0000 : Interrupt becomes active at each measurement end.
0001 : Interrupt status is updated at each measurement end.
0010 : Interrupt status is updated if two consecutive threshold
judgments are the same.
When set 0011 or more, interrupt status is updated if threshold
judgments are the same over consecutive set times.
○TH_LOW (03h,04h)
7 6 5 4 3 2 1 0
Lower threshold data
default value 00h
Register Address Bit
Type Description
TH lower LSBs 03h 7 : 0 RW Lower byte
TH lower MSBs 04h 7 : 0 RW Upper byte
○TH_UP (05h,06h)
7 6 5 4 3 2 1 0
Upper threshold data
default value FFh
Register Address Bit
Type Description
TH upper LSBs 05h 7 : 0 RW Lower byte
TH upper MSBs 06h 7 : 0 RW Upper byte
○GAIN (07h)
7 6 5 4 3 2 1 0
RES GAIN
default value 00h
Field Bit Type Description
RES 7 : 3 RW Write 00000.
GAIN 2 : 0 RW
Change ADC resolution.
X00 : X1 gain mode
X01 : X2 gain mode
X10 : X64 gain mode
X11 : X128 gain mode

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○PART_ID ( 12h )
7 6 5 4 3 2 1 0
Part Number Revision ID
default value 7Xh
Field Bit Type Description
Part number 7 : 4 R 0111
Revision ID 3 : 0 R XXXX
○DATA0 (14h,15h)
7 6 5 4 3 2 1 0
ADC Type0 data
default value 00h
Register Address Bit
Type Description
DATA0 LSBs 14h 7 : 0 R Lower byte
DATA0 MSBs 15h 7 : 0 R Upper byte
○DATA1 (16h,17h)
7 6 5 4 3 2 1 0
ADC Type1 data
default value 00h
Register Address Bit
Type Description
DATA1 LSBs 16h 7 : 0 R Lower byte
DATA1 MSBs 17h 7 : 0 R Upper byte

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●Measurement sequence example from "Write to start measurement" to "Read measurement result"
①Send "Continuous measurement mode" instruction
ST Slave Address
0101001
W
0 ACK Write Command Register
1000_0000 ACK
Write CONTROL register
0000_0011 ACK SP
②Wait to complete 1st measurement. TIMING=DAh (typ. 100ms, max.150ms) and GAIN=00h (X1 Gain) at default.
③Read measurement result.
ST Slave Address
0101001
W
0 ACK Write Command Register
1001_0100 ACK SP
ST Slave Address
0101001
R
1 ACK Read DATA0 LSBs register ACK
Read DATA0 MSBs register ACK Read DATA1 LSBs register ACK
Read DATA1 MSBs register NACK SP
●Application circuit example
If you don't use INT Pin, please connect to GND or open.
from Master to Slave from Slave to Master
0.1µF
0.1µF
VCC
INT
SCL
SDA
DVI
GND
BH1730FVC
100kohm 2.2kΩ2.2kΩ
Micro
Controller
I2C bus pull up resister
I2C bus voltage source
INT pin pull up resister

Technical Note
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●Lux calculation from DATA0 and DATA1
BH1730FVC has two outputs, DATA0 (14h, 15h) for detecting visible light and infrared light, and DATA1 (16h, 17h) for
detecting infrared light. Lux value can be calculated by using these two outputs. The calculation formula depends on the
characteristic of optical window. The example of the calculation is shown as follows.
Ex) No optical window or optical window that has flat transmittance from visible light to infrared light.
if (DATA1/DATA0<0.26) Lx = ( 1.290*DATA0 - 2.733*DATA1 ) / Gain * 100ms / ITIME
else if (DATA1/DATA0<0.55) Lx = ( 0.795*DATA0 - 0.859*DATA1 ) / Gain * 100ms / ITIME
else if (DATA1/DATA0<1.09) Lx = ( 0.510*DATA0 - 0.345*DATA1 ) / Gain * 100ms / ITIME
else if (DATA1/DATA0<2.13) Lx = ( 0.276*DATA0 - 0.130*DATA1 ) / Gain * 100ms / ITIME
else Lx=0

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Interrupt threshold H level
time
persistence = 1
Master writes “Interrupt output reset” command.
sequential measurement results
persistence = 2
Interrupt threshold L level
DATA0
INT Terminal H
L
H
L
●Interrupt function
Interrupt function compares measurement result to preset interrupt threshold level. BH1730FVC uses two threshold level
(upper and lower ). If measurement result is outside of two threshold, INT pin outputs ’L’. Interrupt threshold is defined at
Interrupt threshold registers ( 03h - 06h ).
Interrupt function is able to control by Interrupt opecode. Interrupt persistence is defined at Interrupt opecode lower 4 bits.
INT pin is Nch open drain terminal so this terminal should be pull-up to some kind of voltage source by an external resister.
Maximum sink current rating of this terminal is 7mA.
INT terminal is high impedance when VCC is supplied.
INT terminal becomes inactive by setting “Interrupt output reset” special command. VCC current (approximately 30uA at
VCC=3.0V ) is consumed during INT terminal is ‘L’. So it is recommended to reset INT terminal at once when interrupt is
detected.

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●Caution of power on reset function
BH1730FVC has power on reset ( POR ) function. POR is to reset all register and flip flop when VCC Power supplies.
There is some cautions about power on and down sequence seeing in below.
① Power on time : t1
More than 2ms is need to active BH1730FVC after VCC supplies more than 2.0V from VCC is less than 0.4V.
② Power off time : t2
More than 1ms (VCC < 0.4V) is need to active BH1730FVC.
*”active state” is that BH1730FVC works and accept I2C bus access correctly.
0.4V
VCC
2.0V
active
Don’t care
t1
BH1730FVC
Don’t care
t2
active
t1

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●ALS sensitivity adjustment function
BH1730FVC is possible to change ALS sensitivity. And it is possible to cancel the optical window influence (difference with /
without optical window ) by using this function. Adjustment is done by changing measurement time. For example, when
transmission rate of optical window is 50% (measurement result becomes 0.5 times if optical window is set), influence of
optical window is ignored by changing sensor sensitivity from default to 2 times.
Sensitivity can be adjusted by ITIME (01h<7:0>). The measurement time is proportional to “256- ITIME”. For example,
sensitivity is twice when “256- ITIME” is twice, and the measurement time is twice, too.
The range of adjusting TIMING is below.
Min. Typ. Max.
Sensitivity Default*0.026 Default Default*6.711
range of TIMING (binary) 1111_1111 1101_1010 0000_0001
range of TIMING (decimal) 255 218 1
Measurement time 2.7ms 102.6ms 688.5ms
It is possible to detect 0.001 lx by using this function at GAIN = x128.
The below formula is to calculate illuminant per 1 count.
Illuminant per 1 count in Type0 at GAIN = x1( lx / count ) = 1 / 1.2 * (256 - 218) / (256 – X)
218 : Default value of ITIME (decimal)
X : ITIME value (decimal)
Illuminant per 1 count in Type0 at GAIN = x128( lx / count ) = 1 / 1.2 * (256 - 218) / (256 – X) / 128
218 : Default value of ITIME (decimal)
X : ITIME value (decimal)
128 : Gain value
Illuminant per 1 count in Type0 at GAIN = x1 is as following within adjustable range of ITIME.
ITIME value Illuminant per 1count(lx / count)
1111_1111 31.67
1101_1010 0.833
0000_0001 0.124
Illuminant per 1 count in Type0 at GAIN = x128 is as following within adjustable range of ITIME.
ITIME value Illuminant per 1count(lx / count)
1111_1111 0.247
1101_1010 0.007
0000_0001 0.001
Please take care that about 100,000lx or more cannot be measured even if decreasing the sensitivity.

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●Terminal Description
PIN No. Terminal Name Equivalent Circuit Function
1 VCC Power supply terminal
2 INT
INT Pin output terminal.
If you don't use INT Pin, please connect to
GND or open.
3 GND
GND terminal
4 SDA
I2C bus Interface SDA terminal
5 DVI
SDA, SCL reference voltage terminal and
asynchronous reset terminal for internal
registers. Initial reset is not necessary,
because power on reset function is included
in this product. DVI terminal is pulled down by
150kOhm while DVI is set 'L'
6 SCL
I2C bus Interface SCL terminal
※These values are design-value, not guaranteed.
150kOhm

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●Package Outlines
●About an optical design on the device
0.8 mm
1.3 mm
Sensitivity area( 0.25mm x 0.3mm)
Please desi
g
n the o
p
tical window so that
light can cover at least this area
.
Min.0.4 mm
Min.0.4 mm
Min.0.4 mm
Min.0.4 mm
Lot No.
Production
code
A
H
WSOF6 ( Unit : mm )

Technical Note
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●The method of distinguishing 1pin.
There is some method of distinguishing 1pin.
①Distinguishing by 1Pin marking
②Distinguishing by die pattern
③Distinguishing by taper part of 1-3pin side
②(by die pattern) is the easiest method to distinguish by naked eye.
Production code
①
②
A
H
③

Technical Note
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●Notes for use
1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage ( Vccmax ), temperature range of operating
conditions ( Topr ), etc., can break down devices, thus making impossible to identify breaking mode such as a short
circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration
should be given to take physical safety measures including the use of fuses, etc.
2) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
3) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting
can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or
between the terminal and the power supply or the GND terminal, the ICs can break down.
4) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
5) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the
jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In
addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention
to the transportation and the storage of the set PCB.
6) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of
the input terminal. Therefore, pay thorough attention not to handle the input terminals; such as to apply to the input
terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not
apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the
guaranteed value of electrical characteristics.
7) Thermal design
Perform thermal design in which there are adequate margins by taking into account the power dissipation ( Pd ) in actual
states of use.
8) Treatment of package
Dusts or scratch on the photo detector may affect the optical characteristics. Please handle it with care.
9) Rush current
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may
flow instantaneously. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND
wiring, and routing of connections.
10) The exposed central pad on the back side of the package
There is an exposed central pad on the back side of the package. But please do it non connection. ( Don't solder, and
don't do electrical connection ) Please mount by Footprint dimensions described in the Jisso Information for WSOF6I.
This pad is GND level, therefore there is a possibility that LSI malfunctions and heavy-current is generated.

Technical Note
20/20
BH1730FVC
www.rohm.com 2012.02 - Rev.
A
© 2012 ROHM Co., Ltd. All rights reserved.
●Ordering part number
B H 1 7 3 0 F V C - T R
Part No. Part No.
Package
FVC: WSOF6
Packaging and forming specification
TR: Embossed tape and reel
Direction of feed
Reel
∗
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
(Unit : mm)
WSOF6
S
0.08
M
0.08 S
654
23
1
456
21
3
(MAX1.8 include BURR)
(MAX2.8 include BURR)
2.6±0.1
0.3
1.6±0.1
3.0±0.1
0.75MAX
0.5 0.22±0.05
(0.45)
(0.15)
0.145±0.05
(1.5)
(1.2)
1PIN MARK
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