Samsung S3F401F Instructions for use

Evaluation Board Manual
S3F401F
16/32-BIT RISC
MICROPROCESSOR
Dec, 2007
REV 1.00

Table of Contents
Chapter 1 Evaluation Board Manual
1. Overview ......................................................................................................................................................1
1.1 Features................................................................................................................................................3
1.2 System Requirements ..........................................................................................................................3
1.3 Board Components...............................................................................................................................4
2. Configuration................................................................................................................................................5
2.1 Detailed Block Configurations...............................................................................................................6
3. Total blocks’ Unit & Jumper Summury.........................................................................................................15
3.1 Function Blocks.....................................................................................................................................15
3.2 Jumper Connection...............................................................................................................................16
3.3 Switches................................................................................................................................................18
4. S3F401F-EVB REV 1.0 Board Schematics .................................................................................................19

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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1 EVALUATION BOARD MANUAL
1. OVERVIEW
S3F401F EVB (Evaluation Board) is a compact platform that is suitable for code development of SAMSUNG's
S3F401F 16-/32-bit RISC microcontroller for an inverter motor and general purpose application.
EVB is consists of several blocks, which can make operate the function of S3F401F. Those functions are from the
followings:
•A 16-/32-bit RISC CPU Core, ARM7TDMI-S
•A built-in 256Kbyte NOR-Flash memory
•An internal 20KB SRAM for stack, data, or code
•An interrupt controller, supporting vectored interrupt
•6xch 16-bit timers with capture and PWM function
•1xch 8-bit basic timer & 3-bit watch-dog timer
•Three programmable I/O port groups
•2xch Inverter motor controller
•2xch 16-bit Encoder counter
•15xch 12-bit ADC
•2xch UART
•2xch SSP
If you need more detail information about S3F401F, meet the samsung web site.
http://www.samsung.com/global/business/semiconductor/productList.do?fmly_id=223

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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BT & WDT
ENC0/1
Crystal or
Ceramic
Oscillator
AHB
ARM7TDMI-S
CORE
SRAM
20KB
FLASH-ROM
256KB
I/O
CONTROLLER
APB
12-BIT ADC
IMC0/1
CLOCK
MONITOR
INTERRUPT
CONTROLLER
ENC0/1IMC0/1
BRIDGE
TAP CONTROLLER
For JTAG
SSP0/1
SSP0/1
UART0/1
UART0/1
Timer0/1/2/3/4/5
Timer0/1/2/3/4/5
Timer0/1/2/3/4/5
Timer0/1/2/3/4/5
TIMER 0/1/2/3/4/5
PLL
Figure 1. S3F401F Block Diagram

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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1.1 FEATURES
Micro-Controller S3F401F, ARM7TDMIS, 16/32-bit RISC Microcontroller
External DC 7~12VBoard Power Source Adjustable voltage regulator out is 3.2V
Board Master Power Switch SW6
Support to protocol for RS-232
Physical interface circuit connected to standard PC through DB9(female)
UART
Interface driver IC MAX3221
Provide SSP, SPI serial communication with external devices (master or slave)
SSP serial EEPROM (8K * 8bit): X25650
Synchronous Serial Port
SSP serial EEPROM (4K * 16bit): 64LC40S
LED IO Port output control display
JTAG Connection 20Way JTAG connector (Multi-ICE Interface, Trace 32 etc.)
1.2 SYSTEM REQUIREMENTS
This section describes the hardware and software system requirements.
ARM Compiler SW
Software Requirements ARM Debugger SW
S3F401F EVB Board Set
Power Supply DC 7~12V ( Recommend Default 12V)
Debugger (Multi-ICE or Trace 32 etc.)
PC(Pentium, 32MB RAM for Windows 95, or 64MB RAM for Windows NT)
COM Port for serial communication
Hardware Requirements
Parallel Port (If using Multi-ICE)

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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1.3 BOARD COMPONENTS
The board consists of the followings.
S3F401F Micro-controller
64LC40S and X25650 as a serial EEPROM for SSP
2 x DSUB Connector for RS-232
2 x Header groups for IMC function
1 x Buzzer
6 x Switches: IRQ x 2, Power, Reset
4 x LED: Power x1, IO Port output x 3
A regulator to generate 3.3V
4MHz Crystal as a master system clock source
Switches for ADC input capacitor selection
7-segment (4-digit) display circuit
A standard 20-pin JTAG interface connector
Dual-line header pins for a port level or signal
53 x Jumpers for function setting control
15 x TP (Test Pole) to check specific pins relating to the digital, analog, PLL power and clock

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2. CONFIGURATION
S3F401FX
JTAG
POWER BLOCK
Page 1-6
IMC1 HEADER CONNECTOR
Page 1-11
MODE SETTING BLOCK
Page 1-7
UART BLOCK
Page 1-8
IMC0 HEADER CONNECTOR
Page 1-11
Main OSC
7-SEGMENT
Page 1-10
Buzzer
12-bit ADC BLOCK
Page 1 -12
SSP BLOCK
Page 1-9
Figure 2. S3F401F Evaluation Board Top-view

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1 DETAILED BLOCK CONFIGURATIONS
2.1.1 Power Block
5
1
4
2
3
① CN1, CN2, J23: Power Supply Connector
CN1 :VIN
CN2 :GND
J23 :DC adapter connector
② U7: Adjustable Voltage Regulator
3.3V generator JVDD33, VDDCORE, VDDIO
③ SW6: Power Switch
④ DS4: Power Display LED
VDD33 Power-on status display
⑤ J22: JumperSetting
Selection VDDCORE / VDDIO
1-2 connection: The VDD of each block is connected to VDD33.

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1.2 Mode Setting Block
J9 & J10 & J11: Jumper Setting
J9 J10 J11 MD[2:0]
2-3 Connection 2-3 Connection 2-3 Connection NORMAL
1-2 Connection 2-3 Connection 2-3 Connection SPGM
Others Only TEST Mode

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1.3 UART Block
1
2
3
④
① U10, U11: UART Driver IC
② P2, P3: UART Connector
③J25 Jumper Setting
TXD0 UARTTXD0 is connected to T1IN of MAX3221.
RXD0 UARTRXD0 is connected to R1OUT of MAX3221.
④J26 Jumper Setting
TXD1 UARTTXD1 is connected to T1IN of MAX3221
RXD1 UARTRXD1 is connected to R1OUT of MAX3221.

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1.4 SSP Block
1 2
①U9: SSP8 serial EEPROM (8K ×8bit)
FSS0 is connected to P1.16.
SW9 ON RXD0 is connected to P1.14.
CLK0 is connected to P1.15.
SW10 ON TXD0 is connected to P1.13.
② U8: SSP16 serial EEPROM (4K ×16bit)
FSS1 is connected to P1.20.
CLK1 is connected to P1.19.
RXD1 is connected to P1.18.
SW7 ON
TXD1 is connected to P1.17.
The RDY/nBUSY pin is connected to P2.11.
SW8 ON The RESET pin is connected to P2.10.

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1.5 7-SEGMENT BLOCK
1 2
3
The assignment of 7-segment control pins on the S3F401F-EVB is the same like this.
① SW1 ON: This Port (P0.0~P0.7) is connected to each segment of 7-segment.
② SW2 ON: This Port (P1.9~P1.12) is connected to latch.
③ U3: 7-segment display

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1.6 IMC BLOCK
1
2
The assignment of IMC pins on the S3F401F-EVB is the same like this.
① J20: A header pin group for MOTOR1
② J21: A header pin group for MOTOR2

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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2.1.7 ADC BLOCK
4
5
1
23
⑥
① J1: ADC input connector
② J2, J3, J4: J2, J3 and J4 are selected to sample test with AIN0, AIN1 and AIN2
③ RV1: Variable Resistor
④ J24: ADC Power Source
Close:When connecting (short), AVDD is same to VDD33.
Open:AVDD is a second (right) pin of J24. So, AVDD should be connected to another power.
⑤ J7: 2,3 connection - ADTRG signal is generated by SW4
⑥ SW11, SW12: Control cap for each ADC input port.

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3. TOTAL BLOCKS’ UNIT & JUMPER SUMMURY
3.1 FUNCTION BLOCKS
Block Symbols Description
7-SEGMENT U3 4Digit Segment
J20 MOTOR 1IMC J21 MOTOR 2
U14 RS-232 transceiverUART P41 RS-232 connector
U7 SPI8 interface EEPROM (8K ×8bit)
U8 SPI16 interface EEPROM (4K ×16bit)
SSP
J28 SPI block pin assignment
POWER U11 3.3V generator regulator
DS1 Red LED
DS2 Green LED
LED
DS3 Yellow LED
BUZZER BZ1 Buzzer

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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3.2 JUMPER CONNECTION
JP# Description Default Setting
J1 ADC block pin assignment AIN0~AIN14 −
J2 AIN0 input voltage connector
Connect (Short)
J3 AIN1 input voltage connector
Connect (Short)
J4 AIN2 input voltage connector
Connect (Short)
J5 SW3_INPUT VDDIO connects to INT7 Open
J6 Buzzer connector T3PWM connects to Buzzer Connect (Short)
J7 SW4_INPUT VDDIO connects to INT8 Connect ADTRG
J8 LED signal connector Port 0.0/0.1/0.2 connect to DS1, DS2, DS3 Connect (Short)

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
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3.2 JUMPER CONNECTION (Continued)
JP# Description Default Setting
J9 J9 J10 J11 MD[1:0]
J10 2-3 2-3 2-3 NORMAL
J11
MODE selection
1-2 2-3 2-3 SPGM
All 2-3 connect
:Normal Mode
J12 Port assignment pin Port 2 Open
J13 Port assignment pin Port 1 Open
J14 Port assignment pin Port 0 Open
J15 nTRST The JTAG connects to nTRST Open
J16
J17
J18
J19
Chip socket connection Chip socket board is connected with
S3F401F-EVB. Use the chip socket
board
J20 MOTOR1 IMC0 and ENC0 signal connector -
J21 MOTOR2 IMC1 and ENC1 signal connector -
J22 Generated VDD33 voltage from
U11_regulator (3.3V) 3.3V connects to VDD33 Join 1-2
J23 DC Power jack ( 9~18V) GND
VCC
-
J24 AVDD -Open
J25
J26 UART -Open

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3.3 SWITCHES
SW# Description
SW1 7-Segment ON: Port 0.0~0.7 connects to 7segment
SW2 Latch ON: Port 1.9~1.12 connects to latch
SW3 INT7 LOW signal is generated by SW3
SW4 INT8 HIGH signal is generated by SW4
SW5 RESET Reset signal is generated by SW6
SW6 Power_VIN Power on switch
SW7 SSP16 Port connects to EEPROM
SW8 SSP16 Port connects to EEPROM
SW9 SSP8 Port connects to EEPROM
SW10 SSP8 Port connects to EEPROM
SW11 AIN Port connects to ADC
SW12 AIN Port connects to ADC
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