Seagate ST225 User manual

·...
,I
~
J
f
ST225
-
OEM MANUAL II
PLEASE NOTE
SPECIFICATIONS OF THE ST213 HALF HEIGHT
10MB DRIVE CAN BE FOUND AT THE BACK OF
THIS MANUAL.
.I
, c'o._•. ~•.. H_W" ; _.",..'_, ', _, _ • '. ,_. _..:. ••• ;": •• ~':';::. ;••• ,', ••••~.:i-'...,--..•. ;~;l7''t~;~':'"t:.;".:.."••.•_:".'' ."!,;,,;~,,,-,~,,::;,;,,_~,,,",..;,c.~':-:':;,:~':'i:";...!'~::":~";.'~ ~_:••.~;_L·..;', '~"'~'':';';'-:''i-',!~~ ~.,;..::; ....~.:'~;~ '::",.. ,..:. ,~_.-
• t ••• 'y, 95066-4544,USA. 408/438-6550 -- ~II
I]
Seayate I]
~ --~~':':!.I~

"

Appendix 3: S1213
Specifications
PHYSICAL ORGANI7.ATION
TrKu: t.210
Cylinden: 815
Red/Write He••••: 2
DIK': 1
UNroltMAmD CAPACITY
Pet Driw:
~rCrlindor.
•••• Trocl.:
roRMAmD CA'ACT\'
Per Drtw:
P.rCylindet:
An Tnc:k:
IW SectOl':
SeetON per lrKk:
12.1' Mea_byt"
20.'32 Bytee
Xl.416 Byt ••
MJ.n Moa.by1"
11.4088)1"
•.••048)1"
512 8y1"
"f)
{
Ii
.•
ST225 OEM MANUAL
October 22, 1985©
36005-001, Rev. F
1per H)-bll. ,ud •
Iper lO'tbit.rv.d··
Jper to"seeb
fUNCnONALSP£CnCATIONS
Rot.honlll Speed: 3.600 RPM t ''''
Record!n. Scheme: MFM
Recordihl Den.U,: '.827 BPI
Flu Den.lty: '.827 Fa
TrackDen.II,: 588TPI
Interface: ST412
o.'a Tr.Mr., tt.,.: S.O Mes.bUslleC
ACaSS TIME lIad. -U •• ,
1rKk·lo·TrKk; 20mMIC
Aver'lIt8: aSmRC
Full Strub: UOmaec
Lalency: I.JJmsec; noml •••1
EnOR RATES
RKowf.bI. ReIHl Enon:
Non.rtICowr.W. RlrIHf Enon:
Seek Erron:
·1itK.~~wHhlll"ret""
uNo4I NCCftIftlbie ."hlll •• ,.., ••
REWlnsrY S'WnCATIONS
MTBf: 20.000 A7wer~ Houn
PM: Not Requhod
M1TR: 30Mlnul••
SeI'YlceU": S'lean
OP£RATIONAL ENVIRONMENT
AmbMtnI1empefllturo: ttrC 10 45"'C ISD-Flo 113-F,
Temperalure C,.ch.nt: 1O"'Cthr. (1S·''''r.1
Rel,liw HumidUy: • 1080'" nonconden.lnl
Maximum Wet Bulb: 28'1: 1'•.• ·'1nonconden.lnf;
DC!'OWU REQUIREMENTS
.IZVOC f: 5'" .1 AmIN 'yp.
2.2 Ampl mall .•• power·up
• ,VOC t,•••. 1 Amptlyp.
PowItr: 14.11
W.'IJIYp.
PHYSICAL SP£anCATIONS
U.lahl: 1.131nchet ma•. lfI..mm'
\Vkllh: S_lS = Inchet 1148.0S ~ mm'
Depth: 1.00 Inc:heemu:.1203.Zmmt
WelSh': US II.. IUS kal
040 mlJ OEAl/~",,
~
J
Seagate'" reserves the right to change, without
notice. the specifications contained in this manual.
t-
920 Disc Drive. Scotts Valley. Calirornia 9S066-4S44. USA
Telephone: (408) 4)8·6SS0 Telex: I764SSSEt\GATE SCVL

.,~
3:11I..,..,
>
!!.;O 0 ::Iaaa "C
n" "t'J g":':1 (I)
:; ~ ~ :=
o :-:-
"CI
C''''' Q.
n:;== ;C'
",,' ell .. ""
0-... ~
.. ';- tii°
~~g CJ)
-
N-Uil UII
Q)
S8~=
::::I
eN ••• Q.
-""\oOD ~~~§ W
...•
Q,
fJ)
"C
W
"'I
@
m
...
I'
00
""'.
fA
••

·,·.· ....'4..-.....~
~,o.~ .•..,:.•.••:.•.•.\...
Appendix 1:32 Sector, 256 Byte/Sector Format Example
~ ~fLOO
A:~I·I·I·I·I·I·I·I·I·H;tJ·~1·1·1·1+1·1·1·1·1·1·'jj~~
-1 •..'.•IftCIPCI••••
I\-.cIIIt IIfO ent_
-....
IdHNn N_1N<r fleW
N•• 1N<r eI.,ln s.rnt
I:'WTRODUcriON •.••••••••.••••••••••••••••••••••••.••••••.••••• 'On
i.OSi'ECiHCATiOS SUMMARY •••••••••••••••••••••••••••••••••.• 8
1.1 Perrormance Specificalions ........•.•.••••..••.•.•...•...•••....• i
1.1.1 Access Time Ddinition and Timins .•.••..•.•..•.•..•...•..••.. I
1.2 Funclional Specifica.ions .••.•.•••.••.••••.•.•..•..••.•.•.•.••••. I
1.3 Physical Specificalions ...•..........•.••••.•..•..••..•....•••... !
1.4 RtiiabililY Specificalions ..........•...••••..•.•.•.•..•••..•.•••.. 2
1.4.1 Read Error Rales ....•.......•.•..•••••.•••.•....••..•.•..... 2
1.4.1.1 Bil Jiner •....•.....•......••..••....•.•.•...•..•......•. 2
1.4.2 Media DereCIS ••••........••.•.••••.•..•.......••••..•••.... 2
I.S Environmental Specifications ...........•••...........••.••.•.••.. 2
1.5.1 Ambien. Temperalure ..........•..••.•...•..••.••••..••....•. 2
1.5.2 TemperaiUre Gradi.ni. ......•...•...••..••..•..........•.••.• 2
1.5.3 Relalive HumidilY ......•..•.••......••.•.•.•.•..........•••• 3
I.SA Ahilude Limi.s .........••......•••.••..••......•...••.•.••• 3
I.S.S Optrating Shock ....•....••.....••••..••......•.••••••.•.... 3
1.5.6 Operaling Vibralion ........•.....•...•.••......••...•..•..•• 3
1.5.7 Nonope,ating Shock ..•...•.•......•......•.......•..•..•.•.. 3
!.S.8 Nonoperaling Vibralion ...........••.......••....••••••••.•.. 3
1.6 DC Power Requiremenls ...•.....•..•..••..•.•..•..•....•••...•.• 3
1.6.1 Inpu. Noise Ripple •....•..•.•....•.....•.•••.•.....•.••..•.. 4
1.6.2 Inpu. Noise Frequency •..•..•....•••••...•.......•.•..•.••••• 4
1.6.3 H.al Dissipation ••...•••..•.•..••.•.••.•••..•...••.••.•...•. 4
1.7 Mounling Requirements ...•.....••.••.•.•.••••.•.•.•••...••••... 5
1.7.1 Shock Mounring Recommendalion .•••....••...•.•....••.•••... 5
1.7.2 Handling and Slatic·Discharge Precautions .••.••......••.•.•••.• 6
1.7.3 Shipping Zone .•.....•......•..••.••...••••.....••..•.•..•.• 6
USn25 HOST/DRiVE INTERFACE ••••••••••••••••••••••••••••••• 7
2.1 Conlrol/Slatus Signals: PCB Edge·Connector. JI .•..•...•••••.•....• 7
2.2 Dala Signals; PCB Edge·Conneclor, J2 ...•••..•...••.•...••••..••.• 9
2.3 DC Power Connector, J3 .•••.....•..••.•..•.•.•...•.....••....•.. II
3.0 DRIVE CONfiGURATION ••••••••••••••••••••.•• , ••••••••••••• 13
3.1 Drive Configuralion Shunt. J7 ..••••.•••••.••••••...•.•.••....••.. 13
3.2 Drive Seleci Configuralion .•••.......•.•••••..•..•.•.•.•.••..••.. 13
3.2.1 Daisy.Chain •...•••.•...••.•..•.•.•...••...•.•...••.•••..... 13
3.3 Radial ..•...•...••....•.•..•.•..•.•...•••••.••.•.•••.••.•..•.. 14
3.4 Write Fault ....••.•••...•.•.•...•.•.••••.•..•••..•...•••...•••• 14
3.5 lire Test. ...•.•••...•....•••..•.....••••...••..•••.••••.•.••••. 14
3.6 Recovery Mode ••.•.•........•....••..•..•..•..•...••••.•.••.... IS
4.0 CONTROL INi'UYSiGNALS ••••••••••••••••••••••••••••••••••• 16
4.1 Head Seleci 2", 2'. 2'. 2' ..•...•.....•....••.••••.....••..•...••..• i6
4.2 Wrile Gale •.......•....•......•.••..••..•.•......•.•••••..•... 16
4.3 Slep ....•.....••...•....•••.•..•••••••.•.••.•....•....•••••••• 17
4.3.1 Burrered Seek ..•..•.•.•.•..•..•..••••.••••.•.•.•.•••••.••••. 18
4.3.2 Slow·Slep (Track-Io-Tr:ack) .••..••••.••••.••••.••.••..••.•••.•. 18
4.3.3 AUlo·Truncation •.. , •....•...•.•..••.•.••••..•.•.••.••.•.••• 19
4.4 Direclion In •....••.•• , •.••..•..•..•••••..••.••..•.••.••.•..... 19
4.5 Drive Select. ......•.•••....••......•••.•.•....•....•..•..•.•••. 20
4.6 Recovery Mode ...••••......•......••••.•.••••..•.•..•.••.•..... 21
5.0 CONTROL OUTPUT SiGNALS ••••••••••••••••••••••••••••••••• 22
5.1 Drive Selected ....•..•••...••.....•...••.....••••.•....••••••.•. 22
5.2 Index ..•..•.•...•••••.•....•....••..•.•••.••..••..•.•••.••..•. 22
5.3 Track" .....•..•.......•.•......•••••••••.•....•.••.•.•••••..• 22
5.4 index and Track" Scnsinl ..•..•...••.••••.•.............•..•••.• 22
5.5 Ready .•..•.•...••.•.•..•••.••..••..••...•.•....•••....••.•... 23
5.6 Seck Complete ...••.•..•....•.....•..•••.•.••.•.•...••.••.•.••• 23
5.7 Writc f~uli ....•................•..•••••..••••........••.••••.. 23
S.7.1 Wriie fault Signll <lener.iion ......••••.••••...••...•..•..••.• 23
5.7.1.1 Wrile Curreni imerrupiioli .......•....•...•..........••.•. 23
TABLE OF CONTENTS
,
•..
.~
~
~o
o~
--
.•.• -..
...•..
"'::' ""::'"
,3tI
tI ••
tI
".
"
MTA f1ELD
A nu••••ric21•• 1•• in Hex dtfinin. lhe hoad ••lcc1ed
floW Dnnl" •••
A field or .1I,etOS 10sync lhe VfO for lhe 10
••AI" H•• wilh • dropptd clock 10nOliry lhe conlrol •••.lhal dal. "IIOWI
"Fr Hex dtfinin. Ih.1 10 Mid dal. follows
A nu••••ric.1 •• Iu. in Hex dtfinin. lhe dtl.nl posilion or lhe lCualor
A num.rical •• Iu. in H•• d.finin. lhe •••• or rot Ihi, ••••ion of 1M
rotation
Cyclic Redundancy (1)<ck inrormalion uoed 10••riry lhe ••Iidily of Ih.
10 fieldinrorm'lion juS! •••d
lam wrinen durin, format to isolale the ViniC' !Plitt (~;litd. Thii
field a$SUm ••Iid ••adin. of field numhor 7 .nd .11owslhe IJ 1»1<5
r<quirtd ror Dal. VfO lock.
A field of .11'''0110 sync 1M VFO rot lhe d••• fitld
"AI" H•• wilh • dropped clock 10 notiry lhe con,roIk, lhal dall rollow>
"fA" H•• dtfinin. lhai UKrclata rollow,
This am .,waibbk for UKrIbl,;
Cyclic Redu••••ncy Check inrorm.,ion uKd 10 •.nry lhe •• Iidityof
the UKr data Mid informillion JUst read
Z••OI wriuon durin. updol' to i••I.lo tho writ. splitt eft.,td. This
field '$SUm •• Iod••:odin. IIr field oumher lJ.nd .11owslhe IJ
byl•• '«Iuired rot VfO lock rot ,he ID fitld of lhe ••• 1KC'ot.
A fitld of.II •••.01 which acts II•bulf•• Ioti"un ••••0<110.11_
for ~ "'arialion
315 Ims TOTAL
tI I' I'• It tI
....,
-:Ol~
II
=1=
IJ ID \'FO LOCK
I SY:-IC BYTE
I ADDRESS
MARK
42CYU:-IDER
ADDRESS
HE.-\D
NUMBER
6 I SECiOR
NUMBER
CRC
WRITE
Tt: RS·ON
GAP
9 IJ OAH SYNC
\'FO LOCK
10 I SYSC BHE
II I ADDRESS
MARK
12 256 O-\T..••
IJ 2CRC
14 J WRITE
Tl: R:-I'()ff
G-\P
" " 1:o;rER·RECORD
GAP
'::
:=1--;;
-..•
..-
JI mlS OEM/!lIf'I. F
,..•.~-•..... ".
TJJkO/C_mu iil

II.•
j.8 Faull D~t~':lion ., , , H
5.8.\ DC·Um'al~ Si8n~1 ~4
'.8.1.1 VoUla~~ Comparalor., , H
'.8.2 H~ad Select Comparators ., ............•..................... 24
6.0 powt:R·B.\ SF.Ql'E;I;n: .•..•...........••....•••..••••••• :: ... 25
7.U UATATR.",;I;Sn:R U;I;t:s ...............••..••.•.....•••.....•. 26
7.1 WrileOper.ation., ......................•....................•.. 26
7.1.1 :\IFM \;vrile Data .............................•......•.•..... 27
7.\.2 Write Gale, .....................•....•........•......••.... 27
7.1.3 Line R"'cei\'~r . , 27
7.\04 Precorrnpensation ...........................•.......•....•... 27
7.2 R~ad Ope ••:"ion 28
7.2.\ M F~I Read Dala .............•.•...........•.•......•....... 28
7.2.2 Head Select 28
7.2.3 lSI Preamp , .................•..•..•....•.............. 28
7.204low·PatsS Filler ..................•........•..........•.•.. · .28
7.2.5 Phase Shifr~r 28
7.2.6 Z~ro·ClosS DCICclOr , ................••.................. 29
7.2.7 Time I>omain Fih~r ..................•.....•................ 29
1.2.8 Line Du-h'er ............................•.................. 29
1.0 TlIt:ORY OF OPERATIO;l;S .....•.....•..•......••.•.••.•••..•• 30
8.1 Microproc~sor .................................•............... 30
8.1.1 MPU·h,ilializing ............................•....•..•...•••. 30
8.1.2 MPU-Itdle ......................•.................•......... 30
8.\.3 Seeking: , ........................•.......................•.. 31
8.2 Spindle M01er Conllel .........•....•...•.............•.......•. 31
9.0 fIELD SERVICE ....•••...•......••..••.••..••••.••••...•....• 3J
9.1 PC Board Removal ....................•..•..................... JJ
10.0COMPOSf.:\T LOCATIO:\S. SCm:MATICS .....•.......•.•...• J5
APPE:IODIXI::J2Srclnr. 256 D)'le/Se<lor Formal Eumple •....••••.•••• 31
APPE:-IDIX 2~ Siandard Spares List. ..........••.......•••.........•. 39
iv
\,
T,,}II,OfC ••••
rnNl
,~
~
"
~
..
..
•
..
o
~,-
m
"
;,
=!}
IH:
I!':
.
I
~
u
u
:!
:.I
it:::::::....
, :J:
;": •
!H",!
.
l
c
;
c
ElmMB
;~lft~l_
J
~11I111,a
111t
IIII
I!l11!m~
i
I
..
•
..
•

.'-..•....""
••••• '!.ut.,ICoI
.
I•IIIIII
Itit i. III TABLES
TABLE I: JI Host/Drive Pin Assignments ......•..................... 8
TABLE 2: J2 HOSi/Drive Pin Assignments .. _.• _.....•..........•..•.. 10
TABLE 3: Precompensalion Pallem .......•..••..................... 27
v
FIGURES
FIGURE I: lYrical RMS +12Voh DC Slan-UpCurn:ni Pial .........•.. ~
FIGURE 2: Reference Dimensions •.•..•.••..••.•..•...•...•.••..•.•. $
FIGURE 3: Mounling Dimensions ...........•...................... 6
FIGURE 4: JI ConneclOr Dimensions ......••.•..................... 7
FIGURE S:Control/S.alus Signals ..........••...................•.. 8
FIGURE 6: J2 Connector Dimensions _................•.•... 9
FIGURE 7: Dala Signals .................•.. _ 10
FIGURE 8: JJ Conneclor ....•.............. - II
FIGURE 9: HOSi/Drive Imerface and Drh-eConfiguralion 12
FIGURE 10:Daisy-Chain Configuration 13
FIGURE II: Radial Configuralion _ , ...........•... 14
FIGURE 12:Comrol Signals Drh·er/ReceiverCombinalion ...•........... 16
FIGURE 13:Read/Wrile Timing ...............•..................... 17
FIGURE 14:Buffered·Seek Timing _ 18
FIGURE IS: Slow-Step Timing _•..........•.......... 18
FIGURE 16:AUla-Truncation Timing ........••.•..................•.. 19
FIGURE 17:Drive Select .....•..................................... 20
FIGURE 18:Recovery Mode Timing ......•••..•...................... 21
FIGURE 19:Faull Detection Flow ..........•........•............... 24
FIGURE 20: Power·On Sequence Timing _ 2S
FIGURE 21: Dala Signal Driver/Receiver CombirUltion 26
FIGURE 22: Write Operation _ 26
FIGURE 23: Read Operation , .•...................... 28
FIGURE 24: Microprocessor Operation ..........................•.... 30
FIGURE 2S: Spindle MOIOIControl ...........••...............••.... 31
FIGURE 26: PC Board Removal ..........• _" _ n
T,obI,OfC_tffl'
~
..
'()
e(.
e(
'tt(;
•
.•
'I~'
-,-
if'
ilSI~~,.
3:~:!Jil
<I
••
I
It·
iGI
1!l1i ii
It 1'111
II!I~~~
J,2:1·--;i
•••• ...11:
·r
':
..
!!
!- 1
:! •
.;i~
.
:'
i,.
u
u
1
·
·
·
;
• f':I!':r~
G
G
~!f'"
",
I
I
,
II'
'i'
!...I
~,
I
,
L_~:::'J
•
•
.•
..
..
.... '~ .,.~"'

...
..•.

il II mlndator)' tilat approved £SO p"nudonl be OMen-ed during tills
proccdn". nil Indnllft and-stade wrilt-lt •• pI.
Note: Earlier revisions of this PCB. Seagale part number 20301, required
the PROM (7D) to be Iransferred 10 Ihe replacement PCB. This il no longer
'required and the replacement board il downward compatible for all
verlions.
Parts Required: PC Board 20301-004
Tools Required: Torque driver, T-IO and T-' TOI1l.,its
I. Secure a padded anti-static work surface.
2. Remove the two fronl panel screws (or if instaileJ, the printed circuit
cable shield.)
J. Orient the drive with the PCB up.
ot. Remove and retain the three PCB moundna screws. There may be
a clear insuladng washer installed at one or more of the mountin.
points. Be sure to replace at the same point(s) during reassembly.
,_ Locate and carefully free the Primed Circuit Cable. Do not crease
the cable.
6. Locale and carefully free the spindle motor and stepper motor
connections.
7. Lirt out the PCB.
8. Your replacement PCB will be shipped to you with a kit containing
two around springs.
a. Jr the spindle molor has a steel ball in the center of its hub, mount
the spring with the graphite bUllon (I).
b. Jr the spindle motor has a short post at the centerof the hub, mount
the bare copper sprina (2).
9. Verify thai the Ground Sprina assembly is aligned and will make
positive contact with the spindle hub. NOlethatlhe washer and hex
nUl bolh mounl on the solder side of Ihe PCB. Refer to Figur~ 17.
10. Tighten the Ground Spring mounting screw to 2.' inch/lbs. Transfer
the blue Isodamp pad to the replacement board.
II. Reconnect the Stepper and Spindle motor connections.
12. Reconnect Ihe Printed Circuit cable.
13. Torque the PCB mountina screws to 9 inch/lbs. Do not forget to
replace the clear insulating washer(s), ir Installed.
ISOOAUP - ••r •
The Seagate ST22S disc drive provides OEMs and system integratoi"$
with over 20 megabytes of formalled capacity in a $hock-~esisiani
half-heighi package. The ST225 is designed fOr single-user desk-lOp
systems, local storage in network or multi-user sysiems, Or lIS an add-
in upgrade for PCs. The low-power ST22S design is ideal for th~ lip-
plicalions in either rugged indumial or quiet office environments. The
ST225 supports the industry-siandard ST412 interface and has the
same voltage requirements for ease of integration.
High reliability is assured through the use of LSI, a single printed cir-
cuit board, mini-monolithic heads and proven oxide media. Scagate's
proprietary helical-band rotary-actuator features simplicity and ease of
manufacture with excellent thermal stability. A dedicated head ship-
ping zone assures data integrity during shipping and hllndling. The
ST225 offers II low-cost, rugged and reliable disc drive with an MTBF
of 20,000 hours.
Our manufacturing facilities have been designed and located ex-
clusively for high volume production and testing of disc drives.
Seagate's ongoing commitment to vertical integration assures availa-
biliiy of the latest technology at the same consistent quality and lowest
possible cost. Scagate inspects every assembly at every stage of the
production process. A proprietary test system continuously verifes oUr
goals of volume production with rigorous quality control.
Oct. 29, 1985
\A)lIage requirements. interface connectors and mounting requirements are iden-
tical to the 81225. Please refer to page 40, Appendix number 3 for specifications.
ST213
This manual may be used to install and configure 8eagate's ST213. The 81213 is a
half-heighl, single-disc. 10 Megabyie (formatted) Winchester. It employ s the samf[1
efficient helical-band rotary-actuator as the 81225 and also supports the industry-
standard 8T412 interface.
INTRODUCTION
.-t
~.
FIGURE 27:
Ground Spring
Assembly
fl,
GAOliNO
SPRING
~
PC8
SOlDER SIDE
,
=
ria
I
2·\6 UNe
GAOUNO/8UTTONHEAO SCREW
SPRING
(2) I
WASHER
HEX NUT
PC8
COMPONENT SIDE
.u ST11J OEM/II •••.f'
STZ1J OEM/II ••. F vii

9.0
FIELD SERVICE
The ST22$ doc:s nol require prcvcnlalivc mainlcnancc. The PC Board may
be eAchanicd in Ihe field. Refer below 10 Sccl;(m 9.1 for .hi! procedure.
PC BOARD REMOVAL 9.1
~
FIGURE 26:
PC Board Removal
UOUNTING SCREWS
:(>.0: COUPONENT SIDE
h. or o'
ISOOA•••• Ii
'SlUEt PCC_
\UOUNT ON SOlDER SlDEI CONNECTION
~
ST11' OEM/kt. T
SPlNOlE UQTOR
CONNECTION STEPPER MOTOR
CONNECTION
3J

Access time is defined as the time from the leading edge of the last
Step pulse received to SEEK COMPLETE (including carriage settling).
The period between Step pulses must be between s,.sec and 2O!psec.
Average access time is measured over a lOS·track seek (one·third
stroke.' The calculation assumes the following:
I. Nominaltempc:rature and power
2. The average is taken from an inward one-third stroke, plus an out·
ward one-third stroke.
Track-to- Track:
Avcrage:
Maximum Seek:
ACCESS TIME DEFINITION AND TIMING
PERFORMANCE SPECIFICATIONS
lO.Omsec max.
65.Omsec max. '
150.OmsecmIX. '
11.11
U.1
fOrMliit<Ki
1(1.15MB 28.42 MB
5.tM MB S.JS MR
U92 Bytes g,704 Bytes
156 Bytes 512 Bytes
31 Sectors 11 Secton
Varona'lIed
25.&1 MB
6.41 M8
10,416 Bytes
NA
NA
Capadty
Per Drive:
Pcr Surrace:
Per Track:
Per Sector:
Sectors per Track:
1QO
SPECIFICATION
SUMMARY
'1
The primary functions. listed below, are incorporated within the cus-
tom spindle motor IC (lC 48).
I. Monitors the Hall signal from the spindle motor and uses the Hall
transistions to commutate the motor phases. It regulates the motor
speed by measuring the Hall period and comparing it to the oscilla·
tor clock period.
1. Employs a sense line to regulate the start current and execute a cur·
rent limit shut-orr.
3. Monitors the power supply for output driver shut-olf •. When the
power is olf. the oulput drivers become self-biases on, which brakes
the molor using back·EMF. '
4. Locked·Rolor Protection: IC 48 monitors the .ime from the first
Hall transition. If the mOlor does not spin.up. the drivers will be
disabled to avoid overheating Ihe circuil. This Hall signal is gen·
crated by a transducer located in the motor hub. Two complele
square waves are generated each comple.le revolution.
FUNCTIONAL SPECIFICATIONS 1.2
Rotational Speed:
Latency:
Recording Density:
Aux Density:
Track Density:
Cylinders:
Tracks:
ReadfWrite Heads:
Discs:
DaUlTransfer Rate:
Recording Scheme:
3,600 RPM ±1'1(,
8.33msec nominal
9,827 BPI (Cylinder 614)
9,827 Fa(Cylinder 614)
588 TPI
615
2,460
4
2
5.0 Megabits/second
MFM
(!J PHYSICAL SPECIFICATIONS ~.3
Height:
Width:
Depth:
Weight:
I.6J Inche$ mo:. (41.4mm)
5.75 •.: iodle$ U~.OS '.:' mm)
8.00 inehei mo. {W3.2mm)
2.13 Ibs (USKII)
I. hft'•••••-Sft.
J1 ST11' OEM/Bn. F
ST11' OEM/An. F

1.4 RELIABILITY !jPECIFICATIONS
Bit jilter reduction determines the relationship between the leading
edge of READ DATA and the center of the data window.
The specified Read error rates arc: based on the following bit jilter
specification. Ihe data separator must provide at least - 40 dB of bit
jilter reductio n at 2F with an offset error of less than LSnsc:c shift
from the center of the data window.
A medial defea is a Read error when data, which bas been correctly
wrilten, cannat be recovered within 16 retries.
A printout wimlbe provided with each drive listing the location of any
defect by head, cylinder, sector and byte. It will also specify the
number of bytles from the Index pulse. •
There: will be, no more than eight (S) defects per surface for a max-
imum total of thirty-two (32) per drive. Cylinder Zero will be free of
defects.
8.2
IIIOI'OlAA
""TOIl
DRIVERS
IIIPOI.AA
""TOIl
""""AS
POWEll
NS(
SPINDLE MOTOR CONTROL
SEEKING 8.1.3
Upon rc:ceh'ing Ii S.eppulse •• he MPU pauses for :!S(\.rsc:c10 allow for
additional pulses befol'Cexecuting the seeli operalion. Every incomin.
pulse reselS the :!S~;C:C timer. The 5eek will nOI begin unlil Ihe lasl
pulse is received.
When sc:c:king.Ihe MPU counts the number of tracks to be covered.
and employs the optimum step algorithm to mlch Ihe largetlrack.
While seeking. Ihe MPU conlrols the direction and mode of the cus-
tom stepper Ie. Pulses are sent to the stepper chip. which does the ac-
tual phase commulations. Acttleralion/deceleration are delermined by
the varied frequency of the pulses and .he use of the MOlor IC Direc-
tion line. This IC provides both Ii curreni source and sink iO molor
windings.
With READY and SEEK COMPLETE true. the MPU re.urns \0 the
Idle mode.
~,
BIT JmER
MEDIA DEFECTS
20,000 Power-on hours I
Not required
30 minu\c:S
Syc:an
READ ERROR RATES1.4.1
MTBF:
PM:
MTTR:
Service ufe:
Recoverable Read Errors: I per 10" bits read J
Nonrecoverable Read Errors: I per 10" bits read •
Seek Errors: I per 10- sc:c:ks
1.4.1.1
1.4.2
I'
1.5
1.5.1
Operating:
Nonoperating::
ENVIRONMENTAL SPECIFICATIONS
AMBIENT TEMPERATURE
SO'F to 113'F (lO'C to 4S'Q
- 4O'F to 140'F ( - 4O'C to 6O'C)
FIGURE 25:
Spindle Motor Control
1.5.2
Operating:
Nonoperating:'
TEMPERATURE GRADIENT
IS'F /br (lO'C/hr) max.
Below condensation
'19 To insure sufficienl staning power. the spindle motor circuil is run
with a set of biploar motor drivers. Once the spindle motor has started
running, Ihe MPU switches the motor circuit from bipolar 10 unipolar
drivers; which significantly lowers the required running currenl.
1. T,rIca'_., 25'C, 8' _ ••••L Colaoto' ••• potMiL S,... H__ 111.
J. R•••••••••• wt.~1oo•• mrIn
4. N•••••••••• w. ••II~I•• 6 mrIn
5•••••••••• 31.-1", 256.,../_ •• r•••••
2ml' DEMIR"". F
ST11' DEMIR,., F 31

The microprocessor monitors and controls the internal drive runClions
and the host interrace lines. The MPU has only three active modes:
Initializing. W.ltlng. or Sftklnl •..
8.1 MICROPROCESSOR 8.0
THEORY OF
OPERATIONS
RELATIVE HUMIDITY
Opei'ating:
Maximum Wet Bulb:
Nonoperating:
8 to 80% noncondensing
78.8'F (26'C) noncondensiili
5 to 95~ nOilcoildeilsing
U.3I
Maximum permitted shock without incurring physical damage or de·
gradation in performance: 10 G's ."
Maximum permined vibration, at the rollowing rrequencies. without
incurring physical damage: or degradation in perrormance: '
Frequency Vibration
5 - 22 Hz .01OHdouble amplitude
22 - 300 Hz .25 G amplitude (peak)
300 - 22 Hz .25 G amplitude (peak)
22 - 5 Hz .01Owdouble: amplitude
U,iJ
1.5.5
1.5.6
- 1,000 ft to 10,000 ft
- 1,000 ft to 30,000 ft
OPERATING VIBRATION
AlTITUDE LIMITS
Operating:
Nonoperating:
OPERATING SHOCK
••
FIGURE 24:
Microprocessor
Operation
-
su., •..••
-.
NCO'i'I.fIIf
~
.-!!!!-
DIRECtION
CON'''1I11 Iot:IF~,
~
'RACK •
NONOPERATING SHOCK 1.5.7
a.1.1 MPU INITIALIZING Maximum permitted shock without incurring physical damage or de·
gradation in performance: 40 G's -,'.'
Maximum permitted vibi'ation, at the rollowing rrequencies, without
incurring physical damage or degmdation in perronnancc: ',I
IFnquenc)' Vlbratloll)
5 - 22 Hz .010' double amplitude
22 - 300 Hz .50 G amplitude (peak)
300 - 22 Hz .50 G amplitude (peak)
22 - 5 Hz .010' double amplitude
At power-on, the MPU initializes the stepper circuit to phase minus A
and minus B, and resets all interrace lines under its control.
As the drive spins-up, the MPU switches rrom bipolar to unipolar aRer
approximately 40 revolutions. The processor will measure the period
or the index signal to assure that the drive is up-to-speed berore the re-
calibration routine is initiated.
The MPU sets phase minus A and minus B on the stepper chip (lC
80) and then executes the Seek and Discriminator routines. which re-
calibrates the Read/Write heads to Track 19, divides Index, and gives
READY and SEEK COMPLETE. The drive is available to accept
commands 24 seconds max. aRer polAer-up. ~
NONOPERATING VIBRATION
DC POWER REQUIREMENTS
1.5.8
1.(1
When in the idle mode, the MPU loops. waiting ror Slep pulses. The
custom Read/Write LSI chip monitors the power inputs and. on tran-
sients, resets the MPU which will reinitialize the drive.
a.1.2 MPU·IDLE The ST22S is listed in accordance with UL 478 and CSA C22.2
(O-MI982), and meets all applicable sections or IEC 380 and VDE
0806/08.81, as tc:stedby TUV-Rhf!infand. North Amf!rica.
i. 11_ •••••.••••".,•••••••••••••
7. S.p<ot 10•••• ot , ••• rI•• _' ••••••••••• Villi _"", ••••• ,,.. ••••••••••••••
s..s.m••••1.7
•. lioMlt"",.'-"1 ••,•••• 1,,1•• _
JO STll' OEM/II ••. F
STllS OEMI"", F J

The maximllm permiued ripple is 1000V (peak-to-peak) on either
+12Volts or +,Voltsmeasured on Ihe hoSlsystem power supply across
the following equivalent resistive loads:
-+- 12 Volts DC 1612
+S Volts DC SQ
Power may be applied or removed in any sequence without ~=of
data or damage to the drive.
+U Volls DC:
Voltage Tole:rance (including ripple):
Maximum elmeR! Oil Power-on:
Typical Current
+5 Volts DC:
Voltage Tolerance (inc. ripple):
Typical Current:
Power
This element changes raw digital data to a differential data. providins
immunity to common mode noise during transmission.
This element detects bit positions as the slope of the Read Data signals
crosses the zero threshold. At this point analog data an: cbanged to di· .
gig).
1.2.ti\
7.2.1
7.2.'
ZERO-CROSS DETECTOR
TIME DOMAIN FILTER
LINE DRIVER
When a high resolution head reads a low frequency data pallem, there
is Itendency for the head signal to decay between bilS. If the signal de·
cays below the uro cross threshold. a spurious data bit will be generat-
ed. Such false bits are ignored by delaying the clocking bit past the p0-
tentia! point of highest drop.
""
INPUT NOISE RIPPLE
±S%
2.2 Amp
.9 Amp
1: ,1ft
.gAmp
14.8 typical'
1.11.1
1.11.2 INPUT NOISE FREQUENCY
20MHz max. on both the +12 and +SVolt lines
AMPS
26
2.0
1.0
6
r---- --+-MAXIMUM PEAK CURRENT
IDlE
I I
SEEKING
FIGURE 1:
Typical RMS +12Volt DC
Start-Up CUffent Plot
1 ~ 3 4 5 6 7 8 9 10 11 12 13 14 15 18 17 18 19 20
SECONDS $
t. 1\1•••••••• ....." 1M 101••••••••••••••••••••• ' •••• coMl,"'"
JS"C ••• _ 1••.,.,.1_
s.. .....
NotnI•• 1.",,- .,,1'"
SpI•••••••••••••••n••III -kilt
4ST11J OEM/RIO. F
ST11J OU//hY. F29

O~'~-..'.O£l'· .•••.·•.~ •. ~••••• "'"_ ••__ •••.• ' .•• _ •.•••.••.••..
7.2 READ OPERATION
FIGURE 23:
Read Operation
9)
.-·0
"'II
FIGURE 2:
Reference Dimensions
The data recovered by reading a track is transmitted to the host system
via a differential pair of MFM READ DATA lines. The transition of
the +MFM READ DATA line going more positive than the - MFM
READ DATA line. represents a nux reversal on the tfilck of the select·
ed head.
The binary decoder (IC 4H) selects the desired head based on the status
or the Head Select lines. If the DC vollases are too low, possibly
causing an inaccurate Read operation, the decoder (pin.J2) will select
a nonexistent head. By rererencing 0 to +5 Volts actual ground appears
as - 5 Volls, which eliminates the necessity of a negative power source
normally required by the LSI preamp.
With the Head Center Tap (HCT) active. data from the selected head
will now into the preamp (9E). which amplifies the Read signal and
also acts as a high-pass filler.
The HCT voltages are monitored and controlled by the custom
Read/Write LSI (SH). This chip monitors the Write Gate line and sets
the appropriate level on its Voltage Center Tap (VeT) for Read or
Write mode.
The ST22S may be mounted in the following orientations:
Horizontal: Spindle motor dowo
Sides: Left or riaht
The drive should not be tilted front 10 back. in any position, by more
thail ±5'. Refa to Figures 2 and Jfor reference and mounung di·
mensions.
for optimum performance the drive should be formatted in the Slime
orientation liSit will be mounted in the bost system.
1.7
1.7.1
A.is lor Shock speUfication
,Ay
Dimensions are in inche'i.
MOUNTING REQUIREMENTS
SHOCK MOUNTING RECOMMENDATION
~
;»"
LSI PREAMP
HEAD SELECT
MFM READ DATA
1.2.1
1.2.3
1.2.2
This filter network attenuates high frequency noise. which is outside
the normal data sipal range.
Amplified data enters the circuit and is shined 90' so peak data, which
was detected over a fairly broad range. is now moved to II highly
sloped accurately detectable position at the zero crossing point.
1.2.4
1.2.5
LOW-PASS FILTER
PHASE SHIFTER oG
It is recommended that any external shock mounts between the drive
and the host frame be designed so that the composite $yslem has II
venicml resonant frequency of 25Hz or lower.
A minimum clearance of 0.050 inch :shouldIx: allowed mround die cn·
ure perimetCl' of the drive for cooIiDi airflow and mo\iow during
!Mcchanicmlshock or vibration.
28 ST1110EM/I'. ••. If
.,.. .•.-..•._,-----_.~~.-----~~.--.. STl13 OEM/~rI.F ,

A Write sequence is initiated when Write Gate is activated. which
causes the Read/Write LSlto apply +12 Volls 10 the center tap or the
selected lead; concurrently data is sent 10 the line receiver.
WRITE DATA is trans!11ined by a differential pair which defines the
transitions 10 be wriUen on Ihe disc. The +MFM WRITE DATA iille
aoing more: posilive than the - MFM WRITE DATA line is Iile active
Iransition. Tilis siBlIalmust be do"en to aninaclive Slale wilen in Ihe
Read mode.
Differenlial Write flata. which is precompensated MFM. is received
rrom the controller.and changed 10 sinBie line. II is then red into the
pulse generator. which changes pulse data to square wave data.
Pin·S. at IC SH. will be activated ir plus data is to be wrillen. Pin-9
will be activated ror minus data,
U.2 HANDUNGAND STATIC-DISCHARGEPRECAUTIONS
After unpacki!1B and prior to system integration, the drive is eAposed
to potential ha ndling and ESD hazard.
De DOt touch the PCB "l~nKton, boIlEd rompoMnts or the
printed drcult. cable _Itbout obser.lnl Slatlc-dlscharae precautions.
Handle tbe drin b)' tbe (rame onl)'.
II is stronBly recommended that the drive always rest on a padded sur.
race, with the l1eads parked over the shippinB zone, until the drive is
mounted in the host system.
1.1.3 SHIPPINGZONE
The ST22S employs a shippinB lone. located rrom Cylinders 61S to
670, to preserve data integrity during shippin8ltranspon. The
Read/Write heads may be parked in the shipping zone by issuing a
seek to any cylinder between 615-670. The drive may then be
powered-down.
Upon power-up. the drive will recalibrate to Track _. Ir the heads are
parked while power is still applied. any Step pulse will cause the unit
to recaJibrate to Track ~.
~
;'!
MFM WRITE DATA
WRITE GATE
LINE RECEIVER
1.1.1
1.1.2
7.1.3
1------- 100",-, - 1
~i J'm~21 .... _~--:-r
UN tO~ - "3 moll
~.,'~ ,,~. _' u~ I
Tf, L;II. 02 ,
021 02 . e•• ' t.51) "t 02
,": SII I I ' 12'''' t$1.
1 ~-1. MIIl"lI'G
• 17 t: a:z 3." t01 '·uou:.~ .•~ tIpe.
fCSO t5" (1125 t: 51' / '0fIII. ~ Oft ca"h udr;
"UUSC·18t1:!XI
'....,.--:r- I 1/
'"I I ,
5G'S t010
Ct., 22!: asl
,
!
,
f550t02
rT'
o
o
Oi.
·
·
·
D
$7$':
(, .•• os-:!}
FIGURE 3:
Mounting Dimensions
$
TABLE 3:
Precompensation Pattern
PRECOMPENSATION 7.1.4
Precompensation is recommended on Tracks 300 through 614. The
optimum amouill or precompensalion is 12nsec ror both early and late
bits. Tablt Jbelow indicates the bit panerns and the direction 10 be
compensated. An X denotes a "don't care state."
As the Read/Write heads travel inward. the track circumrerence or
course decreases. and the data bits are necessarily written eloser togeth.
er. The Write Current is Iherefore reduced 10 preclude any pulse
crowding.
The ST22S does not require the host to speciry a cylinderis) to beJin
applying reduced Write Currenl. This runction is managed internally
by the microprocessor •
PREVIOUS IENOIHG
NEXT
TIMING
X
0tt WRITE DATA LATE
X
t t 0WRITE DATA EARLY
t0 0 0
WRITE CLOCK LATE
00 0 t
WRITE ClOCK EARLY
ALL OTHER PATTERNS-.u.
Donw1soons are in inches (mml.
NOn:: Mountin, JCIrtWI mIlS! •••••••••• more .lIon .2' inch inside .he drive.
6STll' OEMIR,.. F srl1' OEMIR". F 27

This section details Ihe physical specificalions or the host/drive inti:1l-
face mnnecto", Conneclor dimensions and iJili IIIS5isnmeniSfollow
under IUIchsection. Refer 10 Figure 9 for all overall view of the drive
and the interface connectors.
Two pain of balanced sisnals are employed for data transfer: MfM
WRITE DATA and MFM READ DATA. Data lransfer lines belween
Ihe hosl syslem and Ihe drive are dilferenlial in nalure and may nol
be multiplexed. Refer above 10 TaM" 1 for data lransfer pin assign-
ments and Figr"t' 7 for a hosl/drive interconnection example.
1.0
DATA TRANSFER
LINES 2.0
ST225
HOST/DRIVE
INTERFACE CONTROllST ATUS SIGNALS
PCB EDGE-CONNECTOR, J1 2.1
i'
HIGH
TRUf
7.1
FlAT CABI.£ OR TWlSTEO PAIR
HIGH
'TRUE
WRITE OPERA nON
FIGURE 21:
Data Signal
Driver/Receiver
Combination
""
Do IICri tOiiCh the PCB edge-coniiedon, board componeob or the
printed circuit albie, wllhout o~IDI !ltadc-dlscharae precaudoliS.
"melle the drive by the frame 001)'.
Control and status signals belween the host and the drive are
lransmined through a 34-pin PCB edg«onneclor, J,I. Figurt <Iindi-
cales connector dimensions and Table I list! Ihe pin assignments. A
hosl/drive interconnection is illustrated in Figure 5.
With the drive resting on a padded surface, orienled wilh the PC
Board up and Ihe edge-coonectors toward you, J I is 10 your lefland
J2 is on the right Refer to Figure 9 for position and other interface
option connectors.
11 pins are numbered I through 34 with the even pins located on the
solder side of the PCB. All odd pins are ground. A key slOI is provided
belween pins 4 and 6. Pin 2 is labeled. The recommended mating
connector for JI is AMP ribbon connector, part number 88373-3.
FIGURE 22:
Write Operation
Wi'
FIGURE 4:
Jl Connector
Dimensions
.017
-i
I
~
II:'~
In order to Wrile, Ihe following condilions must be lrue:
I. DRIVE SELECT active 4. Wrile Gale active
2. READY active 5. WRITE FAULT inactive
3. SEEK COMPLETE active 6. RECOVERY MODE inactive
26 STl1j DEM/R,.,. F
ST113 O';:;I/R,.,. F
t- 18 EO. SP." .100- 1.800
I,n5
IIOA~O THICXNII!U:0.082 ~ 0.007
TOUluua: 0 xxx :>: 0.005
__ -.ell
"i
7

GAOOIINO SIGNAL
IITN;PIH PINSlGNALNAMf
•
2
·HEAD SELECT 2'
31 •-HEAD SELECT2'
5a
·WRITE GATE
T: at·SEEK COMPlETE
910
•TRACK _
tI 12t·WRITE FAUt. T
13 14·HEAD SELECT ZO
15 18·RECOVERY MODE 17 18·HEAD SELECT 2'
19 lOt
.INDEX
2. 22t
·READY
2:J 24
·STEP
25 28
.lJRIVE SELECT I
27 28·ORIVE SELECT 2 2!!1 30
·DRIVE SELECT 3
3t 32·DRIVE SELECT 4 331 34·DIRECTION IN
tSTATUSENABLED WITH DRIVE SELECT
HOST 1T221
FLAT RISSO" OR TWISTED PAIR 20 fT. MAX
----
- HEAD SELECT 2' 3 - HEAD SELECT 2' •
S
-WRITE GATE •
- SEEK COMPlETE TRACK'
- WRITE FAUlT- HEAD SELECT 2<RECOVERY t.AOOE 17..•
I
J.I
- HEAD SELECT 2' 11
-ONCEX
20
- READY
22
- STEP
2.
- DRIVE SELECT I
- READY
DC ON rf----4
-/ 17••• typo I-
ROTATIONAl. Y
SPEED REGUlATED
1660 ••••••••• 'od) 1
- TRACK' I: -t ....I-
1~1 ~-:-----
f----4-t~ l-
I'11 _
-SEEK COMPLETE J--2- -.--1
I I I
~2'''' __ I
The application of DC power inititates a sequence ihai star1Sihe llpin-
die motor, regulates its speed, $Ieps the Read/Write heads 10 Tm:k _
and i55UesREADY IInd SEEK COMPLETE !lCQuentiallyiO terminate
the sequence.
READY and SEEK COMPLETE are i55Ued10 the interface when ibe
drive il available 10 accept tommands. Upon power-up the drive i$
available 10 accept commands 24 seconds max. after 'he power supply
voltages maintain the specified ±SI!(, vol. tolerancei.
6.0
POWER-ON
SEQUENCE
FIGURE 20:
Power-On
Sequence Timing
'",
i/J
"{ABLE: 9
J1 Host/Drive Pin
Assignments
FIGURE 5:
ControVStatus Signals
lJ3
J
FR.w£ GNO
QTWJSTEO PAtA6111 GA '" "'90'1
FRAME GNO
II mlJ OEM/II". F
mlJ OEM/II".' 25

U1 FAULT DETECTION!
The Read/Write LSI (IC SH) continually monitors the +Sand +12
VOC lines for low voltage conditions. If +SVolts is >IS% low or
+12 Volts is >20% low, Write Current will be disabled and the
MPU will be reset.
A OC-Unsafe condition will cause a microprocessor reset. This will
prohibit writing. but will not directly cause a WRITE FAULT. If Write
Gate remains true, while the MPU resets from a OC-Unsafe condition,
a WRITE FAULT will be triggered through the loss of READY and
SEEK COMPLETE.
2.2
.050~ ~I
I
-1L .CI31UIIII
III· -I~-050
mt:-T II~
; I nt+
I
I
.087
DATA SIGNALS
PCB EDGE-CONN~CTOR, J2
Do not touch the P'-B ~1I~nnectln, Itoani components IIIi' ftbe
printed dmilt alble without observlne ltatlc-dlscharge precautions..
Handle the drl.e by thl2frame only.
ReadfWrite data signals are received ud transmitted over a 20-pin
PCB edge-connector. 12. Figurlf 6 below indicates connector dimen-
sions and Table 2 lists the pin assignmCIIIs. A host/drive interconnec>-
tion is iUustrated in Figure 7.
With the driw resting on :I padded surface, oriented with the PC
Board up and the edge-conilectors toward you. J2 is to your right arid
J I is on the left. Refer below to Figure 9.
J2 pins are numbered I through 20 with the even pins located on the
solder side of the PCB. A key slot is provided between pins 4 Ilnd 6.
Pin 2 is labeled. The recommeilded mating COilnectar for J2 is AMP
ribbon oonilector, part ilumber 88373-6.
FIGURE 6:
J2 Connector
Dimensions
FIGURE 19:
Fault Detection Flow
DC·UNSAFE SIGNAL
VOLTAGE COMPARATOR
HEAD SELECT COMPARATORS
HEAD SELECT
COMPARA TOR
WAeTE QA Tt:.
SEEK COMPl£TE. READY
5.8.1
5.8.1.1
During normal operations a single head will be selected. and the Vol·
\age Center Tap (vcr) will be high (lC SH, pin-27).
If multiple heads are selected, the voltage will increase at Voltage Head
Safe (VHS. IC SH. pin-26) forcing its output low. Lesr than one head
selected will decrease the voltage at pin-4. forcing its ol.tputlow. Write
Current will then be disabled and the MPU will reset•
5.8.2
eI I 1---.Ea. SI' .•• ICII~ .100--1
1.1175
IIOA~O YHICKIIESSo 0.082:t 0.007
TOU~AHCI: 0.111111:t 0.005
(..•..•--
24 mlJ OEM/Itn. F
STllJ OEM/II,.. ,. 9

This sianal, when true loaelher wilh SEEK COMPLETE. indicalell thai
the drive is ready 10 Read, Wrile or Slep and lhal all conlrol inpul sill- •
nals are valid. When Ihis line is Ilia/!, all radinl. wrilinl and !teppinl
are inhibiled. The maximum lime after power-on ror READY 10 be
lrue is 24 seconds.I'
Durinllhe power-up sequence, READY remains raise unlil:
I. The recaJibralioD 10 Track" is complete
2. Spindle speed is slable within ± I'" or nominal
3. Drive inilialwliion roulincs arc complciC
4. DC vollagcs are wilhin lolerance
GROUNO SIGNAL
RTN I'IM
PIN SIGNAl. NAME
2
I
-DRIVE SELECTED
43
RESERVED
85RESERVED 87
RESERVED
10 9
RESERVED
12 II
GROUND
13 +MfM WRITE DATA
14 - MFMWAITE DATA 16 15GROUND
17 + MFMREAD DATA
18 -MfM READ DATA
20 19
GROUND
TABLE: 2
J2 Host/Drive Pin
Assignments READY
SEEK COMPLETE
$.5
5.6
This signal nOli6es Ihe hosl syslem Ihat • condilion exists which, ir nol
correcled, may cause an incorrecl Wrile operalion.
This signal IOCS 10 • low level (Irue) on Ihe interrace when the
ReadfWrile heads have seuled on Ihe 6na11rack at Ihe end or IIseck.
Seeking. readil.o or wriling should nOI be altempled when SEEK
COMPLETE :s false. SEEK COMPLETE will go raise in the rollowinl
cascs:
I. When a recalibralion sequence is inilialed (by drive 101ic) al
power-on
2. IOOnsectypical after Ihe leading edge or a Slep pulse
3. Ir eilher +SVolls or +12 Volts are detected as unsafe
4. At the beginning and end of a RECOVERY MODE operalion
WRITE FAULT SIGNAL GENERATION 5.7.1
With DRIVE SELECT active. and anyone orlhe following condilions
true, the WRITE FAULT signal will be issued to Ihe inlerface and
Wrile Currenl will be inhibiled.
i.Wrile Gale lrue wilh no Wrile Current to Ihe heads
2. Wrile Currenllo Ihe heads willi no Write Gale
3. An altempllO Wrile willi RECOVERY MODE active
4. SEEK COMPLETE false
S. A Slep pulse is received
WRITE fAULT remains lrue unlillhe condition which lriggered the
raull is correcled and Ihe resel is completed.
FIGURE 7:
HOST
IT22S
-Data Signals
FLAT RIBBON OR TWISTED PAIR 20 FT .•••• X
-DR~2RESERVED
---
RESERVED I
•
RESERVED ---
RESERVED •
RESERVED
10
GROUND
11
12
+MFM WRITE DATA
13
I
IJ~
- MFM WRITE DATA
l'
GROUND
IS
"
+ MFM READ DATA
17
-MFMREADDATA
II
GROUND
,,1
II (t
20 J..
-II<.
WRITE FAULT
WRITE CURRENT INTERRUPTION
5.7
U.1.1
10 ml' OEMIR".F
sril' OEAlI~".,.
Anyone of IIIe followin. condilions will cause Wrile Currenllo be in·
hibited when Wrile Gale is lrue:
I. Mulliple hcaduelected
2. No head selected
3. READY false
III. no 24 •••• _ .1_ 1h n~ r••• ,•••""'" I•••••••••••••• ,..
_ ••••••••• ,,1, •••iIII•••••••••••• 11iri :!: "" ""- ~
23