SeaLevel PIO-24.PCI 8008 User manual

Part # 8008
Sealevel Systems, Inc
155 Technology Place
P.O. Box 830
Liberty, SC 29657 USA
Phone: [phone]
FAX: [phone]
www.sealevel.com
PIO-24.PCI
USER MANUAL
TM

Contents
INTRODUCTION..................................................................................................1
OVERVIEW ..................................................................................................1
WHAT’S INCLUDED.....................................................................................1
INSTALLATION....................................................................................................1
CARD SETUP...............................................................................................1
SOFTWARE INSTALLATION .........................................................................1
Linux Users...............................................................................1
SYSTEM INSTALLATION ..............................................................................2
TECHNICAL DESCRIPTION............................................................................3
WINDOWS SOFTWARE................................................................................3
LINUX SOFTWARE ......................................................................................3
3rd Party Software Support.....................................................4
50 PIN RIBBON CABLE PIN OUT.....................................................................5
ELECTRICAL CHARACTERISTICS..................................................................6
Pull Ups.....................................................................................7
PROGRAMMING................................................................................................8
Application Programmers Interface (API)............................8
Reading the Inputs:.................................................................8
Reading the Outputs:..............................................................8
Presetting an Output Port:.....................................................8
Writing the Outputs:................................................................8
Interrupts:.................................................................................8
Port C.........................................................................................9
Port Configuration:.................................................................9
RELATIVE ADDRESSING VS. ABSOLUTE ADDRESSING.................................10
Addressing Continued..........................................................12
DIRECT HARDWARE CONTROL................................................................13
Reading the Inputs:..............................................................13
Reading the Outputs:...........................................................13
Presetting an Output Port:..................................................13
Writing the Outputs:.............................................................13
Bit Set/Reset...........................................................................13
Port Configuration:..............................................................13
Interrupts...............................................................................13
Register Description (for direct hardware control).........14
CONTROL WORDS....................................................................................15
I/O Configuration.................................................................15
Bit Set or Reset Port C..........................................................16
Interrupt control...................................................................17
Interrupt mode select table..................................................17
Interrupt Read.......................................................................17
SPECIFICATIONS............................................................................................18

ENVIRONMENTAL SPECIFICATIONS...........................................................18
POWER CONSUMPTION............................................................................18
MEAN TIME BETWEEN FAILURES (MTBF)..............................................18
PHYSICAL DIMENSIONS............................................................................18
APPENDIX A -TROUBLESHOOTING........................................................19
APPENDIX B -HOW TO GET ASSISTANCE.............................................20
APPENDIX C -SILK-SCREEN......................................................................21
APPENDIX D -COMPLIANCE NOTICES..................................................22
FEDERAL COMMUNICATIONS COMMISSION STATEMENT.........................22
EMC DIRECTIVE STATEMENT .................................................................22
WARRANTY.......................................................................................................23
FIGURES
Figure 1-50 Pin Ribbon Cable Pin Out....................................................5
Figure 2-Electrical Characteristics.........................................................6
Figure 3-Pull Up Resistors.........................................................................7
Figure 4-Control Words..............................................................................9
Figure 5-Absolute byte Address, (any configuration) .........................11
Figure 6-Relative Byte Address...............................................................11
Figure 7-Relative Byte Address Continued...........................................11
Figure 8-Relative Byte Address...............................................................12
Figure 9-Register Description.................................................................14
Figure 10-I/O Configuration....................................................................15
Figure 11-Control Word, Port Setup.....................................................15
Figure 12-Bit Set or Reset........................................................................16
Figure 13-Interrupt Control Tables.......................................................17
© 2001l Sealevel Systems, Incorporated. All rights reserved.

Introduction and Installation
Sealevel Systems PIO-24.PCI Page 1
Introduction
Overview
The Sealevel Systems PIO-24.PCI provides one 8255 mode 0 compatible port
providing two eight-bit ports and two four-bit ports. When configured as
outputs each bit of the two four-bit ports may be set or reset individually.
What’s Included
The PIO-24.PCI is shipped with the following items. If any of these items is
missing or damaged, contact the supplier.
•PIO-24.PCI Adapter
•Sealevel Software CD
•Industry Standard Relay Rack Cables are Available:
Part number CA135 for Edge Connection
Part number CA167 for IDC Connection
Installation
Card Setup
The PIO-24.PCI is a fully compliant PCI ‘Plug and Play’ adapter. All card
resources (i.e. I/O address, IRQ selection) are auto-assigned by either your
system BIOS or your ‘Plug and Play’ operating system.
Software Installation
For proper operation install software first. To install the software place the CD
in your CD-ROM tray and the auto-run program will start. If auto-run is not
available browse the CD and choose “index.htm”. Choose Install Software at
the beginning of the CD. Select the Digital I/O software drivers and install
SeaIO prior to installing hardware.
Linux Users
Refer to the installation instructions at the beginning of the CD for details on
installing the Sealevel Systems digital I/O cards in Linux.

Introduction and Installation
Sealevel Systems PIO-24.PCI Page 2
System Installation
The PIO-24.PCI can be installed in any of the PCI expansion slots.
1. Turn off PC power. Disconnect the power cord.
2. Remove the PC case cover.
3. Locate an available PCI slot and remove the blank metal slot cover.
4. Remove the clamping portion of the bracket from the card.
5. Gently insert the PIO-24.PCI into the slot. Make sure that the adapter
is seated properly.
6. Feed the 50-pin ribbon cable through the cutout bracket and connect it
to the card.
7. Replace the bracket retaining screw.
8. Install the clamping portion of the bracket
9. Replace the computer cover.
10. Connect the power cord. Installation is complete.

Technical Description
Sealevel Systems PIO-24.PCI Page 3
Technical Description
The PIO-24.PCI provides 24 channels of digital I/O configurable as inputs or outputs, which can
be utilized for PC based control and automation of equipment including: sensors, switches,
satellite antenna control systems, video and audio studio automation, security control systems,
and other industrial automation systems.
Windows Software
The PIO-24.PCI ships with Sealevel Systems’ SeaI/O suite of Windows 98/NT/ME/2000
drivers. SeaI/O provides the user with a consistent and straightforward API, allowing the
developer to concentrate on the details of the application as opposed to low level driver
development. Popular development environments, including Visual C++, Visual Basic, and
Delphi, are supported for application development. SeaI/O includes a utility for configuring the
driver parameters under Windows, further simplifying installation. Sample applications are
included to facilitate rapid application development.
Linux Software
The PIO-24.PCI ships with software for Linux, including a kernel-mode driver, API, and the
SeaIOTst diagnostic tool. The kernel-mode driver is provided as a module, so future driver
upgrades may be performed with minimal (usually zero) downtime. The Linux API is identical to
its Windows counterpart, facilitating quick and easy ports of existing SeaI/O-aware applications
to the Linux operating system. All source code for the Linux software suite is provided under
the GNU Public License (GPL v2.0), to assist in "roll-your-own"-type applications.

Technical Description
Sealevel Systems PIO-24.PCI Page 4
3rd Party Software Support
Third party software support for many HMI/MMI and other process control software is included
on the product installation CD. For the most up to date information on third party software
support, please visit http://www.sealevel.com/3rdpartysw.htm.

Technical Description
Sealevel Systems PIO-24.PCI Page 5
50 pin ribbon cable pin out
Figure 1-50 Pin Ribbon Cable Pin Out
Description Pin #
Port A
A0 47
A1 45
A2 43
A3 41
A4 39
A5 37
A6 35
A7 33
Port B
B0 31
B1 29
B2 27
B3 25
B4 23
B5 21
B6 19
B7 17
Port C
C0 15
C1 13
C2 11
C3 9
C4 7
C5 5
C6 3
C7 1
GND All Even pins
+5V 49

Technical Description
Sealevel Systems PIO-24.PCI Page 6
Electrical Characteristics
The table below provides the electrical characteristics of each Input/Output. Each port is
buffered with a 74LS245 octal bi-directional transceiver. Each input is capable of sinking up to
24 mA, while each output can source up to 15 mA.
Recommended Operating Conditions
Min Max
Input 0 V 5.25 V
Source 15 mA
Sink 24 mA
Electrical Characteristics
High Level Input Voltage Min 2 V
Low Level Input Voltage Max 0.8 V
High Level Output Voltage Min 2 V at 15 mA
Typically 3.4 V at 3 mA
Low Level Output Voltage Max 0.55 V at 24 mA
Figure 2-Electrical Characteristics

Technical Description
Sealevel Systems PIO-24.PCI Page 7
Pull Ups
Nine or ten pin bussed resistor packs are installed to provide pull-ups to the input ports. These
are installed on all ports. The pull-up resistor packs are rated at 10K ohms. Figure 3 below
provides the bussed resistor and corresponding port. The resistors insure that no line is floating
which is not connected. This provides consistent biasing on all un-terminated lines.
Bussed Corresponding
Resistor Port
RP1 Port A
RP2 Port B
RP3 Port C
Figure 3-Pull Up Resistors

Technical Description
Sealevel Systems PIO-24.PCI Page 8
Programming
Application Programmers Interface (API)
Most modern operating systems do not allow direct hardware access. The SeaIO driver and API
have been included to provide control over the hardware in Windows and Linux environments.
The purpose of this section of the manual is to help the customer with the mapping of the API to
the actual inputs for the PIO-24.PCI specifically. Complete documentation of the API can be
found in its accompanying help file.
Reading the Inputs:
The API presents the inputs as active low. If an input is driven high (2V to 5.25 V) it will read as a
logical zero (0), if driven low (0V to 0.8V) it will read as a logical one (1). If an input is not
driven it will read as a zero (0) due to the 10K ohm pull up resistors on each port.
Reading the Outputs:
The API returns the complement of value that is currently being used to drive the outputs. The
outputs cannot be read with relative addressing, absolute addressing must be used. Refer to
Relative Addressing vs. Absolute Addressingfor more information.
Presetting an Output Port:
Each port has an output register associated with it. This register may be written and retains its
value whether the port is configured as an input or an output. To preset the value of an output port
the program should write to the port when it is configured as an input then configure it as an
output. Inputs cannot be written to with relative addressing, absolute addressing must be used.
See Relative Addressing vs. Absolute Addressing below.
Writing the Outputs:
The outputs are active high. Writing a one (1) corresponds to 5V while writing a zero (0)
corresponds to 0V, at the output.
Interrupts:
Interrupt sampling can be set up in the API. Port A bit zero is the interrupt source(pin 47).
Refer to the API section in the SeaI/O help file for more detailed information.

Technical Description
Sealevel Systems PIO-24.PCI Page 9
Port C
Port C has the ability to be configured as two four bit ports. If both lower and upper nibbles are
configured the same then no special considerations need to be made. But if they are configured
differently, one nibble as input, and one as output then the user will have to keep this in mind.
Port C absolute addressing (when port C is split)
When reading, the input nibble will be returned on the corresponding upper or lower
nibble while the outputs will be returned on their corresponding upper or lower nibble.
When writing, the corresponding nibble will be written to the output nibble, while the
input nibble will have its output register written to. The output register can be written to
without affecting the inputs. These will be eight bit operations and it will up to the
programmer to keep track of the two four bit nibbles.
Port C relative addressing (when port C is split)
The input and output nibbles will each be treated as individual four bit ports.
Port Configuration:
Each eight-bit port can be configured as inputs or outputs. The API provides a set adapter state
call to access the control words. For this device, one control word is used.
Note: The control panel also allows you to configure the device. Your program can over ride the
control panel configuration when executed, but the control panel configuration will be the default
on power up. The default settings are based on the settings in the control panel application when
last changed and saved after re-booting.
Control Words
I/O Configuration
CWnD0 Port C1 lower nibble (bits 0-3) 1 = input 0 = output 1 on power up
CWnD1 Port B1 1 = input 0 = output 1 onpower up
CWnD2 0 or 1 (no effect)
CWnD3 Port C1 upper nibble (bits 4-7) 1 = input 0 = output 1 on power up
CWnD4 Port A1 1 = input 0 = output 1 on power up
CWnD5 0 or 1 (no effect)
CWnD6 0 or 1 (no effect)
CWnD7 Always a 1
Figure 4-Control Words

Technical Description
Sealevel Systems PIO-24.PCI Page 10
Relative Addressing vs. Absolute Addressing
The SeaIO API makes a distinction between “absolute” and “relative” addressing modes. In
absolute addressing mode, the Port argument to the API function acts as a simple byte offset
from the base I/O address of the device. For instance, Port #0 refers to the I/O address base + 0;
Port #1 refers to the I/O address base + 1.
Relative addressing mode, on the other hand, refers to input and output ports in a logical fashion.
With a Port argument of 0 and an API function meant to output data, the first (0th) output port on
the device will be utilized. Likewise, with a Port argument of 0 and an API function designed to
input data, the first (0th) input port of the device will be utilized.
In all addressing modes, port numbers are zero-indexed; that is, the first port is port #0, the
second port is #1, the third #2, and so on.

Technical Description
Sealevel Systems PIO-24.PCI Page 11
Tables 5-8 give the: API Port/bit reference numbers for Absolute and Relative Addressing
R = Read
W = Write
R/W = Read or Write
Port API Port # Absolute
Address (function)
A0 ( R/W )
B1 ( R/W )
C 2 ( R/W )
Figure 5-Absolute byte Address, (any configuration)
Port API Port # Relative Address
(function) Port Type
A0 ( R ) Input Port
B0 ( W ) Output Port
C 1 ( W ) Output Port
Figure 6-Relative Byte Address
Relative byte Address Given: Inputs A,
Outputs B, C
Port API Port # Relative Address
(function) Port Type
A0 ( R ) Input Port
B0 ( W ) Output Port
C Lower 1 ( W ) Output Port
C Upper 1 ( R ) Input Port
Figure 7-Relative Byte Address Continued
Relative byte Address Given: Inputs A, C Upper
Outputs B, C Lower

Technical Description
Sealevel Systems PIO-24.PCI Page 12
Addressing Continued
Figure 8-Relative Byte Address
Relative Address Given: Inputs A, C Upper
Outputs B, C Lower
API Bit # Absolute
Address (function) API Bit # Relative Address (function) Port Bit
0 ( R/w ) 0 ( R ) A0 -Input
1 ( R/w ) 1 ( R ) A1 -Input
2 ( R/w ) 2 ( R ) A2 -Input
3 ( R/w ) 3 ( R ) A3 -Input
4 ( R/w ) 4 ( R ) A4 -Input
5 ( R/w ) 5 ( R ) A5 -Input
6 ( R/w ) 6 ( R ) A6 -Input
7 ( R/w ) 7 ( R ) A7 -Input
8 ( R/w ) 0 ( W ) B0 -Output
9 ( R/w ) 1 ( W ) B1 -Output
10 ( R/w ) 2 ( W ) B2 -Output
11 ( R/w ) 3 ( W ) B3 -Output
12 ( R/w ) 4 ( W ) B4 -Output
13 ( R/w ) 5 ( W ) B5 -Output
14 ( R/w ) 6 ( W ) B6 -Output
15 ( R/w ) 7 ( W ) B7 -Output
16 ( R/W ) 8 ( W ) C0 -Output
17 ( R/W ) 9 ( W ) C1 -Output
18 ( R/W ) 10( W ) C2 -Output
19 ( R/W ) 11( W ) C3 -Output
20 ( R/W ) 8( R ) C4 -Input
21 ( R/W ) 9( R ) C5 -Input
22 ( R/W )10( R ) C6 -Input
23 ( R/W ) 11( R) C7 -Input

Technical Description
Sealevel Systems PIO-24.PCI Page 13
Direct Hardware Control
In systems where the users program has direct access to the hardware (DOS) the tables below
gives the mapping and functions that the PIO-24.PCI provide. The address of each eight-bit port
is calculated as shown in the table on the following page, the cards base address plus an offset.
Reading the Inputs:
The inputs are active high. If an input is driven high (2V to 5.25 V) it will read as a logical
one (1), if driven low (0V to 0.8V) it will read as a logical zero (0). If an input is not driven it will
read as a one due to the 10K ohm pull up resistors on each port.
Reading the Outputs:
The value that is currently being used to drive the outputs will be returned.
Presetting an Output Port:
Each port has an output register associated with it. This register may be written and retains its
value whether the port is configured as an input or an output. To preset the value of an output port
the program should write to the port when it is configured as an input then configure it as an
output.
Writing the Outputs:
The outputs are active high. Writing a one (1) corresponds to 5V while writing a zero (0)
corresponds to 0V, at the output.
Bit Set/Reset
Port C supports bit set/reset as shown in the tables below.
Port Configuration:
Each port can be configured as an input or an output by writing to its direction control bit, refer
to the tables below.
Interrupts
Interrupts can be set up as shown in the tables below. Port A1 bit zero is the interrupt source,
(pin 47).

Technical Description
Sealevel Systems PIO-24.PCI Page 14
Port C
Port C is written and read to as a single eight bit port, but it has the ability to be configured as
two four bit ports. If both lower and upper nibbles are configure the same then no special
considerations need to be made. But if they are configured differently, one nibble as input, and
one as output then the user will have to keep this in mind. When reading, the input will be
returned on the corresponding upper or lower nibble while the current outputs will be returned on
their corresponding upper or lower nibble. When writing, the corresponding nibble will be
written to the output nibble, while the input nibble will have its output register written to. The
output register can be written to without affecting the inputs.
Register Description (for direct hardware control)
Figure 9-Register Description
Address Port ID Mode D7 D6 D5 D4 D3 D2 D1 D0
Base+0 Port A R/W PAD7 PAD6
PAD5 PAD4 PAD3 PAD2 PAD1 PAD0
Base+1 Port B R/W PBD7 PBD6
PBD5 PBD4 PBD3 PBD2 PBD1 PBD0
Base+2 Port C R/W PCD7 PCD6
PCD5 PCD4 PCD3 PCD2 PCD1 PCD0
Base+3 Control Word Port WCWD7
00CWD4 CWD3 0CWD1 CWD0
Base+4 Int. Config. Port R/W 00000IRQEN
IRQC11 IRQC10
Base+5 Int. Status Port R0000000IRQST

Technical Description
Sealevel Systems PIO-24.PCI Page 15
Control Words
I/O Configuration
CWnD0 Port C1 lower nibble (bits 0-3) 1 = input 0 = output 1 on power up
CWnD1 Port B1 1 = input 0 = output 1 on power up
CWnD2 0 or 1 (no effect)
CWnD3 Port C1 upper nibble (bits 4-7) 1 = input 0 = output 1 on power up
CWnD4 Port A1 1 = input 0 = output 1 on power up
CWnD5 0 or 1 (no effect)
CWnD6 0 or 1 (no effect)
CWnD7 Always a 1
Figure 10-I/O Configuration
Control Word (X = 0) Hex Value Port Setup
76543210ABC Upper C Lower
1XX00X0080 Out Out Out Out
1XX00X0181 Out Out Out In
1XX00X1082 Out In Out Out
1XX00X1183 Out In Out In
1XX01X0088 Out Out In Out
1XX01X0189 Out Out In In
1XX01X108A Out In In Out
1XX01X118B Out In In In
1XX10X0090 In Out Out Out
1XX10X0191 In Out Out In
1XX10X1092 In In Out Out
1XX10X1193 In In Out In
1XX11X0098 In Out In Out
1XX11X0199 In Out In In
1XX11X109A In In In Out
1XX11X119B In In In In
Figure 11-Control Word, Port Setup

Technical Description
Sealevel Systems PIO-24.PCI Page 16
Bit Set or Reset Port C
CWD0 1= set to +5V 0 = Reset to GND
CWD4 0 or 1 (no effect)
CWD5 0 or 1 (no effect)
CWD6 0 or 1 (no effect)
CWD7 Always a zero when using Bit set/reset
Bit Select
CWnD3 CWnD2 CWnD1 C1 Bit
000= 0
001= 1
010= 2
011 = 3
100 = 4
101= 5
110= 6
111= 7
Control Word (X = 0) Hex Value Port C
76543210Bit
Reset
0XXX000000 0
0XXX001002 1
0XXX010004 2
0XXX011006 3
0XXX100008 4
0XXX10100A 5
0XXX11000C 6
0XXX11100E 7
Set
0XXX000101 0
0XXX001103 1
0XXX010105 2
0XXX011107 3
0XXX100109 4
0XXX10110B 5
0XXX11010D 6
0XXX11110F 7
Figure 12-Bit Set or Reset

Technical Description
Sealevel Systems PIO-24.PCI Page 17
Interrupt control
IRQENX interrupt enable 1 = enabled 0 = disabled ( 0 on power up )
IRQCX0
IRQCX1 Interrupt mode select see table
Interrupt mode select see table
Interrupt mode select table
IRQCX1 IRQCX0 INT Type
00Low level
01High level
10Falling edge
11Rising edge
Interrupt Read
Reading this port clears a pending interrupt
Figure 13-Interrupt Control Tables
IRQST1 (D0) Interrupt status 1 = interrupt pending, 0 = none
IRQST2 (D4) Interrupt status 1 = interrupt pending, 0 = none