Silicon Laboratories Si3482 SMART PSE-24 KIT User manual

Rev. 0.2 10/10 Copyright © 2010 by Silicon Laboratories Si3482 Smart PSE-24 UG
Si3482 Smart PSE-24 UG
Si3482 SMART PSE-24 KIT USER’SGUIDE
1. Introduction
The Si3482 power management controller works with Si3452 PSE controllers and enables the use of a smaller,
lower-cost, and more efficiently-utilized power supplies in managed or unmanaged Power over Ethernet (PoE)
Power Sourcing Equipment (PSE) with up to 48 ports and up to three parallel power supplies. The Smart PSE-24
kit demonstrates the use of the Si3482 in a 24-port system. Figure 1 shows the assembled kit.
Figure 1. Smart PSE-24 Kit


Si3482 Smart PSE-24 UG
2 Rev. 0.2
2. Smart PSE-24 Kit Contents
Table 1 lists the contents of the PSE-24 kit.
3. Using the Smart PSE-24 Kit
3.1. Hardware Configuration
The boards are connected as shown in Figure 1. A nominal 50 V power supply is connected to J815 (note the
polarity). For high-power support according to the IEEE standard, the supply voltage should be between 51 and
57 V. For normal power levels, the power supply can be 45 to 57 V. The total power supply wattage can be as high
as 720 W for full power on all ports. Effective evaluation can be done with a power supply of 40 W or more. Once
configured, the Si3482 manages the available power.
The large diode, D801, will be forward-biased in case of incorrect input polarity.
Note: It is recommended that the power supply be connected to the board and then turned on so as to
reduce large inrush current charging the (3) 33 µF filter capacitors on the board.
Table 2 lists the jumper settings.
Table 1. PSE-24 Kit Contents
1The SmartPSE24-RD, which includes the Si3482, six Si3452 PoE controllers, a –50 V to +3.3 V dc-to-dc converter based on a Si3500, isolation for UART communications, and an alternative SPI interface (the
SPI interface is not isolated).
2Two Si3402ISO-EVB powered device evaluation boards. The boards are configured to provide a Class 3
signature.
3One Si3402ISO-C4- EVB. This board is configured to supply a Class 4 signature. The Class 4 boards
are marked Class 4 and can also be identified by the diodes on the back of the board.
4 Three switchable loads. The switchable loads draw approximately 6.5, 13, or 19.5 W from the PSE.
5One 24-port connector board to bring the Si3452 power to Ethernet jacks. The connector board does not
have Ethernet data functionality.
6PoE USB adapter. This adapter supports USB to UART, SPI or I2C. It is generally used for UART with
the Smart PSE 24 Kit.
7 Three Ethernet cables, one USB cable, and two 24-wire ribbon cables.
Table 2. Jumper Settings
Jumper Logic Level Reason
JP7 1 Si3482 is not reset when the PoE USB adapter is removed.
JP8 1 JP8 selects UART or SPI interface. The PoE USB adapter board is generally
set for UART.
JP4, JP5, JP6 1,1,1 JP4, JP5, and JP6 set the UART baud rate. The PoE USB adapter is config-
ured for 115.2 kHz
JP9 0
JP 9 is for testing the power supply removal function for the third power sup-
ply. As will be discussed later, the power manager GUI can control the first
and second power supply lines. The status of the third power supply line is
reported but cannot be controlled. Generally, JP9 is set to 0 (power supply 3
not inserted).

Si3482 Smart PSE-24 UG
Rev. 0.2 3
3.2. Installing the PoE USB Adapter
Note: Before the PoE USB adapter is plugged in, the device driver should be installed.
To install the PoE USB adapter drivers, run PoEUSBSetup.exe from the supplied disk, and follow the instructions
including accepting the end user license agreement. The PoE USB adapter supplied with the Smart PSE-24 Kit
has been tested to be compatible with Windows XP®, Windows Vista®, and Windows 7®operating systems.
After successful installation, plug in the USB cable; the PoE USB device should be recognized. For Windows XP,
select “No not at this time” when Windows prompts to search for software, and select “Install the software
automatically” on the next screen. After successful installation, a PC reboot may be required.
4. Demonstration Use of the Power Manager GUI
The Silicon Labs power manager GUI is used to configure and observe the Smart PSE 24 via the supplied PoE
USB adapter. See the Si3452 Power Management GUI user’s guide for detailed installation instructions. Note that
once the Si3482 has been configured, it can run in hardware only mode without the GUI or PoE USB-to-UART
adapter.
The demonstration assumes the Power Manager GUI has been used to configure the Si3482 as follows:
40 W of power available on Power Supply 2. Set Power Supply 1 to zero for demonstration in the standalone
mode. This is because, in the standalone mode, the control line for Power Supply 1 status is low (disabled)
when the USB cable is unplugged.
Port 1 High Power (PoE+, 30 W) all other ports standard PoE (15.4 W)
Port 1 critical priority; all other ports low priority
Consumption-based power management
Retry after reconnect for overloads
Figure 2. Configuration Screen
Power Supply 2 inserted. Power Supply 1 can be inserted or not as its power capacity is set to zero. Power
Supply 3 should also display as not inserted if JP 9 is set low. Power Supply 3 cannot be controlled by the GUI
when using the Smart PSE 24 Kit because jumper JP9 sets the status.


Si3482 Smart PSE-24 UG
4 Rev. 0.2
Figure 3. Initial Status Screen
The Si3482 Smart Power 24 kit ships with three powered devices based on the Si3402 with loads for up to
approximately 19.5 W of input power. The loads are arranged as one to three 5 resistors, which draw 5 W each
at the PD output voltage of 5 V. Due to the PD input diode bridge and the dc-to-dc conversion efficiency, each
resistor causes approximately 6.5 W of power to be drawn from the PSE. This means that the PD will draw
approximately 6.5, 13, or 19.5 W from the PSE, depending on the number of load resistors connected.
Step 1: Connect a Class 3 PD with a 6.5 W load (switches off) into Port 1 and a Class 4 PD with a 6.5 W load into
Port 2.
The status window is shown in Figure 4.
Figure 4. Status Screen with Class 3 PD on Port 1 and Class 4 PD on Port 2



Si3482 Smart PSE-24 UG
Rev. 0.2 5
Since sufficient power is available, both ports are granted power. Because Port 2 was not enabled as PoE+, the
Class 4 PD is only granted 15.4 W.
Step 2: Disconnect the PDs from Step 1, and connect the Class 4 PD to Port 1 and Class 3 PDs to each of Ports 2
and 3. Initially, use a 6.5 W load on each PD.
All three ports are granted power. Port 1 is now granted 30 W since Port 1 is enabled for high power (PoE+). Since
only one resistor is connected, approximately 6.5 W is drawn on each port.
Figure 5. Status Screen with Class 4 PD on Port 1 and Class 3 PDs on Ports 2 and 3
Step 3: Increase the Load on the ports to create a port overload by switching in more load resistors.
For Port 2 or Port 3 (with Class 3 PDs), the port overload condition occurs with the three resistors, which
corresponds to about 19.5 W of input power. The following screen shot shows the result of an overload (indicated
by the status “blocked”) on Port 3.


Si3482 Smart PSE-24 UG
6 Rev. 0.2
Figure 6. Status Screen after an Overload on Port 3
To reset the port, decrease the load back to one resistor; unplug the PD, and plug it back in. This demonstrates
“retry after reconnect”.
For Port 1 (PoE+ port with Class 4 PD), the overload does not happen even with 19.5 W being drawn by the PD.
Note: Use caution because, in this case, the load resistors and PD will get hot.
Figure 7. Status Screen Showing Class 4 PD on Port 1 Drawing 19 W
Step 4: Demonstrate the port priority and system overload protection features.
Disconnect all PDs, and then connect the Class 3 PDs to Ports 2 and 3 with two load resistors so that they draw
13 W each (26 W total power).



Si3482 Smart PSE-24 UG
Rev. 0.2 7
Connect the Class 4 PD with three resistors (19.5 W) to Port 1. Port 1 is granted power, and a system-level
overload is created with approximately 45.5 W. Either Port 3 or Ports 2 and 3 will be turned off depending on
whether the Si3480 reported a severe overload (>44 W). Because the PDs have a soft start circuit, it is possible
that only Port 3 is turned off when the power exceeds 40 W. The ports that are turned off will not turn back on until
the load on Port 1 is reduced. This is because there is not enough power available to grant 15.4 W from the Class
3 PD.
Figure 8. Status Screen Showing Port 3 Denied Power Due to Insufficient Power Available
The Si3482 will manage power on all Si3452 devices to which it is connected. The number of Si3452 devices
connected is discovered upon power up. This means that the Si3482 can manage power on up to 48 ports.
Once configured, the Si3482 will continue to manage the power even when the host is disconnected. To
demonstrate this, exit the GUI, disconnect the PoE USB adapter, and repeat the above tests. While there is no
visual display, the behavior is the same. The PD status can be seen by looking at the LEDs on the Si3402
evaluation boards located on the RJ-45 connector. These LEDs glow steadily if power is supplied.
Note that, in the schematics shown in Figure 6, the Reset and Pgood2 signals are routed through an Si8423
isolator. The Si8423 default state is high so that, when the USB connector is removed, the Si3482 is not held in
reset, and Power Supply 2 is still configured as inserted. This is why Power Supply 2 was chosen to be inserted in
the above examples.
4.1. Easing Software Development with the Serial Packet Protocol SDK
A host MCU uses the Serial Packet Protocol (SPP) to communicate with an Si3482 Power Management Controller.
A Serial Packet Client in the host MCU implements the client side of the Serial Packet Protocol. The SPP Software
Development Kit (SDK) provides the source code for the Serial Packet Client, greatly reducing the software
development effort needed to use an Si3482.
The software included with this SMARTPSE24-KIT includes the SPP SDK and related documentation. Please refer
to that software as well as the Si3482 data sheet for further details on taking the next step in development with the
Si3482 power management controller.


Si3482 Smart PSE-24 UG
8 Rev. 0.2
4.2. Schematics
The following figures show the detailed schematics, BOM, and layout for the Si3482evaluation board.
PWR Status LED
INPUT POWER
SILABS DEBUG HEADER
CONNECTOR PIN DEFINITION
1 UART_RX 3 UART_TX 5 POE_DISABLE_PORTSn 7 I2C_SCL 9 I2C_SDA 11 POE_RESETn 13 SW_POWER_GOOD1 15 SW_POWER_GOOD2
2 POE_INTn 4 BRD_TYPE 6 +3V3 8 +3V3 10 GND 12 GND 14 GND 16 GND
CONTROL HEADER
UNISOLATED
BULK DECOUPLING
Connect to EGND at Mount Holes
Baud select
SPI/UART SELECT
SPI Non Iso
PS3
VOUT0 VOUT1 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 VOUT13 VOUT16 VOUT17
VOUT18
VOUT19 VOUT20 VOUT21 VOUT22 VOUT23
VIO
SCL1 RESETn
+1V1REG
+1V1REG SDA1
+1.24REG
RX_HOST TX_HOST
PGOOD1
PGOOD2
VOUT2 VOUT14 VOUT15
RESETn
INT1
RX
TX
RESETn_HOST
RESETn
+3V3
-52V
+3V3
+3V3
+3V3
-52V
+3V3
+3V3
-52V
+3V3
+3V3
-52V
-52V
+3V3
+3V3LV
+3V3LV
+3V3
+3V3LV
C819 0.1uF C819 0.1uF
R839 10K R839 10K
R805 1K R805 1K
R838 10K R838 10K
TPV804 TPV TPV804 TPV
R832 10K R832 10K
C817 680pF C817 680pF
C802
0.1uF
C802
0.1uF
R804
1K
R804
1K
TPV802 TPV TPV802 TPV
J4
HEADER 12x2
J4
HEADER 12x2
12 34 56 78 910
1112 1314 1516 1718 1920 2122 2324
R836 267 R836 267
U801 TLV431 U801 TLV431
R833
267
R833
267
SW1
SW PUSHBUTTON
SW1
SW PUSHBUTTON
+
C813 33uF
+
C813 33uF
C815 10uF C815 10uF
JP5
HEADER 1x3
JP5
HEADER 1x3
JP7
HEADER 1x3
JP7
HEADER 1x3
Isolation
RX
TX
RX_HOST TX_HOST
+3V3
GND
+3V3LV
EGND
RESETn_HOST RESETn PGOOD1_IN PGOOD2_IN
PGOOD1_OUT PGOOD2_OUT
R837 2.1K R837 2.1K
TPV805 TPV TPV805 TPV
TPV807 TPV TPV807 TPV
JP8
HEADER 1x3
JP8
HEADER 1x3
R834 2.1K R834 2.1K
TPV803 TPV TPV803 TPV
U802 Si3482 U802 Si3482
MISO
1
GND
3VDD 4
RST
5RSVD
6
RSVD 7 RSVD 8
MOSI
24
PSLCT 13
BAUD2 14
PS2 11
RSVD 9
PS3 10 PS1 12
SCL 17
NSS
23 BAUD1 15
BAUD0 16
SCK
2SDA 18
INT 19
RSVD 20
RX
21 TX 22
GND
EPAD
-52V
NI
-52V
NI
TPV808 TPV TPV808 TPV
R802 10K R802 10K
R14 1K R14 1K
VREG
-52V->+3.3V Converter
+3V3
+3V3_RTN-48V
-48V_RTN
J817 HEADER 5x2 J817 HEADER 5x2
1
122
3
344
5
566
7
788
9
910 10
C818 680pF C818 680pF
J5
HEADER 12x2
J5
HEADER 12x2
12 34 56 78 910
1112 1314 1516 1718 1920 2122 2324
JP6
HEADER 1x3
JP6
HEADER 1x3
J809
5X2 Shrouded Header
PSU Debug J809
5X2 Shrouded Header
PSU Debug
1
122
3
344
5
566
7
788
9
910 10
+
C814
33uF
+
C814
33uF
R840 10K R840 10K
J815 26-60-5080 J815 26-60-5080
1 2 3 4 5 6 7 8
R835 0 R835 0
R15 10K R15 10K
+3V3
NI
+3V3
NI
C816 0.1uF C816 0.1uF
TP803 GND TP803 GND
LineFeeds
+3V3
+3V3_RTN
-52V
VREF_IN RESET_L
VOUT1 VOUT2 VOUT3 VOUT4
VOUT19 VOUT20 VOUT10 VOUT21 VOUT11 VOUT22 VOUT12
VOUT5
VOUT23
VOUT6
VOUT13
VOUT7
VOUT14
VOUT8
VOUT15
VOUT9
VOUT16 VOUT17
VOUT0
VOIT18
SDA SCL INT
-52V_RTN
TPV806 TPV TPV806 TPV
D801
MBRS3100T3
D801
MBRS3100T3
+
C812 33uF
+
C812 33uF
R8301K R8301K
D803 GREEN
3.3V PWR
D803 GREEN
3.3V PWR
JP4
HEADER 1x3
JP4
HEADER 1x3
R841 332 R841 332
TP804 GND TP804 GND
C810 0.1uF C810 0.1uF
JP9
HEADER 1x3
JP9
HEADER 1x3
J816
HEADER 8x2
J816
HEADER 8x2
11
2
2
33
4
4
55
6
6
77
8
8
99
10
10
11 11 13 13 15 15
12
12
14
14
16
16
C803 4.7uF C803 4.7uF
Figure 9. Si3482 power manager and top level board schematic

Si3482 Smart PSE-24 UG
Rev. 0.2 9
Analog Signals
Board address
Address 0000 or 0001 Address 0100 or 0101
Address 1000 or 1001
Address 1010 or 1011
Address 1100 or 1101 Address 1110 or 1111
VREF_IN
VREF_IN VREF_IN
VREF_IN VREF_IN
VREF_IN VREF_IN
+3V3
+3V3_RTN
-52V
-52V_RTN
VREF_IN
RESET_L
INT
VOUT12 VOUT13 VOUT14 VOUT15 VOUT16 VOUT17 VOIT18 VOUT19
VOUT20 VOUT21 VOUT22 VOUT23
VOUT0 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7
VOUT8 VOUT9 VOUT10 VOUT11
SDA
SCL
-52V +3V3
+3V3
-52V
+3V3
+3V3
+3V3
-52V
+3V3+3V3
-52V
-52V
-52V
-52V
+3V3
+3V3
H4
Si3452
RESET_L
VREF_IN
+3V3+3V3_RTN
-52V
VOUT1 VOUT2 VOUT3 VOUT4
INT
SCL
SDA
-52V_RTN
AD0 AD1 AD2 AD3
H0
Si3452
RESET_L VREF_IN
+3V3+3V3_RTN
-52V
VOUT1 VOUT2 VOUT3 VOUT4
INT SCL SDA
-52V_RTN
AD0 AD1 AD2 AD3
H5
Si3452
RESET_L
VREF_IN
+3V3+3V3_RTN
-52V
VOUT1 VOUT2 VOUT3 VOUT4
INT
SCL
SDA
-52V_RTN
AD0 AD1 AD2 AD3
H2
Si3452
RESET_L VREF_IN
+3V3+3V3_RTN
-52V
VOUT1 VOUT2 VOUT3 VOUT4
INT SCL SDA
-52V_RTN
AD0 AD1 AD2 AD3
H3
Si3452
RESET_L
VREF_IN
+3V3+3V3_RTN
-52V
-52V_RTN
VOUT1 VOUT2 VOUT3 VOUT4
INT
SCL
SDA
AD0 AD1 AD2 AD3
H1
Si3452
RESET_L VREF_IN
+3V3+3V3_RTN
-52V
VOUT1 VOUT2 VOUT3 VOUT4
INT SCL SDA
-52V_RTN
AD0 AD1 AD2 AD3
R1 0 R1 0 R2 10K R2 10K
Figure 10. Si3452 PSE controller bank schematic

Si3482 Smart PSE-24 UG
10 Rev. 0.2
Figure 11. Si3452 PSE Schematic Detail
Address selection
VREF_IN
AD_3
INT
RESET
AD_0 AD_1 AD_2 AD_3
AD_0 AD_2 AD_1
DETP1 DETP2 DETP3 DETP4 VOUTP3 VOUTP1 VOUTP4 VOUTP2
VREF_IN
SCL SDA
+3V3
+3V3_RTN
-52V
-52V_RTN
VOUT1 VOUT2 VOUT3 VOUT4
INT
RESET_L
AD0 AD1 AD2 AD3
-52V
+3V3
-52V
-52V +3V3
-52V
R110 10K R110 10K
R126 44.2K R126 44.2K
C103 0.1uF C103 0.1uF
R108 10K R108 10K
C101 0.1uF C101 0.1uF
C102 0.1uF C102 0.1uF
C109 0.1uF C109 0.1uF
C116 0.1uF C116 0.1uF
C105 0.1uF C105 0.1uF
C104
0.1uF
C104
0.1uF
C111 0.1uF C111 0.1uF
R109 10K R109 10K
SI3452
Si3452
U100
SI3452
Si3452
U100
VEE1
1
IC 11
VEE
2
VREF_IN
3
AOUT
5
AGND
6
RBIAS
7
AGND
8
OSC
9
VEE4
10
VOUT4 12
DET4 13
GND34
15
DET3 18
VOUT3 20
VEE3
22
RST
23
AD3
24
AD1
27
AD2
25
AD0
28
DGND
29
VDD 19
VEE2
31
VOUT2 32
DET2 33
GND12
35
DET1 37
VOUT1 39
VEE
EPAD
AIN
4
AD0/SDA
14
AD2
26 AD1/SCL 16
AD3
21
NC 17
VDD 30
TX/AD0
34
RX/AD1
36
RST
38
INT
40
C107 0.1uF C107 0.1uF
R111 10K R111 10K
C114 0.1uF C114 0.1uF
C100 0.1uF C100 0.1uF

Si3482 Smart PSE-24 UG
Rev. 0.2 11
Isolated CircuitsNonIsolated Circuits
RX_HOST
TX_HOST
+3V3LV
EGND +3V3
GND
RESETn_HOST RESETn
PGOOD1_IN
PGOOD2_IN
PGOOD1_OUT
PGOOD2_OUT
RX TX
+3V3LV
+3V3
+3V3
+3V3
+3V3LV
+3V3LV
C8 1uF C8 1uF
C6 1uF C6 1uF
C5 1uF C5 1uF
C7 1uF C7 1uF
ISOLATION
U3 Si8423
ISOLATION
U3 Si8423
VDD1 1
VDD2 8
B2 6
GND1
4
A2
3
GND2
5
A1
2B1 7
ISOLATION
U2 Si8431
ISOLATION
U2 Si8431
VDD1 1
VDD2 16
GND2
9
GND1
8
GND1
2
GND2
15
A1
3
A2
4
B3 12
NC 11
A3
5
NC
6
B1 14 B2 13
EN1
7EN2 10
Figure 12. UART Isolator Circuitry

Si3482 Smart PSE-24 UG
12 Rev. 0.2
Optional short circuit protection.
+3V3
+3V3_RTN
-48V
-48V_RTN
+3V3
+3V3
+3V3
-52V
Vssa
Vssa
R150 5.6 R150 5.6
C160
4.7nF
C160
4.7nF
C153 1uF C153 1uF
C156 22uF C156 22uF
FB151
30 Ohm
FB151
30 Ohm
C158 0.1uF C158 0.1uF
Q1
MMBT3904
Q1
MMBT3904
R156
4.87K
R156
4.87K
L151 33uH L151 33uH
R153 30.1KR153 30.1K
+
C155 470uF
+
C155 470uF
C150 0.1uF C150 0.1uF
R155 2.87K R155 2.87K
C159
4.7nF
C159
4.7nF
D301 MBRS1100 D301 MBRS1100
R157 10K R157 10K
U152
Si3500
U152
Si3500
EROUT 1
SSFT 2
Vdd 3
ISOSSFT 4
NC
5
RDET
6
HSO
7
NC
8
Vneg
9
NC
10
NC
11
Vposf
12
NC
13
NC
14
Vssa 15
Vposs 16
VSS1 17
SWO 18
VSS2 19
FB 20
EPAD 21
C161 0.33uF C161 0.33uF
C152 1uF C152 1uF
VnegVneg
R151 25.5K R151 25.5K
C162 150pF C162 150pF
Figure 13. DC to DC converter

Si3482 Smart PSE-24 UG
Rev. 0.2 13
VOUT0 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7
RTN0 RTN1 RTN2 RTN3 RTN4 RTN5 RTN6 RTN7 RTN8 VOUT8 RTN9 RTN10 RTN11
VOUT9 VOUT10 VOUT11
VOUT12 VOUT13 VOUT14 VOUT15 VOUT16 VOUT17 VOUT18
RTN12 RTN13 RTN14 RTN15 RTN16 RTN17 RTN18 RTN19 RTN20 VOUT20 RTN21 RTN22 RTN23
VOUT21 VOUT22 VOUT23 VOUT19
RTN8 VOUT8
RTN9 VOUT9
RTN10 VOUT10
RTN11 VOUT11
RTN12 VOUT12
RTN13 VOUT13
RTN14 VOUT14
RTN15 VOUT15
RTN0 VOUT0
RTN1 VOUT1
RTN2 VOUT2
RTN3 VOUT3
RTN4 VOUT4
RTN5 VOUT5
RTN6 VOUT6
RTN7 VOUT7
RTN16 VOUT16
RTN17 VOUT17
RTN18 VOUT18
RTN19 VOUT19
RTN20 VOUT20
RTN21 VOUT21
RTN22 VOUT22
RTN23 VOUT23
J4
HEADER 12x2
J4
HEADER 12x2
1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24
J7E RJ-45 J7E RJ-45
MX0+
E1
MX0-
E2
MX1+
E3
MX2+
E4
MX2-
E5
MX1-
E6
MX3+
E7
MX3-
E8
J6D RJ-45 J6D RJ-45
MX0+
D1
MX0-
D2
MX1+
D3
MX2+
D4
MX2-
D5
MX1-
D6
MX3+
D7
MX3-
D8
J5C RJ-45 J5C RJ-45
MX0+
C1
MX0-
C2
MX1+
C3
MX2+
C4
MX2-
C5
MX1-
C6
MX3+
C7
MX3-
C8
J7G RJ-45 J7G RJ-45
MX0+
G1
MX0-
G2
MX1+
G3
MX2+
G4
MX2-
G5
MX1-
G6
MX3+
G7
MX3-
G8
J8
HEADER 12x2
J8
HEADER 12x2
1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24
J6F RJ-45 J6F RJ-45
MX0+
F1
MX0-
F2
MX1+
F3
MX2+
F4
MX2-
F5
MX1-
F6
MX3+
F7
MX3-
F8
J5E RJ-45 J5E RJ-45
MX0+
E1
MX0-
E2
MX1+
E3
MX2+
E4
MX2-
E5
MX1-
E6
MX3+
E7
MX3-
E8
J6H RJ-45 J6H RJ-45
MX0+
H1
MX0-
H2
MX1+
H3
MX2+
H4
MX2-
H5
MX1-
H6
MX3+
H7
MX3-
H8
J5G RJ-45 J5G RJ-45
MX0+
G1
MX0-
G2
MX1+
G3
MX2+
G4
MX2-
G5
MX1-
G6
MX3+
G7
MX3-
G8
J7B RJ-45 J7B RJ-45
MX0+
B1
MX0-
B2
MX1+
B3
MX2+
B4
MX2-
B5
MX1-
B6
MX3+
B7
MX3-
B8
J6A RJ-45 J6A RJ-45
MX0+
A1
MX0-
A2
MX1+
A3
MX2+
A4
MX2-
A5
MX1-
A6
MX3+
A7
MX3-
A8
J7D RJ-45 J7D RJ-45
MX0+
D1
MX0-
D2
MX1+
D3
MX2+
D4
MX2-
D5
MX1-
D6
MX3+
D7
MX3-
D8
J6C RJ-45 J6C RJ-45
MX0+
C1
MX0-
C2
MX1+
C3
MX2+
C4
MX2-
C5
MX1-
C6
MX3+
C7
MX3-
C8
J5B RJ-45 J5B RJ-45
MX0+
B1
MX0-
B2
MX1+
B3
MX2+
B4
MX2-
B5
MX1-
B6
MX3+
B7
MX3-
B8
J7F RJ-45 J7F RJ-45
MX0+
F1
MX0-
F2
MX1+
F3
MX2+
F4
MX2-
F5
MX1-
F6
MX3+
F7
MX3-
F8
J6E RJ-45 J6E RJ-45
MX0+
E1
MX0-
E2
MX1+
E3
MX2+
E4
MX2-
E5
MX1-
E6
MX3+
E7
MX3-
E8
J5D RJ-45 J5D RJ-45
MX0+
D1
MX0-
D2
MX1+
D3
MX2+
D4
MX2-
D5
MX1-
D6
MX3+
D7
MX3-
D8
J7H RJ-45 J7H RJ-45
MX0+
H1
MX0-
H2
MX1+
H3
MX2+
H4
MX2-
H5
MX1-
H6
MX3+
H7
MX3-
H8
J6G RJ-45 J6G RJ-45
MX0+
G1
MX0-
G2
MX1+
G3
MX2+
G4
MX2-
G5
MX1-
G6
MX3+
G7
MX3-
G8
J5F RJ-45 J5F RJ-45
MX0+
F1
MX0-
F2
MX1+
F3
MX2+
F4
MX2-
F5
MX1-
F6
MX3+
F7
MX3-
F8
J7A RJ-45 J7A RJ-45
MX0+
A1
MX0-
A2
MX1+
A3
MX2+
A4
MX2-
A5
MX1-
A6
MX3+
A7
MX3-
A8
J5H RJ-45 J5H RJ-45
MX0+
H1
MX0-
H2
MX1+
H3
MX2+
H4
MX2-
H5
MX1-
H6
MX3+
H7
MX3-
H8
J7C RJ-45 J7C RJ-45
MX0+
C1
MX0-
C2
MX1+
C3
MX2+
C4
MX2-
C5
MX1-
C6
MX3+
C7
MX3-
C8
J6B RJ-45 J6B RJ-45
MX0+
B1
MX0-
B2
MX1+
B3
MX2+
B4
MX2-
B5
MX1-
B6
MX3+
B7
MX3-
B8
J5A RJ-45 J5A RJ-45
MX0+
A1
MX0-
A2
MX1+
A3
MX2+
A4
MX2-
A5
MX1-
A6
MX3+
A7
MX3-
A8
Figure 14. RJ-45 Ethernet Cable Connector Board

Si3482 Smart PSE-24 UG
14 Rev. 0.2
4.3. Bill of Materials
Table 3. Si3482 Smart PSE-24 Bill of Materials
Item Qty Ref Value Rating Tol PCB Footprint Mfr Part # Mfr
1 4 C5,C6,C7,C8 1 µF ±20% C0805 C0805X7R160-105M Venkel
250
C100,C101,C102,
C103,C107,C109,
C111,C114,C150,
C200,C201,C202,
C203,C207,C209,
C211,C214,C300,
C301,C302,C303,
C307,C309,C311,
C314,C400,C401,
C402,C403,C407,
C409,C411,C414,
C500,C501,C502,
C503,C507,C509,
C511,C514,C600,
C601,C602,C603,
C607,C609,C611,
C614,C816
0.1 µF ±20% C0603 C0603X7R101-104M Venkel
320
C104,C105,C116,
C204,C205,C216,
C304,C305,C316,
C404,C405,C416,
C504,C505,C516,
C604,C605,C616,
C802,C810
0.1 µF ±20% C0603 C0603X7R160-104M Venkel
4 2 C152,C153 1 µF ±10% C1210 C1210X7R101-105K Venkel
5 1 C155 470 µF 45 m
ESR ±20% C7343D T495D477M006ATE0457280 Kemet
6 1 C156 22v ±20% C0805 C0805X5R6R3-226M Venkel
7 1 C158 0.1 µF ±10% C0603 C0603X7R250-104K Venkel
8 2 C159,C160 4.7 nF ±10% C0603 C0603X7R160-472K Venkel
9 1 C161 0.33 µF ±10% C0603 C0603X7R100-334K Venkel
10 1 C162 150 pF ±10% C0603 C0603X7R160-151K Venkel
11 1 C803 4.7 µF ±20% C1206 C1206X7R100-475M Venkel
12 3 C812,C813,C814 33 µF ±20% C3.5X8MM-RAD ECA2AM330 Panasonic
13 1 C815 10 µF ±20% C0603 C0603X5R6R3-106M Venkel
14 2 C817,C818 680 pF Y3 ±15% C1808 GA342QR7GD681KW01L MuRata
15 1 C819 0.1 µF ±20% C0805 C0805X7R160-104M Venkel
16 1 D301 MBRS1100 1 A DO-214AA MBRS1100T3 On Semi
17 1 D801 MBRS3100T3 3 A DO-214AB MBRS3100T3 On Semi
18 1 D803 GREEN 30 mA LED-0805-K LTST-C170GKT Lite_In Inc
19 1 FB151 30 1000 mA L0603 BLM18PG300SN1 MuRata
20 6 JP4,JP5,JP6,
JP7,JP8,JP9 HEADER 1x3 CONN-1X3 TSW-103-07-T-S Samtec
21 2 J4,J5 HEADER 12x2 CONN2X12-2MM TMM-112-01-T-D Samtec
22 1 J809 5X2 Shrouded
Header CONN2X5-4W 2510-6002UB 3M
23 1 J815 26-60-5080 CONN8NP0.156RA 26-60-5080 MOLEX

Si3482 Smart PSE-24 UG
Rev. 0.2 15
24 1 J816 HEADER 8x2 CONN2X8 TSW-108-07-S-D Samtec
25 1 J817 HEADER 5x2 CONN2X5 TSW-105-07-T-D Samtec
26 1 L151 33 µH 0.4 A ±20% IND-LPS4018 LPS4018-333ML Coilcraft
27 1 Q1 MMBT3904 200 mA SOT23-BEC MMBT3904 Fairchild
28 2 R1,R835 0 1 A R0603 CR0603-10W-000 Venkel
29 2 R2,R157 10 k1/10 W ±5% R0603 CR0603-10W-103J Venkel
30 4 R14,R804,
R805,R830 1k1/10 W ±1% R0603 CR0603-10W-1001F Venkel
31 30
R15,R108,R109,
R110,R111,R208,
R209,R210,R211,
R308,R309,R310,
R311,R408,R409,
R410,R411,R508,
R509,R510,R511,
R608,R609,R610,
R611,R802,R832,
R838,R839,R840
10 k1/10 W ±1% R0603 CR0603-10W-1002F Venkel
32 6 R126,R226,R326,
R426,R526,R626 44.2 k1/10 W ±1% R0603 CR0603-10W-4422F Venkel
33 1 R150 5.6 1/4 W ±5% R1210 CR1210-4W-5R6J Venkel
34 1 R151 25.5 k1/16 W ±1% R0603 CR0603-16W-2552F Venkel
35 1 R153 30.1 k1/16 W ±1% R0603 CR0603-16W-3012F Venkel
36 1 R155 2.87 k1/16 W ±1% R0603 CR0603-16W-2871F Venkel
37 1 R156 4.87 k1/16 W ±1% R0603 CR0603-16W-4871F Venkel
38 2 R833,R836 267 1/10 W ±1% R0603 CR0603-10W-2670F Venkel
39 2 R834,R837 2.1 1/16 W ±1% R0603 CR0603-16W-2101F Venkel
40 1 R841 332 1/10 W ±1% R0603 CR0603-10W-3320F Venkel
41 1 SW1 SW Pushbutton 50 mA SW4N6.5X4.5-PB 101-0161-EV Mountain
Switch
42 13
TPV100,TPV200,
TPV300,TPV400,
TPV500,TPV600,
TPV802,TPV803,
TPV804,TPV805,
TPV806,TPV807,
TPV808
TPV VIA-TP N/A N/A
43 1 TPV50x1 EPAD VIA-EPAD N/A N/A
44 1 TP17 RED Testpoint 151-207-RC Kobiconn
45 1 TP18 WHITE Testpoint 151-201-RC Kobiconn
46 2 TP803,TP804 BLACK Testpoint 151-203-RC Kobiconn
47 1 U1 Si8423 2500 VRMS SO8N6.0P1.27 Si8423AD-B-IS-1 SiLabs
48 1 U2 Si8431 2500 VRMS SO16N10.3P1.27 Si8431BB-C-IS SiLabs
49 6 U100,U200,U300,
U400,U500,U600 Si3452 QFN40N6X6P0.5 Si3452-A00-GM SiLabs
50 1 U152 Si3500 QFN20N5X5P0.8 Si3500-A-GM SiLabs
51 1 U801 TLV431 TLV431-DBZ TLV431BCDBZR TI
52 1 U802 Si3482 QFN20N4X4P0.5 Si3482 SiLabs
Table 3. Si3482 Smart PSE-24 Bill of Materials (Continued)
Item Qty Ref Value Rating Tol PCB Footprint Mfr Part # Mfr

Si3482 Smart PSE-24 UG
16 Rev. 0.2
4.4. Silkscreens
Figure 15. Smart PSE 24Silk Screen

Si3482 Smart PSE-24 UG
Rev. 0.2 17
Figure 16. Smart PSE 24 Top Layer

Si3482 Smart PSE-24 UG
18 Rev. 0.2
Figure 17. Smart PSE 24 Ground Layer

Si3482 Smart PSE-24 UG
Rev. 0.2 19
Figure 18. Smart PSE 24 Power Plane

Si3482 Smart PSE-24 UG
20 Rev. 0.2
Figure 19. Smart PSE 24 Secondary Side