
1-6 HDVF-EL70/HDVF-EL75
If signals are connected reversely, Q1402 is not activated and no current flows, preventing damage to
the unit.
If the UNREG_IN voltage drops about 1 V lower than the lower-limit operating voltage of this power
supply, the base of Q1401 turns low and Q1402 is turned off, preventing backflow.
To prevent transient burst and connection to a high-voltage battery outside the proper input voltage
range, the zener diode (TVS diode) D1402 prevents an overvoltage of up to about +24 V to be trans-
ferred to the subsequent circuit. If a voltage above +24 is input, the fuse F1401 is blown due to short-
circuit of the zener diode, activating the protection circuit.
. Input voltage monitoring circuit
The input voltage monitoring circuit in IC1403 supplies power to the DC/DC converters (IC1501,
IC1551, IC1601, IC1751, and IC1801) when the input voltage is in the proper range.
Power operates within an input voltage range of +9.5 V to +19.0 V when the rated input voltage range
of the unit is +10.5 V to +17.0 V. Once the power operates, the operating range extends to an input
voltage range of +8.5 V to +19.0 V. When the input voltage drops below +8.5 V or rises above +19.0 V,
Q1404 is turned off and the supply of UNREG_IN power voltage is shut off. The power voltage is not
supplied to UNREG_SW until it enters the proper voltage range.
. Power control circuit
A step-down switching regulator consisting of IC1501, IC1551, IC1601, IC1751, and IC1801 generates
voltages +5.0V_D0, +8.5V_P, +1.8V_D, +5.0V_A, and FAN_POWER based on the UNREG_SW
voltage supplied from the external circuit.
The +5.0V_D0 voltage is used for the digital circuit (+5.0V_D) and OLED (+5.0V_P), and is also used
as the first power voltage for the digital circuit. Based on this voltage, voltages +3.3V_D1 (+3.3V_D),
+1.0V_D, and +1.2V_D are generated by the step-down switching regulator (IC1651, IC451, and
IC802).
The +8.5V_P voltage is used for the OLED. The +8.5V_P and +5.0V_P voltages are supplied to the
OLED and are turned on and off by the control from the CPU through IC1452. These voltages are
monitored by IC1451. In the case of an abnormality, an alarm detection signal is sent through IC1452 to
the CPU.
The +1.8V_D digital voltage is used for the FPGA (IC401), Scaler (IC801), and DDR (IC1001,
IC1003). The DDR termination regulator IC1002 generates a VTT bus termination voltage of the DDR
memory.
The +5.0V_A voltage is used for the first-stage of the analog circuit. Based on this voltage, voltages
_5.0V_A, +3.3V_A, and +1.8V_A are generated for other analog circuits.
The _5.0V_A voltage is generated by the charge pump (IC1703) that outputs a negative voltage.
The +3.3V_A voltage is generated by the LDO (IC1702). Based on this voltage, a +1.8V_A voltage is
generated by the LDO (IC1704).
In addition, a +1.8V_AD voltage is generated based on the +3.3V_D1 voltage.
. Fan control
The FAN_POWER voltage for the fan is generated by IC1801. A fan mode is set from three modes (fan
stop, fan low, and fan high) by the control from the CPU through IC1452. In the case of a fan failure, an
alarm detection signal is sent to the CPU. IC1802 monitors the output voltage. When an abnormal
output voltage is detected, an alarm detection signal is sent to the CPU through IC1452. Upon receiving
this alarm signal, the CPU outputs a fan stop signal through IC1452 to deactivate IC1801.
To observe the predetermined startup sequence, each power voltage becomes active in the specified
sequence using the EN pin of each IC and load switches IC452, IC1502, and IC1602.