Sony CDX-MP50 User manual

1
Ver 1.0 2003. 02
Model Name Using Similar Mechanism CDX-MP40
CD Drive Mechanism Type MG-393MC-121
Optical Pick-up Name KSS-721A
SERVICE MANUAL
E Model
CDX-MP50
CD player section
Signal-to-noise ratio 90 dB
Frequency response 10 – 20,000 Hz
Wow and flutter Below measurable limit
Tuner section
FM
Tuning range FM tuning interval:
50 kHz/200 kHz switchable
87.5 – 108.0 MHz
(at 50 kHz step)
87.5 – 107.9 MHz
(at 200 kHz step)
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz/450 kHz
Usable sensitivity 9 dBf
Selectivity 75 dB at 400 kHz
Signal-to-noise ratio 67 dB (stereo),
69 dB (mono)
Harmonic distortion at 1 kHz
0.5% (stereo),
0.3% (mono)
Separation 35 dB at 1 kHz
Frequency response 30 – 15,000 Hz
AM
Tuning range AM tuning interval:
9 kHz/10 kHz switchable
531 – 1,602 kHz
(at 9 kHz step)
530 – 1,710 kHz
(at 10 kHz step)
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz/450 kHz
Sensitivity 30 µV
SPECIFICATIONS
Power amplifier section
Outputs Speaker outputs
(sure seal connectors)
Speaker impedance 4 – 8 ohms
Maximum power output 52 W ×4 (at 4 ohms)
General
Outputs Audio outputs (front/rear)
Power antenna relay control terminal
Power amplifier control terminal
Inputs TelephoneATT control terminal
BUS control input terminal
BUS audio input terminal
Remote controller input terminal
Antenna input terminal
Tone controls Low: ±10 dB at 60 Hz (XPLOD)
Mid: ±10 dB at 1 kHz (XPLOD)
High: ±10 dB at 10 kHz (XPLOD)
• The tuner and CD sections have no adjustments.
Sony Corporation
e Vehicle Company
Published by Sony Engineering Corporation
9-877-091-01
2003B0400-1
© 2003. 02
– Continued on next page –
FM/AM COMPACT DISC PLAYER

2
CDX-MP50
SAFETY-RELATED COMPONENT WARNING!!
COMPONENTS IDENTIFIED BY MARK 0OR DOTTED LINE
WITH MARK 0ON THE SCHEMATIC DIAGRAMS AND IN
THE PARTS LIST ARE CRITICAL TO SAFE OPERATION.
REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE
PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR
IN SUPPLEMENTS PUBLISHED BY SONY.
Power requirements 12 V DC car battery
(negative earth)
Dimensions Approx. 178 ×50 ×180 mm
(w/h/d)
Mounting dimensions Approx. 182 ×53 ×161 mm
(w/h/d)
Mass Approx. 1.2 kg
Supplied accessories Parts for installation and connections
Front panel case (1)
Card remote commander RM-X115
Note
This unit cannot be connected to a digital preamplifier or an equalizer
which is Sony BUS system compatible.
Design and specifications are subject to change without
notice.
NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK
OR BASE UNIT
The laser diode in the optical pick-up block may suffer electrostatic
breakdown because of the potential difference generated by the
charged electrostatic load, etc. on clothing and the human body.
During repair, pay attention to electrostatic breakdown and also use
the procedure in the printed matter which is included in the repair
parts.
The flexible board is easily damaged and should be handled with
care.
NOTES ON LASER DIODE EMISSION CHECK
The laser beam on this model is concentrated so as to be focused on
the disc reflective surface by the objective lens in the optical pick-
up block. Therefore, when checking the laser diode emission, ob-
serve from more than 30 cm away from the objective lens.
Notes on Chip Component Replacement
•Never reuse a disconnected chip component.
•Notice that the minus side of a tantalum capacitor may be dam-
aged by heat.
TEST DISCS
This set can playback CD-R and CD-ROM discs. The following
test discs should be used to check the capability:
CD-R test disc TCD-R082LMT (Part No. J-2502-063-1)
CD-RW test disc TCD-W082L (Part No. J-2502-063-2)
SERVICE NOTES
This label is located on the bottom of the chassis.
This label is located on the drive unit’s internal chassis.

3
CDX-MP50
Notes on CD-Rs (recordable CDs)/CD-RWs (rewritable
CDs)
This unit can play the following discs:
Type of discs Label on the disc
Audio CD
MP3 files
•Some CD-Rs/CD-RWs (depending on the equipment used for
its recording or the condition of the disc) may not play on this
unit.
•You cannot play a CD-R/CD-RW that is not finalized∗.
•You can play MP3 files recorded on CD-ROMs, CD-Rs, and
CD-RWs.
•A CD-R/CD-RW to which a session can be added can be played.
∗A process necessary for a recorded CD-R/CD-RW disc to be
played on the audio CD player.
EXTENSION CABLE AND SERVICE POSITION
Whenrepairingorservicingthisset,connectthejig(extensioncable)
as shown below.
•Connect the MAIN board (CNP701) and the SERVO board (CN1)
with the extension cable (Part No. J-2502-062-1).
•Connect the RELAY board (CNP902) and the DISPLAY board
(CN901) with the extension cable (Part No. J-2502-071-1).
MAIN BOARD CNP701
J-2502-071-1
SERVO BOARD CN1
RELAY BOARD CNP902
DISPLAY BOARD CN901

4
CDX-MP50
TABLE OF CONTENTS
1. GENERAL
Location of Controls................................................................ 5
Connections ............................................................................. 5
2. DISASSEMBLY
2-1. Sub Panel Assy (CD)........................................................... 7
2-2. CD Mechanism Block ......................................................... 8
2-3. Main Board ......................................................................... 8
2-4. Heat Sink ............................................................................. 9
2-5. Chassis (T) Sub Assy .......................................................... 9
2-6. Lever Section..................................................................... 10
2-7. Servo Board ....................................................................... 10
2-8. Shaft Roller Assy, Load Sw Board.................................... 11
2-9. Floating Block Assy .......................................................... 12
2-10. Optical Pick-up Block .......................................................12
3. DIAGRAMS
3-1. IC Pin Descriptions ...........................................................13
3-2. Circuit Boards Location .................................................... 18
3-3. Block Diagram –CD Section–........................................... 19
3-4. Block Diagram –Main Section–........................................ 20
3-5. Block Diagram –Display Section–.................................... 21
3-6. Printed Wiring Boards –CD Mechanism Section–............ 22
3-7. Schematic Diagram –CD Mechanism Section (1/2)– ....... 24
3-8. Schematic Diagram –CD Mechanism Section (2/2)– ....... 25
3-9. Printed Wiring Boards –Main Section– ............................ 26
3-10. Schematic Diagram –Main Section (1/2)– ........................ 27
3-11. Schematic Diagram –Main Section (2/2)– ........................ 28
3-12. Printed Wiring Board –Relay Section– ............................. 29
3-13. Printed Wiring Board –Display Section– .......................... 30
3-14. Schematic Diagram –Display Section–............................. 31
3-15. IC Block Diagrams............................................................ 32
4. EXPLODED VIEWS
4-1. Chassis Section ................................................................. 34
4-2. Front Panel Section ........................................................... 35
4-3. CD Mechanism Section (1) ............................................... 36
4-4. CD Mechanism Section (2) ............................................... 37
4-5. CD Mechanism Section (3) ............................................... 38
5. ELECTRICAL PARTS LIST ........................................ 39

5
CDX-MP50
SECTION 1
GENERAL This section is extracted
from instruction manual.
Connections

6
CDX-MP50

7
CDX-MP50
SECTION 2
DISASSEMBLY
Note : This set can be disassemble according to the following sequence.
Note : Follow the disassembly procedure in the numerical order given.
2-1. SUB PANEL ASSY (CD)
2-1. SUB PANEL ASSY (CD)
(Page 7)
2-2. CD MECHANISM BLOCK
(Page 8)
2-5. CHASSIS (T) SUB ASSY
(Page 9)
2-6. LEVER SECTION
(Page 10)
2-8. SHAFT ROLLER ASSY,
LOAD SW BOARD
(Page 11)
2-9. FLOATING BLOCK ASSY
(Page 12)
2-10. OPTICAL PICK-UP BLOCK
(Page 12)
SET
2-7. SERVO BOARD
(Page 10)
2-3. MAIN BOARD
(Page 8)
2-4. HEAT SINK
(Page 9)
4 CN802
5 sub panel assy (CD)
3 claws
2 claws
1 PTT 2.6x6

8
CDX-MP50
2-2. CD MECHANISM BLOCK
2-3. MAIN BOARD
1 PTT 2.6x6
6 PTT 2.6x
6
7 bracket (CD)
2 PTT 2.6x6
5 CD mechanism block
4 CNP701
3
1 PTT 2.6x8
2 PTT 2.6x
8
3 screw (+BTT)
4 screws (+BTT)
5 MAIN board

9
CDX-MP50
2-5. CHASSIS (T) SUB ASSY
2-4. HEAT SINK
1 PTT 2.6x8
2 PTT 2.6x8
5 PTT 2.6x
8
4 P 2.6x8
3 PTT 2.6x12
6 heat sink
1 Unsoldering three lead wires.
4 chassis (T) sub ass
y
black
SERVO board
(SIDE A)
red
white
2 P 2x3
3 P 2x3

10
CDX-MP50
2-6. LEVER SECTION
2-7. SERVO BOARD
4 two claws
1 special screw
7 lever (L)
6 lever (R)
3 tension spring (LR)
2 DISC IN SW board
5 guide (disc)
1 CN3
3 Removal the solders.
7 special screws
8 special screw
2 CN2
optical pick-up block
9 SERVO board
5 P2x3
6 loading motor assy
4 Unsolder the
lead wires.
black
yellow

11
CDX-MP50
2-8. SHAFT ROLLER ASSY, LOAD SW BOARD
• When installing, take note of the positions
arm (roller) and washers. (Fig. 1)
Fig. 1
1 tension spring (RA)
2 arm (roller)
3 retaining ring (RA)
4 shaft retainer (roller)
5 shaft roller assy
shaft retainer (roller) shaft retainer (roller)
retaining ring (RA) arm
arm
washer washer
6 special screw
7 LOAD SW board

12
CDX-MP50
2-9. FLOATING BLOCK ASSY
2-10. OPTICAL PICK-UP BLOCK
1 tension spring (KF1)
7 compression spring (FL)
8 compression spring (FL)
6 floating block assy
5 Turn loading ring in the
direction of the arrow.
4 Fit lever (D) in the direction of the arrow.
2 damper (T)
3 damper (T)
3 P 2x3
1 P 2x3
2 sled motor assy (M902)
5 optical pick-up (KSS-721A)
7 PICK-UP FLEXIBLE board
4 plate spring (feed)
6 shaft (feed) assy

13
CDX-MP50
3-1. IC PIN DESCRIPTIONS
• IC3 HD6432238RWN35TEI (CD MASTER CONTROL) (SERVO BOARD)
Pin No. Pin Name I/O Pin Description
1TEST I Test mode selection pin Not used. (Open)
2DECXRST O Reset signal output to the DSP IC “L”: reset
3DECSTBY O Standby mode control signal output to the DSP IC “H”: standby
4 – 7 NC O Not used. (Open)
8PH3 I CD PH3 photo sensor detection signal input Not used. (Open)
9INSW/PH2 I CD mechanism disc in switch detection signal input
10 LIMIT_SW I CD mechanism in-limit switch detection signal input
11 D_SW I CD mechanism down switch detection signal input
12 CVCC — System power supply pin (+3.3 V)
13 NC O Not used. (Open)
14 VSS — Ground pin
15 NC O Not used. (Open)
16 PH1 I CD PH1 photo sensor detection signal input Not used. (Open)
17 EJECT O CD mechanism loading motor control signal output (eject operation)
18 LOAD O CD mechanism loading motor control signal output (load operation)
19 – 26 NC O Not used. (Open)
27 FLAG I Correction unable detection signal input
28 RFOK I RFOK signal input from the servo IC
29, 30 NC O Not used. (Open)
31 TXD O UART TXD PC connection output Not used. (Open)
32 RXD I UART RXD PC connection input Not used. (Open)
33 XTALEN O Crystal oscillation control signal output to the servo IC
34 TSTB O CD text parameter strobe signal output to the servo IC
35 STB O Data strobe signal output to the servo IC
36 A0 O Command/parameter identification signal output to the servo IC
“L”: command, “H”: parameter
37 CD_RST O Reset signal output to the servo IC
38 PACK I CD text pack sync signal input from the servo IC
39 NC O Not used. (Open)
40 SELF_SW I CD mechanism self load position detection switch signal input
41 NC O Not used. (Open)
42 AVSS — Ground forA/D converter
43, 44 NC O Not used. (Open)
45, 46 NC I Not used. (Open)
47 KEY0 I Key switch signal input in the test mode Not used. (Open)
48 KEY1 I Mode switch signal input in the test mode Not used. (Open)
49 – 52 NC I Not used. (Open)
53 AVREF — Reference voltage for A/D converter
54 AVCC — Power supply for A/D converter
55 MD0 — CPU operation mode setting pin Connecting to +3.3 V in this set.
56 MD1 — CPU operation mode setting pin Connecting to +3.3 V in this set.
57 X1A — Sub clock oscillator terminal Not used. (Open)
58 X0A — Sub clock oscillator terminal Not used. (Open)
59 RSTX I Microcomputer reset signal input
60 NMI — Not used. (Fixed at “H”)
61 STBY — Not used. (Fixed at “H”)
62 VCC — Power supply pin (+3.3 V)
63 XTAL — Main clock oscillator pin (12.288 MHz)
64 VSS — Ground pin
65 XTEAL — Main clock oscillator pin (12.288 MHz)
66 FWE I Flash write enable signal input
SECTION 3
DIAGRAMS

14
CDX-MP50
Pin No. Pin Name I/O Pin Description
67 MD2 — CPU operation mode setting pin
68 FL_BOOT I Flash write selection signal input (“L”: flash write mode)
69 FL_W O Flash write control signal output connected to pin 66 (FWE)
70 NC O Not used. (Open)
71 CDMON O CD mechanism power supply control signal output
72 DECINT I Interrupt signal input from the DSP IC
73 CLOSE O Front panel operation request output (Close)
74 OPEN O Front panel oparation request output (Open)
75 LINKOFF O LINK OFF signal output for UNI_LINK “H”: link off, “L”: link on
76 UNI_SO O Sony-Bus serial data output to the bus interface
77 UNI_SI I Sony-Bus serial data input from the bus interface
78 UNI_CK I Sony-Bus serial clock input from the bus interface
79 NC O Not used. (Open)
80 SDA I/O I2C interface data input/output
81 SCL O I2C interface clock output
82 NC O Not used. (Open)
83 TSO O Serial data output to the servo IC
84 TSI I Serial data input from the servo IC
85 TSCK O Serial clock output to the servo IC
86 LEDDAT O LED data output for the jig
87 LEDCLK O LED clock output for the jig
88 LEDLAT O LED latch signal output for the jig
89, 90 NC O Not used. (Open)
91 BUSON I Sony-Bus BUS ON signal input from the bus interface
92 BUCHK I Back up power supply detection signal input
93 A-ATT O Audio muting control signal output
94 CDON O Power control signal output for the CD servo “H”: servo on, “L”: during loading
95 NC O Not used. (Open)
96 U/J_SEL I Destination setting pin
97 TEXTSEL I CD text function setting pin
98 NC O Not used. (Open)
99 CFSEL I Custom file function setting pin
100 DOUT SEL I Digital output selection setting pin “H”: digital output available

15
CDX-MP50
• IC5 CXD9684R-005 (DSP) (SERVO BOARD)
Pin No. Pin Name I/O Pin Description
1/RESET I Reset input pin “L”: reset
2MIMD I Microcomputer interface mode selection input “H”: I2C, “L”: TSB
3, 4 AD0, AD1 O External SRAM address signal output
5MIDIO (I2C_SDA) I/O Serial data input/output
6MICK (I2C_SCL) I Serial clock input
7AD2 O External SRAM address signal output
8VDDT (3.3V) — Power supply (3.3 V) for digital circuit
9SDO O Data output
10, 11 AD3, AD4 O External SRAM address signal output
12 SDI0 I Data input 0
13 BCKIA I Bit clock inputA
14 LRCKIA I LR clock input A
15 AD5 O External SRAM address signal output
16 CE O External SRAM chip enable signal output
17 OE O External SRAM output enable signal output
18 VDD (2.5V) — Power supply pin (2.5 V) for digital circuit
19 STANDBY I Standby mode control signal input “H”: STB, “L”: normal
20 VSS (2.5VGND) — Ground pin for digital circuit
21 VSSL (2.5VGND) — Ground pin for DAC Lch
22 VRAL — Reference voltage pin for DAC Lch
23 LO O DAC Lch signal output (Open)
24 VDAL (2.5V) — Power supply pin (2.5 V) for DAC Lch
25 VDAR (2.5V) — Power supply pin (2.5 V) for DAC Rch
26 RO O DAC Rch signal output (Open)
27 VRAR — Reference voltage pin for DAC Rch
28 VSSR (2.5VGND) — Ground pin for DAC Rch
29 TESTP I Pin for test “H”: test mode, “L”: normal (fixed at “L”)
30 CKS I VCO selection input “H”: VCO, “L”: X1 input
31 – 34 AD12 toAD9 O External SRAM address signal output
35 VDDT (3.3V) — Power supply pin (3.3 V) for digital circuit
36 – 38 AD8 to AD6 O External SRAM address signal output
39 REQ O Interrupt request signal output to the CD master control
40 VSS — Ground pin for digital circuit
41, 42 AD13, AD14 O External SRAM address signal output
43 WR O External SRAM write signal output
44, 45 AD16, AD15 O External SRAM address signal output
46, 47 IO0, IO1 I/O External SRAM data input/output
48 VSS — Ground pin for digital circuit
49 – 51 IO2 to IO4 I/O External SRAM data input/output
52 VDD (2.5V) — Power supply pin (2.5 V) for digital circuit
53 – 55 IO5 to IO7 I/O External SRAM data input/output
56 VSSP — Ground pin forVCO circuit
57 PDO O PLL phase error detection signal output
58 VCOI I VCO control voltage input
59 VDDP — Power supply pin for VCO circuit
60 XRDE I/O External clock input, audio clock output Not used. (Open)
61 VDDX (2.5V) — Power supply pin for oscillation circuit
62 XI I Resonator pin
63 XO O Resonator pin
64 VSSX — Ground pin for oscillation circuit

16
CDX-MP50
• IC801 MN101C49KSJ (SYSTEM CONTROL) (MAIN BOARD)
Pin No. Pin Name I/O Pin Description
1VREF– — Power supply pin for A/D converter
2VSM I S-meter voltage detection signal input from the tuner unit (TUX501)
3NIL I Not used. (Connected to ground.)
4KEYIN1 I Key signal input
5KEYIN0 I Key signal input
6RC_IN0 I Rotary commander key signal input from the remote-in jack
7QUALITY I Connected to ground.
8DST SEL I Destination setting pin
9NIL I Not used. (Connected to ground.)
10 VREF+ — Power supply pin for A/D converter
11 VDD — Power supply pin
12 OSCOUT O High speed clock output (18.43 MHz)
13 OSCIN I High speed clock input (18.43 MHz)
14 VSS — Ground pin
15 XIN I Low speed clock input (32.768 kHz)
16 XOUT O Low speed clock output (32.768 kHz)
17 MMOD — Memory mode selection input “L”: single chip mode (connected to ground)
18 LCDSO O Serial data output to the LCD driver
19 LCDCE O Chip enable signal output to the LCD driver
20 LCDCKO O Serial clock output to the LCD driver
21 – 23 NCO O Not used. (Open)
24 SYSRST O System reset signal output
25 BUSON O Bus on signal output to the bus interface
26 KEYACK I Key acknowledge detection signal input
27 DAVN (NIL) I Connected to ground.
28 BU_IN I Back up power supply detection signal input
29 SIRCS I Remote control signal input from the remote control receiver
30 TUATT IN I ATT control signal input from tuner unit.
31 NIL I Not used. (Connected to ground.)
32 NIH I Not used. (Connected to power supply.)
33 RESET I Microcomputer reset signal input from the reset IC
34 NOSE SW I Front panel with/without detection signal input “L”: panel with
35 BEEP O Beep signal output to the power amplifier
36 NCO O Not used. (Open)
37 TESTIN I Test mode detection signal input
38 ACCIN I Accessory power supply detection signal input
39 NCO O Not used. (Open)
40 TELATT I TEL ATT detection signal input
41 NIH I Fixed at “H”.
42 BUSSO O Sony_Bus serial data output to the bus interface IC
43 BUSSI I Sony_Bus serial data input from the bus interface IC
44 BUSCKO O Sony_Bus serial clock output to the bus interface IC
45 I2CSIO I/O I2C bus serial data input/output
46 NCO O Not used. (Open)
47 I2CCKO O I2C bus serial clock output
48 NCO O Not used. (Open)
49 NCO O Not used. (Open)
50 POW_ON O System power supply control signal output
51 – 66 NCO O Not used. (Open)
67 ATT O System ATT control signal output
68 NCO O Not used. (Open)

17
CDX-MP50
Pin No. Pin Name I/O Pin Description
69 TU ON O Tuner power supply control signal output
70 VOLATT O Electronic volumeATT control signal output to the electronic volume
71 NCO O Not used. (Open)
72 AMPON O Power amplifier standby control signal output to the power amplifier
73 NCO O Not used. (Open)
74 AMPATT O Power amplifier ATT control signal output to the power amplifier
75 DOORIND O Sub panel power supply control signal output
76 – 84 NCO O Not used. (Open)
85 NS MASK O Noise mask signal output
86 EE_CKO O EEPROM serial clock output
87 EE_SIO I/O EEPROM serial data input/output
88 TUATT O TunerATT signal output to the tuner unit
89, 90 NCO O Not used. (Open)
91 XKEYON O Power supply control signal to the function key
92 ILL ON O Illumination power supply control signal output
93 NCO O Not used. (Open)
94 DOORSW I Front panel open/close detection signal input “L”: close, “H”: open
95 DAVSS — Ground pin for D/A converter
96 NCO O Not used. (Open)
97 FLASH W I Flash write detection signal input
98 RC_IN1 I Remote commander shift key signal input from the remote-in jack “L”: shift key on
99 NCO O Not used. (Connected to ground.)
100 DAVDD — Power supply pin for D/A converter

18
CDX-MP50
3-2. CIRCUIT BOARDS LOCATION
MAIN board
SERVO board
LIMIT SW board
SPEAKER board
tuner unit
(TUX501)
RELAY board
DISC IN SW board
LOAD SW board
DISPLAY board

19 19
CDX-MP50
• R-ch is omitted due to
same as L-ch.
• Signal path
:CD
:CD-R/RW(MP3)
84
85
82
83
16
12
D/A
CONV
TRACKING
ERROR
FORCUS
ERROR
9
1
OSC
EFM
DEMOD
SERVO
CTL
RF
EQ
52
56
54
55
DSUB CODE
PROCESS
8
7
6
5
4
3
2
33
40
9
10
71
94
83
84
85
35
36
37
28
I/F
87
86
97
98
LD
DRIVE
Q1
FOCUS
COIL
DRIVE
TRACKING
COIL
DRIVE
SLED
MOTOR
DRIVE
SPINDLE
MOTOR
DRIVE
LOADING
MOTOR
DRIVE
6
5
23
2
15
16
17
18
13
14
11
12
9
10
26
62 63 64 65
17
18
59
Q913,914
CDM ON
SWITCH
Q915
CD ON
SWITCH
Q916,D927
CD+5V
REG
Q912,D926
CD DRIVE+6V
REG
M902
(SLED)
M901
(SPINDLE)
M903
(LOADING)
SW3
(DISC IN)
SW2
(SELF)
SW4
(LIMIT)
X1
16.9344MHz
X2
12.288MHz
OPTICAL PICK-UP
KSS-721A
I-V
CONV.
CDL
STB
AO
TSO
38 PACK
34 TSTB
TSI
27 FLAG
TSCK
CD_RST
RFOK
XTALEN
/RESET
STANDBY
REQ
MIDIO(I2C_SDA)
MICK(I2C_SCL)
X1
SDO
SDIO
BCKIA
LRCKIA
63 XTAL
65 EXTAL
INSW/PH2
11
SW5
(DOWN)
D_SW
SELF SW
LIMIT_SW
LOAD
EJECT
CDMON
CDON
R-CH
MAIN
SECTION
A
A-ATT
MAIN
SECTION
B
23 24
M
M
M
BATT
D925
LOUT
ROUT
PACK
TSTB
TSI
TSCK
SI
RFOK
FLAG
C16M
DIN
DECXRST
DECSTBY
DECINT
SDA
SCL
DOUT
SCKIN
SCKO
LRCKIN
LRCK
SO
SCK
STB
AO
XTALEN
RST
RSTX
92
BUCHK
91
BUSON
78
UNI CK
77
UNI_SI
76
UNI_SO
75
LINKOFF
BU CHK
BUSON
BUS-CLK
BUS-SI
BUS-SO
LINK-OFF
93
A-ATT
A
C
B
D
E
F
PD
LD
B
D
A
C
E
F
PD
A+5V
LD
APC
FCS-
FCS+
TRK+
TRK-
SL-
SL+
SP+
SP-
LD-
LD+
FOCUS
COIL
TRACKING
COIL
FD
TD
SD
MD
LOAD
EJECT
IC3
CD MASTER CONTROL
IC1
RF AMP,DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC2
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING MOTOR DRIVE
FD TD SD MD
A+5V
AU+5V
D+5V
DR+6V
38
28
29
30
31
32
33
34
62
9
12
13
14
2
3
72
80
1
19
39
5
816 41
2
IC12
IC5
DSP
IC7
5V 3.3V
17
3
14
12
7
16
18
6
8
13
4
2
515
911
SYSRST
MAIN
SECTION
C
MAIN
SECTION
D
21-23
25-29
20-13
3,2,31
1,12,4
11,7,10
46,47
49-51
53-55
3,4
7,10
11,15
38-36
34-31
41,42
45,44
32
30
5
16
17
43
OE
CS1 OE
CE
WR
WR
IO0-IO7
DQ1-DQ3,
IO4-IO8
AD0-AD16A0-A16
IC4
S-RAM
+2.5V
(IC5)
BU+3.3V
3+2.5V
REG 2
IC6
3-3. BLOCK DIAGRAM — CD SECTION —
(Page 20)
(Page 20)
(Page 20)
(Page 20)

2020
CDX-MP50
• R-ch is omitted due to same as L-ch.
• Signal path
:FM
:AM(MW/LW)
:CD
:CD-R/RW(MP3)
PJ601
(ANTENNA) 2 4
ANT L
CDL
3
R
6
S-METER
14
SDA
13
SCL
17
SDA(EEP)
16
SCL(EEP)
TUX501
TUNER UNIT
2
45
47
70
27
26
25
7
9
5
19
IC801 (1/2)
SYSTEM CONTROL
IC401
INPUT SELECTOR,
ELECTRONIC VOLUME,
SIGNAL PROCESSOR
AUX L
OUT LF
18
OUT LR
21
OUT RF
20
OUT RR
35
BEEP
ATT
72
67
AMP ON
74
AMP ATT
40
TEL ATT
38
ACC IN
CD L
RADIO L
R-CH
SDA
SCL
MUTE
VOL ATT
VSM
I2C SIO
I2C CKO
EE SIO
EE CKO
DST SEL
AUDIO OUT REAR
CD
SECTION
A
CD
SECTION
B
CD
SECTION
C
CD
SECTION
D
Q904,905
LINE MUTE
SWITCH
Q402
MUTE
R-CH
Q401
MUTE
22 MUTE
4STBY
16 AUX
11
12 5
3
9
7
IC501
POWER AMP
1
-1
-2
-5
-6
-3
-4
9
2
10
CNP901
R-CH
PJ401
FL+
FL-
RL+
RL-
4
12
FR+
FR-
3
11
RR+
RR-
16 +B (BATT)
13 ATT
5AMP R
6
8
19
ANT R
GND
R-CH
BATT
F901
10A
Q901
TEL
ATT
Q911,D918,919
TUNER +5V
REG
Q909,910
TUNER ON
SWITCH
Q906,D917
+8V REG
Q907,908
POWER ON
CONTROL
Q921
AMP REM
CONTROL
SWITCH
Q920
AMP B+
SWITCH
Q917
ANT REM
CONTROL
SWITCH
Q922
ANT B+
SWITCH
7ACC
15 TEST
69
50
TU ON
37
TEST IN
Q902
ACC
DETECT
POW ON
24
SYSRST
25
BUSON
43
BUSSI
44
BUSCKO
42
BUSSO
28
BU IN
86
87
7
TU MUTE
8
MUTE CONDITION
TU MUTE
TU ATT IN
30
88
BATT
Q804
BUS-SO
SWITCH Q805,806
LIMNKOFF
SWITCH
Q802
SWITCH
BATT
BATT
Q903,D916
+5V REG BATT
BU+5V
BU+3.3V
+8V
TUNER
+8V
TUNER
+5V
BATT
17
18
L
R
AUDIO OUT FRONT
R-CH
L
R
BUS AUDIO IN
R-CH
L
R
CDRR-CH 8CD R
IC803
BUS INTERFACE
8
13 RST
12 BUSON
8DATA OUT
11 CLK IN
9DATA IN
10 B/U-C
6
DATA I/O
4
CLK
2
RST
3
BATT
8
7
5
6
4
2
3
1
BATT
CNJ801
BUS
CONTROL IN
DELAY BATT
D921
1
BUSON
33 1 RESET
S801
RESET
2
IC802
3+3.3V
REG 2
IC902
BU+5V
RESET
SYSRST
D810
D808
D818
A-ATT D701
D802
D819
IC701
BUFFER
BU-CHECK
BUSON
BUS-SI
BUS-CLK
BUS-SO
LINK-OFF
26
53
71 Q801,D801
BATT DET
S803
(FREQUENCY SELECT)
FM 200k
AM 10K
FM 50k
AM 9K
3-4. BLOCK DIAGRAM — MAIN SECTION —
(Page 19)
(Page 19)
(Page 19)
(Page 19)