SpinCore Technologies PulseBlaster User manual

PulseBlaster
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PulseBlaster™, SpinCore, and the SpinCore Technologies, Inc. logos are trademarks of SpinCore Technologies, Inc. All other
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SpinCore Technologies, Inc. makes every effort to verify the correct operation of the equipment. This equipment version is not
intended for use in a system in which the failure of a SpinCore device will threaten the safety of equipment or person s).
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PulseBlaster
Table of Contents
I. Introduction .............................................................................................. 5
Product Overview ..................................................................................................... 5
Board Architecture ................................................................................................... 6
Block Diagram ..................................................................................................... 6
Key Features .............................................................................................................. 6
Output Signals ...................................................................................................... 6
Timing Characteristics .......................................................................................... 7
Instruction Set ....................................................................................................... 7
External Triggering ............................................................................................... 7
Status Read ack .................................................................................................. 7
Summary .............................................................................................................. 8
Specifications ............................................................................................................ 8
Pulse Parameters ................................................................................................. 8
Pulse Program Control Flow ................................................................................ 8
Note on Related Boards Compatible with this Manual ......................................... 8
II. Installation ............................................................................................... 9
Installing the PulseBlaster ....................................................................................... 9
Testing the PulseBlaster .......................................................................................... 9
III. Programming the PulseBlaster .......................................................... 12
The PulseBlaster Interpreter .................................................................................. 12
PulseBlaster.NET .................................................................................................... 13
LabVIEW Extensions ............................................................................................... 14
PulseBlaster MATLAB GUI ..................................................................................... 15
C/C++ Programming ................................................................................................ 16
IV. Connecting to the PulseBlaster Board .............................................. 18
Connector Information ............................................................................................ 18
General Pin Assignments ....................................................................................... 18
DB25 Bracket Connector Flag 0..15 - Pin Assignments .................................... 18
SMA Connector Clock_Out ................................................................................ 19
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PulseBlaster
SMA Connector Ext_Clk ..................................................................................... 19
SP17 and PCIe Boards Specific Pin Assignments .............................................. 2
Shrouded IDC Connector Flag0..11 - Pin Assignments ..................................... 20
Shrouded IDC Connector Flag12..23 - Pin Assignments .................................. 20
Shrouded IDC Connector Flag24..26 - Pin Assignments .................................. 21
Shrouded IDC Connector HW Trig/Reset .......................................................... 22
Clock Oscillator Header .......................................................................................... 24
Appendix I: Controlling the PulseBlaster with SpinAPI ........................ 25
Introduction .............................................................................................................. 25
Instruction Set Architecture ................................................................................... 25
Machine-Word Definition .................................................................................... 25
Breakdown of 80- it Instruction Word ................................................................ 25
About SpinAPI ......................................................................................................... 28
Using C Functions to Program the PulseBlaster ................................................. 28
Example Use of C Functions .............................................................................. 31
Appendix II: Sample C Program .............................................................. 32
Appendix III: Available Firmware Designs ............................................. 34
Related Products and Accessories ........................................................ 35
Contact Information ................................................................................. 39
Document Information Page .................................................................... 39
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PulseBlaster
I. Introduction
Product Overview
The PulseBlaster device is an intelligent pulse/word/pattern/delay generator producing up to 24
precisely timed, individually controlled digital output signals.
The intelligence of the PulseBlaster timing processor comes from an embedded
microprogrammed control core uPC). The PulseBlaster processor is able to execute instructions that
allow it to control program flow. This means that the PulseBlaster processor understands Operational
Control Codes, Op Codes, and will execute them much the same way as a general-purpose
microprocessor does. Unlike general-purpose processors, the PulseBlaster processor features a
highly optimized instruction set that has been specifically designed for timing applications. A unique
and distinguishing feature of the PulseBlaster processor is that the execution time of instructions is
user programmable. This feature makes the PulseBlaster capable of executing complex output
timing patterns at greatly varying update rates, ranging from nanoseconds to years, with a constant
setting accuracy of just one clock period e.g., a 10 ns setting accuracy at a 100 MHz clock
frequency).
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PulseBlaster
Board Architecture
Block Diagram
Figure 1 presents the general architecture of the PulseBlaster system. The major building blocks
are the SRAM memory both internal and external1 to the processor), the microcontroller uPC), the
integrated bus controller IBC), the counter, and the output buffers. The entire logic design, excluding
output buffers, is contained on a single silicon chip, making it a System-on-a-Chip design. User control
to the system is provided through the IBC over the peripheral component interconnect PCI) bus.
Figure 1: PulseBlaster board architecture. The clock oscillator signal is derived from an on-chip PLL circuit
typically using a 50 MHz on-board reference clock.
Key Features
Output Signals
The PulseBlaster PB24 models allow for 24 digital output signal lines. Sixteen output lines are
routed to a DB25 bracket-mounted connector. On the SP17 and the PCIe boards, all 24 output lines
are for routed to IDCs. The PB12 models allow for 12 digital output signal lines bits 0 to 11 as
describe in the Pin Assignments). The individually controlled digital output lines comply with the
transistor-transistor logic TTL) levels’ standard, and are capable of delivering up to ±25 mA per
bit/channel. The number of output channels and current output are dependent on the board and
firmware, so make sure to see Firmware Designs . If the load being driven is less than 132 Ohms, the
1 SP46 boards do not have external S AM.
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PCI Bus
PCI Bus

PulseBlaster
voltage will drop below the TTL limit of 3.3 V. If more current is required for lower loads, users can
boost power using the SpinCore TTL Line Driver.
Timing Characteristics
The PulseBlaster’s timing controller accepts an internal on-board) crystal oscillator up to 100
MHz. The innovative architecture of the timing controller allows the processing of either simple timed
instructions with delays of up to 232 or 4,294,967,296 clock cycles), or double-length timed
instructions up to 252 clock cycles long – nearly 2 years with a 100 MHz clock!). Regardless of the
type of instruction, the timing resolution remains constant for any delay – just one clock period e.g.,
10 ns at 100 MHz).
The core-timing controller has a minimum delay cycle of five clock periods for the PB12-100-4k
and PB24-100-4k and a minimum delay cycle of nine clock periods for PB24-100-32k and PB24-100-
64k. For a 100 MHz clock, this translates to a 50.0 ns pulse/delay/update for the PB12-100-4k and
PB24-100-4k models, and a 90.0 ns pulse/delay/update for the PB24-100-32k and PB24-100-64k
models.
Instruction Set
The PulseBlaster’s design features a set of commands for highly flexible program flow control.
The micro-programmed controller allows for programs to include branches, subroutines, and loops at
up to 8 nested levels – all this to assist the user in creating dense pulse programs that cycle through
repetitious events, especially useful in numerous multidimensional spectroscopy and imaging
applications.
External Triggering
The PulseBlaster can be triggered and/or reset externally via dedicated hardware lines. These
lines combine the convenience of triggering e.g., in cardiac gating) with the safety of the "stop/reset"
line.
Status Readback
The status of the pulse program can be read in hardware or software. The hardware status
output signals consist of five IDC connector pins labeled “Status”. The same output can be read
through software using C. See Section IV Connecting to the PulseBlaster Board, page 18) for more
detail about the hardware lines and Appendix I Controlling the PulseBlaster with SpinAPI, page 25)
for more detail about the C function pb_read_status ).
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PulseBlaster
Summary
The PulseBlaster is a versatile, high-performance, programmable pulse/pattern TTL signal
generator operating at speeds of 100 MHz or more!) and capable of generating
pulses/delays/intervals ranging from 50 ns to two years per instruction. It is connected via PCI or
PCIe port and can accommodate pulse programs with highly flexible control commands of up to 64k
i.e., 65,536) program words Model PB24-100-64k). Its high-current output logic bits are individually
controlled with a voltage of 3.3 V.
Specifications
Pulse Parameters
•Up to 24 individually controlled digital output lines TTL levels, 3.3 V logical “one”)
•Variable pulses/delays for every TTL line
•Up to 25 mA output current per TTL line depends on board and firmware, see Firmware Designs )
•50 ns shortest pulse/interval for internal memory models: PB12-100-4k and PB24-100-4k
•90 ns shortest pulse/interval for external memory models: PB24-100-32k, PB24-100-64k
•2 years longest pulse/interval at 100 MHz, with the use of the “Long Delay” instruction)
•10 ns pulse/interval resolution at 100 MHz)
•Up to 64k pulse program memory words/instructions Model PB24-100-64k)
•External triggering and reset – TTL levels
Pulse Program Control low
•Loops, nested 8 levels deep
•20 bit loop counters max. 1,048,576 repetitions)
•Subroutines, nested 8 levels deep
•Latency after trigger WAIT state) – 8 clock cycle latency 80 ns at 100 MHz), adjustable to 40
seconds in duration
•5 MHz max. re-triggering frequency at 100 MHz clock frequency)
Note on Related Boards Compatible with this Manual
Much of the programming information provided in this manual is nearly universal to SpinCore's
lines of boards. More complex boards such as the PulseBlasterESR, PulseBlaster-DDS, and
RadioProcessor lines of boards still rely on the same PulseBlaster core for TTL pulse generation.
Therefore, the basic example programs for the PulseBlaster will be able to produce the same results
on any of the more complex boards. The exception is the PulseBlaster-DDS-II board which uses a
96-Bit or 124-Bit instruction word, depending on the firmware, instead of an 80-Bit instruction word
and is currently not compatible with PulseBlaster methods of programming the board.
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PulseBlaster
II. Installation
Installing the PulseBlaster
Whenever installing or uninstalling the PulseBlaster, always have it disconnected from the
computer initially. Uninstall any previous version of SpinAPI.
1. Install the latest version of SpinAPI found at: http://www.spincore.com/support/spinapi/ .
•SpinAPI is a custom Application Programming Interface developed by SpinCore
Technologies, Inc. for use with the PulseBlaster and most of SpinCore's other products. It
can be utilized using C/C++ or graphically using the options in the next section below. The
API will also install the necessary drivers.
2. Shut down the computer, unplug the power cord, insert the PulseBlaster card into an appropriate
slot PCI for PCI boards and PCIe for PCIe boards) and fasten the PC bracket securely with a
screw.
3. Plug the power cord back in, turn on the computer and follow the installation prompts.
Testing the PulseBlaster
The simplest way to test whether the PulseBlaster has been installed properly and can be
controlled as intended is to run a simple test program. These example files can be found in the
PulseBlaster24 folder in the examples folder of the SpinAPI.
The pb24_ex1.exe program will produce a square wave, on all digital outputs, with a logical
high time of 200 ms and logical low time of 200 ms. To test the board, run pb24_ex1.exe and
observe each digital output with an oscilloscope.
If using a high input impedance oscilloscope to monitor the PulseBlaster's output, place a
resistor that matches the characteristic impedance of the transmission line in parallel with the coaxial
transmission line at the oscilloscope input. e.g., a 50 Ω resistor with a 50 Ω transmission line, see
Figures 2 and 3 below).
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PulseBlaster
Figure 4 below shows a typical pattern displayed by an oscilloscope when running pb24_ex1.exe with
the above described connections. Verifying this behavior confirms the board is installed properly.
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Figure 2: Left: BNC T-Adapter and Right: BNC 50 Ohm resistor.
Figure 4: Expected signal from a PulseBlaster output running pb24_ex1.exe.
Figure 3: BNC T-Adapter on the oscilloscope input channel with coaxial transmission line
connected on the left and BNC 50 Ohm resistor connected to the right to terminate the line.

PulseBlaster
You may also run the remaining example programs available for this board to observe different
output patterns and pulse durations. Keep in mind that pb24_programmable_clock.exe is only
compatible with PulseBlasters with the programmable clock feature which is available upon request.
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PulseBlaster
III. Programming the PulseBlaster
There are several ways of programming the PulseBlaster board. In this section, the PulseBlaster
Interpreter, LabVIEW extensions, .NET GUI, MATLAB GUI, and C/C++ methods of programming will
be introduced. In addition to these, the PulseBlaster is programmable using nearly any higher level
programming software that lets you utilize a C language API package, in this case SpinCore's
SpinAPI.
The PulseBlaster Interpreter
The PulseBlaster board is programmable via the PulseBlaster Interpreter, a programming utility
provided by SpinCore for writing pulse programs. This easy-to-use editor allows you to create, edit,
save and run your pulse sequence. Figure 5, below, shows the PulseBlaster Interpreter being used
with one of the example programs.
The PulseBlaster Interpreter is available for download on the SpinCore website and can be found
in the following location: http://www.spincore.com/support/SPBI/Interpreter_Main.shtml.
Example programs, such as the one above, are installed to
C:\SpinCore\SpinAPI\interpreter\examples by default. For convenience, a shortcut to the
PulseBlaster Interpreter will be added to your desktop. For more information on programming using
the PulseBlaster Interpreter, see the manual located at http://www.spincore.com/support/SPBI/Doc/ .
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Figure 5: Graphical Interface of the PulseBlaster Interpreter. The example shown creates
a pulse that toggles all TTL bits on for 100 ms, and all off for 500 ms.

PulseBlaster
PulseBlaster.NET
PulseBlaster.NET is a graphical interface for creating pulse programs and loading them to the
PulseBlaster board. PulseBlaster.NET currently provides the simplest interface possible to pulse
control. Figure 6 shows an example instance of the program.
PulseBlaster.NET is available on the web from http://www.spincore.com/support/net/.
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Figure 6: An example pulse program in PulseBlaster.NET. This example creates a pulse that has all TTL bits on for
100 ms, alternating bits on for 400 ms looping three times), and then all bits off for 100 ms.

PulseBlaster
LabVIEW Extensions
The SpinCore PulseBlaster LabVIEW Extensions PBLV) provide the ability to program and control
the functionality of PulseBlaster boards using the simple National Instruments NI) LabVIEW
graphical programming interface. The package contains basic subVIs, that can be used to include
PulseBlaster interaction from your own LabVIEW programs, as well as some complete example VIs.
Additionally, all of the examples are available as stand-alone applications, so that no programming is
necessary for use.
There are two versions of the LabVIEW extensions available, free of charge, on SpinCore's
website. The first is for those who do not have LabVIEW or who are not familiar with LabVIEW
programming. This option is a stand-alone GUI see Figure 7 above) that comes in executable form
and utilizes the LabVIEW runtime environment. The second is for those who have LabVIEW and
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Figure 7: Example of PulseBlaster LabVIEW Extensions User
Interface. The example shown has three instructions that toggle
TTL bit 1 on for 200 ms and off for 200 ms.

PulseBlaster
would like to make a custom interface for the PulseBlaster board. For more information and
downloads please visit:
http://www.spincore.com/support/PBLV/TTL.shtml
PulseBlaster MATLAB GUI
PulseBlaster MATLAB GUI is a graphical interface for creating pulse programs and loading them
to the PulseBlaster board. PulseBlaster MATLAB GUI currently provides the simplest interface
possible to pulse control. Figure 8 shows an example instance of the program.
PulseBlaster MATLAB GUI is available at:
http://spincore.com/support/PulseBlasterMATLABGUI/pbmgui_main.shtml
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Figure 8: An example pulse program in PulseBlaster MATLAB GUI.

PulseBlaster
C/C++ Programming
The most dynamic and flexible way to program the PulseBlaster board is with C/C++ using the
SpinAPI package. While GUI's are easier to use, coding in C/C++ allows you to better utilize all
features of the board, and in some cases it may be easier to copy and paste lines of code than to
make 100 instructions on a GUI. The instructions to compile on Windows can be found at
http://www.spincore.com/support/spinapi/Windows_Help.shtml. After configuring the compiler,
changing one of our example programs and recompiling the executable file for use with your
PulseBlaster board is as easy as clicking “Rebuild All” see Figure 9 below).
Making changes to an example program requires understanding of only a few lines of code. The
most important is the following line from pb24_ex1.c found in
C:\SpinCore\SpinAPI\examples\PulseBlaster24 if the examples were installed in the default
directory):
pb_inst(0xFFFFFF, CONTINUE, 0, 200.0*ms);
This line of code produces a high output on all the TTL bits lasting for 200 ms and then continues
on to the next instruction. This is accomplished using the four parameters in the function call
parameters are located between parentheses and are separated by commas).
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Figure 9: Compiling a C program to run the PulseBlaster board is easy!

PulseBlaster
•The first is the hexadecimal 0xFFFFFF which corresponds to setting the 24 output bits to a
logical high since it translates to a binary string of 24 1's.
•The second parameter is CONTINUE which means to proceed on to the next instruction after
this one completes. Other examples for what this parameter could be are BRANCH or
LOOP.
•The third parameter is the instruction data field which, for a CONTINUE instruction, is ignored
because it is unnecessary for that particular instruction. In the event of another instruction,
such as BRANCH, this parameter would correspond to the target of the BRANCH instruction.
•The fourth parameter is 200.0*ms which means that this instruction will last for 200 ms.
A simple program to generate a square wave signal on all 24 output bits will have two intervals as
in the GUI Interpreter described earlier), as shown below:
start= pb_inst(0xFFFFFF, CONTINUE, 0, 200.0*ms);
pb_inst(0x000000, BR NCH, start, 200.0*ms);
The first line of the code above corresponds to the logical "one” on all output bits. The second line
corresponds to the logical "zero," after which the program branches jumps) back to the beginning,
thus resulting in a continuous generation of a square wave on all outputs.
A complete C program will have, in addition to the two lines above, the initialization section, the
closing section and, optionally, the software) trigger to start the execution immediately upon launch
of the program. For more detailed information on programming the board using C/C++, see the
appendices.
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PulseBlaster
IV. Connecting to the PulseBlaster Board
Connector Information
On the SP17 board, the Clock_Out and Ext_Clk are SMA connectors, Flag0..15 is a DB-25 connector,
Flag0..11, Flag12..23, Flag24..26 and HW Trig/Reset are shrouded IDC header connectors. Other versions of
the board may exist, but main connector features are typically preserved.
General Pin Assignments
DB25 Bracket Connector lag 0..15 - Pin Assignments
Outputs 16 TTL signals generated by the user’s program. Please consult the table below for bit
assignments.
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Figure 1 : Sketch of PulseBlaster, Board Version SP17

PulseBlaster
Pin Assignments
Pin# Bit# Pin# Bit#
1 GND 14 GND
2 Bit 15 15 Bit 14
3 GND 16 Bit 13
4 Bit 12 17 GND
5 Bit 11 18 Bit 10
6 GND 19 Bit 9
7 Bit 8 20 GND
8 Bit 7 21 Bit 6
9 GND 22 Bit 5
10 Bit 4 23 GND
11 Bit 3 24 Bit 2
12 GND 25 Bit 1
13 Bit 0
Table 1: Lower 16 output bits and 9 ground lines on the bracket-mounted DB25 connector.
SMA Connector Clock_Out
This SMA connector outputs the reference clock as a 3.3 V TTL signal, i.e., it generates positive-
only voltage. Note that the PulseBlaster PCI and PCIe boards use 50 MHz as the reference clock
frequency and that clock is internally multiplied to provide that actual PulseBlaster Core frequency2.
The output resembles a square wave if properly terminated. This signal can be measured with an
oscilloscope using either a high impedance probe at the SMA connector or a 50 ohm coaxial line that
is terminated.
SMA Connector Ext_Clk
This SMA connector can be used to input an external clock signal. Extreme care should be
exercised, and certain conditions have to be met prior to using this connector. First, before attaching
any external clock source, the internal clock oscillator must be removed from its socket. The internal
clock oscillator’s orientation should be noted - if the internal clock is reconnected, it must be inserted in
the same orientation or board damage may occur. Second, the external clock signal must be 3.3 V
TTL, i.e., a positive-only voltage - any negative voltage at the Ext_Clk connector will damage the
programmable-logic processor chip. Third, the Ext_Clk connector for certain boards is not terminated
on the printed circuit board, and a 50 ohm terminating resistor should be used externally via a T
connector placed directly at the SMA Ext_Clk connector. If the Ext_Clk is terminated, there will be a
50 ohm resistor on one the Ext_Clk pads: R401 pads for SP2 board, R200 pads for SP17 board, or
R001 for PCIe boards. Soldering a 50 ohm resistor to these pads, if not already populated, is an
alternative to using a T connector with a 50 ohm resistor.
2 Custom firmware may use a different speed reference clock and may not be internally multiplied.
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PulseBlaster
SP17 and PCIe Boards Specific Pin Assignments
Shrouded IDC Connector lag0..11 - Pin Assignments
The shrouded IDC connector labeled Flag 0..11 outputs TTL signals generated by the user’s
program. Please consult the table below for pin assignments.
Pin Assignments
Pin# Pin#
1 Bit 0 13 Bit 6
2 GND 14 GND
3 Bit 1 15 Bit 7
4 GND 16 GND
5 Bit 2 17 Bit 8
6 GND 18 GND
7 Bit 3 19 Bit 9
8 GND 20 GND
9 Bit 4 21 Bit 10
10 GND 22 GND
11 Bit 5 23 Bit 11
12 GND 24 GND
Table 2: Lower 12 output bits and 12 ground lines on the 24 pin IDC connector.
The shrouded IDC connector labeled Flag 0..11 can be connected to IDC-MMCX adapter boards
Figure 17, page 36) which allow the use of MMCX cables. This enables the individual bits of the
PulseBlaster to be more easily accessed. Pin 1 on the MMCX adapter board can identified with a
square pin.
Shrouded IDC Connector lag12..23 - Pin Assignments
The shrouded IDC connector labeled Flag 12..23 outputs TTL signals generated by the user’s
program. Please consult the table below for pin assignments.
The shrouded IDC connector labeled Flag 12..23 can be connected to IDC-MMCX adapter
boards Figure 17, page 36) which allows the use of MMCX cables. This enables the individual bits of
the PulseBlaster to be more easily accessed. Pin 1 on the MMCX adapter board can identified with a
square pin.
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