Stollmann BlueMod+C11/G2 Series Application guide

BlueMod+C11/G2
Hardware Reference
Release r09

BlueMod+C11/G2
Hardware Reference
Release r09 www.stollmann.de Page 2 of 54
Note
This product was developed for the purpose of communication. It is intended solely
for our clients for integration into their own technical products after careful examina-
tion by experienced technical personnel for its suitability for the intended purpose.
The product was not developed for or intended for use in any specific customer ap-
plication. It may have to be adapted to the specific intended modalities of use or
even replaced by other components in order to ensure flawless function in the re-
spective areas of application. Performance data (range, power requirements, foot-
print, etc.) may depend on the operating environment, the area of application, the
configuration, and method of control, as well as on other conditions of use; these
may deviate from the technical specifications, the Design Guide specifications, or
other product documentation. The actual performance characteristics can be deter-
mined only by measurements subsequent to integration in the target environment.
Variations in the performance data of mass-produced devices may occur due to
individual differences between such devices. Product samples were tested in a ref-
erence environment for compliance with the legal requirements applicable to the
reference environment. No representation is made regarding the compliance with
legal, regulatory, or other requirements in other environments. No representation
can be made and no warranty can be assumed regarding the suitability of the prod-
uct for a specific purpose. Stollmann reserves the right to make changes to the
product without prior notice or to replace the product with a successor model. Of
course, any changes to the product for which we have entered into a supply agree-
ment with our customers will be made only if, and only to the extent that, such
changes can reasonably be expected to be acceptable to our customers. No general
commitment will be made regarding periods of availability; these must be subject to
individual agreement. All agreements are subject to our Terms and Conditions for
Deliveries and Payments, a copy of which is available from Stollmann.
Trademarks
The Bluetooth®word mark and logos are owned by the Bluetooth SIG, Inc.. The
NFC word mark and logos are owned by the NFC Forum. Any use of such marks by
Stollmann E+V GmbH is under license. Other trademarks and trade names are
those of their respective owners.

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Release r09 www.stollmann.de Page 3 of 54
Table of contents
1Introduction .......................................................................................................6
1.1 Feature Summary.........................................................................................7
1.2 Applications ..................................................................................................7
2Block Diagram...................................................................................................8
3Application Interface..........................................................................................9
3.1 Power Supply................................................................................................9
3.2 Power-up slew-rate.....................................................................................10
3.3 Power-On-Reset.........................................................................................11
3.4 Serial Interface............................................................................................11
3.4.1 Baudrate Deviation .............................................................................12
3.4.2 RS-485 Support..................................................................................13
3.5 GPIO Interface............................................................................................15
3.6 Alternate GPIO/IO Functions ......................................................................15
3.6.1 Master/Slave SPI Interface..................................................................16
3.6.2 Synchronous Serial Interface..............................................................16
3.6.3 Multi Channel PWM Controller............................................................17
3.6.4 Analog to Digital Converter .................................................................17
3.7 Bluetooth Radio Interface............................................................................18
3.8 JTAG ..........................................................................................................18
4Pin Description................................................................................................19
4.1 Pin Numbering............................................................................................19
4.2 Pin Description............................................................................................20
4.2.1 General Pin Description......................................................................20
4.2.2 Application Specific Pin Description ....................................................21
4.2.2.1 SPP Configuration........................................................................21
5Electrical Characteristics .................................................................................22
5.1 Absolute Maximum Ratings ........................................................................22
5.2 Environmental Requirements......................................................................22
5.3 Operating Conditions ..................................................................................23
5.3.1 RF and Supply Connections................................................................23

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5.3.2 GPIO, JTAG; Serial IF and Test Pins..................................................24
5.3.3 USB Pins ............................................................................................24
5.4 Power consumption and power down modes..............................................24
5.4.1 SPP configuration...............................................................................25
5.4.1.1 Deep Sleep state..........................................................................25
5.4.1.2 Power down state.........................................................................25
5.4.1.3 Idle state.......................................................................................25
5.4.1.4 Power Consumption .....................................................................26
5.5 RF performance..........................................................................................27
5.5.1 Antenna-Gain and Radiation-Pattern ..................................................29
5.6 Power-up Time ...........................................................................................30
5.7 Wake-up Time ............................................................................................30
6Mechanical Characteristics..............................................................................31
6.1 Dimensions.................................................................................................31
6.2 Connectors .................................................................................................31
6.3 Recommended Land Pattern......................................................................32
6.4 Soldering Temperature-Time Profile (for lead-free re-flow soldering)..........33
6.5 Housing Guidelines.....................................................................................34
6.6 Antenna Issues...........................................................................................35
6.7 Safety Guidelines........................................................................................37
7Approvals/Certifications...................................................................................38
7.1 EC Declaration of conformity ......................................................................38
7.2 FCC Grant ..................................................................................................39
7.3 IC Grant......................................................................................................40
7.4 FCC Compliance and FCC Statement ........................................................41
7.4.1 Caution ...............................................................................................41
7.4.2 FCC Warning......................................................................................41
7.4.3 RF-exposure Statement......................................................................42
7.4.4 Labelling and re-test requirements for the End Product.......................42
7.5 Japanese Certification ................................................................................43
7.6 Taiwanese NCC Certification......................................................................45

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7.6.1 NCC Certificate...................................................................................45
7.6.2 NCC Warning in Chinese....................................................................45
7.7 Bluetooth Qualification................................................................................46
7.8 RoHS Declaration.......................................................................................47
8Related Documents.........................................................................................48
9Packing ...........................................................................................................49
9.1 Package Label............................................................................................50
10 Ordering Information........................................................................................51
11 History.............................................................................................................52

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Hardware Reference
Release r09 www.stollmann.de Page 6 of 54
1 Introduction
This Hardware Reference Guide documents how BlueMod+C11/G2 can be integrat-
ed into customer systems.
It addresses developers of hardware environments for BlueMod+C11/G2.
For detailed information about software interfaces refer to the software reference
manual.
For the latest version of this document please check the following URL:
http://www.stollmann.de/en/modules/bluetooth-products/bluemod-c11g2/

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Hardware Reference
Release r09 www.stollmann.de Page 7 of 54
1.1 Feature Summary
•Bluetooth specification V2.0+EDR
•EDR compliant with V2.0 of specification for 2Mbps and 3Mbps modulation
modes
•Full Speed Bluetooth Operation with Full Piconet Support
•Scatternet Support
•Complete Co-location and Co-existence with 802.11 (AWMA, AFH and SFH)
•Fast Connection Setup
•RF output power class 1 with power control
•Supply Voltage 3.0V to 3.6V
•Internal crystal oscillator (26 MHz BC04 and 14,7456MHz for ARM7)
•Full Bluetooth data rate up to 2178 kbps asymmetric
•Support for very low-power modes (sleep and deep sleep)
•Full 8- to 128-bit encryption
•High sensitivity design ( -87 dBm typ.)
•Extra ARM7TDMI CPU for embedded profiles and/or application software
•Up to 17 GPIO lines
•USB 2.0 Full Speed Device Interface
•Master/Slave SPI
•Synchronous Serial Controller
•PWM Controller
•10 bit A/D Converter
•Power control
•5V tolerant I/Os
•-40°C to +85°C industrial operating temperature range
•RoHS Compliant
1.2 Applications
BlueMod+C11/G2 can be used in different applications.
Available applications are
•Bluetooth SPP
•BlueCluster Adhoc Networking
Please refer the software reference and interface specifications for further infor-
mation.

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2 Block Diagram
ARM7
CPU
AT91SAM7S
256k
FLASH
64k
SRAM
Bluetooth
BC04-ROM
+3V3
EXT-RES#
RS-232 (TTL)
BlueMod+C11/G2
Class1
PA
HCI
SingleChip
+3V3-PA
GPIO
USB 2.0 FS
JTAG
TEST
Fig. 1 Block Diagram

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3 Application Interface
3.1 Power Supply
The BlueMod+C11/G2 has two power supply rails, which always should be kept on
the same voltage level. Although we recommend using two different power rails, it is
as well possible to feed both rail from a single supply.
Pin # Signal Usage
C-13 3V3 Supply for digital and low power RF circuitry,
C-16 3V3-PA Supply for RF Amplifier
C-14 GND Reference Supply
C-15 GND Reference Supply
The pin order is made such that on the customer hardware directly at the pins of
each supply pair pins (C-13/C14) and pins (C-16/C-15) a 10uF X5R ceramic capaci-
tor with for example a 1206 footprint can be placed for decoupling. It is recommend-
ed to add further smaller value ceramic capacitors. These values depend on noise
frequencies on the supply rail. The following picture shows a sample layout with two
linear regulators in SOT23-5 housings and various capacitors in SMT shapes 0402,
0805 and 1206.
Fig. 2 Sample Layout Power Supply

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Each supply rail should be fed with 3,3V, Range 3,0V to 3,6V incl. noise, low noise
from a linear regulator with fast transient response. Stollmann suggest using two
pcs.
TOREX: XC6204B332MR
regulators, so that the fast current transients of the class1 RF power amplifier do not
interfere with sensitive PLL circuitry of the low power RF circuitry.
For layout guidelines please see sample implementation Stollmann reference design
BlueMod+Eval/C11/G2.
Excessive noise or too slow current transient response on the supply rails may have
an impact on the RF performance.
3.2 Power-up slew-rate
The Power up slew-rate for the BlueMod+C11/G2 must be more then 6V/ms for
proper startup of the AT91SAM7S Controller used on the BlueMod+C11/G2.
Figure 3 shows an example circuit for a power supply. The Output Voltage of the
Regulator is enabled by the Threshold Voltage of a RESET-Circuit, when VCC
Startup ramp reaches a valid Voltage.
Vin
RESET
Enable
Vout
TOREX: XC6204B332MR
VCC 3V3
Vth ~ 2.8 - 3.3V
Figure 3 power supply example circuit

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Hardware Reference
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3.3 Power-On-Reset
The BlueMod+C11/G2 is equipped with circuitry for generating Power-On Reset and
to provide under-voltage supervision. An integrated circuit type Maxim DS1818R
provides this functionality.
A reset is generated if the 3.3V supply rail including noise falls below 2,8V to 2,97V.
Via Pin A-1 an external reset can be generated by holding EXT-RES# at ≤ 0.3V for
≥10ms. A 74LVC14 Schmitt Trigger gate with a 1kR5/10nF low-pass filter at the
input is implemented to avoid false reset pulse recognition due to EMC effects.
If EXT-RES# is not used, it may be left open or tied to VCC.
3.4 Serial Interface
The interface functionally corresponds to the norm V.24 / RS-232 but has TTL-level.
•Transmission speeds 300 bps – 921600 bps (asynchronous)
•Character representation: 7 to 9 Bit, even, odd, mark, space or no Parity, 1, 1.5
or 2 stop bits
•Half duplex or full duplex
•Hardware flow-control (RTS/CTS)
Note: All signals of the serial interface are named according to the EIA232 DCE
definition.

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3.4.1 Baudrate Deviation
The following table shows the deviation in percent of the standard data rates. The
deviation is caused by the inaccuracy of the crystal oscillator.
Data Rate (bits/s) Deviation (%)
300
±0.5
600
1200
2400
4800
9600
19200
38400
57600
115200
230400
460800
921600
Note: The total deviation of sender and receiver shall not exceed 2.5 % to prevent
loss of data.

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3.4.2 RS-485 Support
For RS-485 support the serial interface has to be connected to an external Trans-
ceiver, we suggest the MAX3491E from Maxim Integrated Products, due to it sup-
ports full duplex transmissions.
UART_RX
UART_TX
BlueMod+C11/G2
Connections in Full Duplex Mode
D
R
RO
RE
DI
DE
GND
A
B
Z
Y
VCC GND
2
3
4
5
14 6,7
9
10
11
12
+
+3,3V
MAX3491E
UART_CTS
GND
UART_RX
UART_TX
BlueMod+C11/G2
Connections in Half Duplex Mode
D
R
RO
RE
DI
DE
GND
A
B
Z
Y
VCC GND
2
3
4
5
14 6,7
9
10
11
12
+
+3,3V
MAX3491E
UART_CTS

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CTS
Tbd
b
y
tes
max
Tbd
TXD
RTS
Tbd
h t
Tbd
S
RXD
Figure 4. UART Timing Diagram

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3.5 GPIO Interface
All user signals, except for EXT-RES#, which is routed via an Schmitt Trigger gate,
are connected directly to port pins of the ATMEL AT91SAM7S256 CPU. Except for
JTAG, USB signals DP, DM and GPIO(4,10), no additional pull-up or down resistors
are implemented, so that the I/O characteristics of the ATMEL CPU apply. These
are
•3V3 logic 5V tolerant
•VIL max = 0.8V, VIH min = 2.0V, VIH max = 5.5V
•VOH min = VCC – 0.4V @ IO= 8mA, VOL < 0.4V @ IO= 8mA
•LED’s can be driven directly on specific GPIO lines when Iostays below 8mA
and the specific GPIO line is specified for Iomax = 8mA.
All current consumption data in this document are given with IO(GPIO) = 0mA
See chapter 5 Electrical Characteristics for detailed information.
•All I/O signals except USB, GPIO(4) with 47k5 pull-down, GPIO(10) with 10k
pull-up and JTAG each with 100k pull-up except for TDO are connected directly
from the AT91SAM7S pins to the user accessible stamp pins. Therefore, the
electrical characteristics of the I/O pins are programmable in regard to direction,
pull-up resistor, function, push-pull or open drain. Please see specific applica-
tion software documentation for details. After reset, all GPIOs have pull-ups ac-
tivated. GPIO10, GPIO8 and TXD have 50kR to 300kR pull-ups, all other I/Os
have 5kR to 20kR pull-ups
•In reference to the ATMEL AT01SAM7S256 Errata Sheet 6173B-ATARM item
no. 18, the on-chip pull-up resistors on all GPIO pins, except for GPIO[8,10,16]
pull to min. (VDD -0,65V) rsp. to max. (VDD -0,45V). VDD is 3,0V to 3,6V. Use
of ext. pull-ups on open inputs is recommended.
3.6 Alternate GPIO/IO Functions
Application specific GPIO or IO pins can be programmed to alternate functions.
Then pin function and direction are fixed for the activated function block. Many
GPIOs are used by the SPP application. See chapter SPP Configuration. Probably
some of them can be released for use by other function blocks. Co-functionality of
blocks has to be carefully considered, because pin multiplexing possibilities are lim-
ited by the ATMEL AT91SAM7S CPU and using a function block often causes that
other function blocks can’t be used at the same time. Please refer to the ATMEL
data sheet AT91SAM7Sxxx Rev. F for complete information. The possibilities de-
picted in the following chapters are a subset only.
The following function blocks may be usable on the BlueMod+C11/G2:

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3.6.1 Master/Slave SPI Interface
Pin # GPIO#
IO Name Alternative
Signal Name Description Direction
Master Slave
A5 GPIO1 MISO Master In Slave Out IN OUT
A4 GPIO0 MOSI Master Out Slave In OUT IN
A3 GPIO3 SPCK Serial Clock OUT IN
A6 GPIO2 NPCS0 Peripheral. Chip Select OUT IN
Clock polarity and phase are programmable. The chip select signal is low active.
3.6.2 Synchronous Serial Interface
The Synchronous Serial Interface is capable of handling the protocols I2S, Short
Frame Sync, Long Frame Sync and other Telecom protocols. Receiver and trans-
mitter do act independently. Due to multiplexing interdependencies, the SSC is only
available with the Transmitter clock signal TK used for both directions if the UART IF
is enabled..
Pin # GPIO#
IO Name Alternative
Signal Name Description Direction
Case 1 Case 2
A16 GPIO16 RF Receiver Frame Sync IN OUT
A12 GPIO10 RD Receiver Data IN IN
C7 TXD RK Receiver Clock IN OUT
A13 GPIO7 TF Transmitter Frame Sync IN OUT
A11 GPIO8 TD Transmitter Data OUT OUT
A14 GPIO9 TK Transmitter Clock IN OUT

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3.6.3 Multi Channel PWM Controller
Each PWM channel can be programmed individually in regard to IO pin assignment
and PWM functionality. Therefore, PWM application designers can choose a proper
channel and pin for their application with the chance not to interfere with other nec-
essary interfaces.
Pin # GPIO#
IO Name Alternative
Signal Name Description Direction
A6 GPIO2 PWM0 PWM Waveform Out CH0 OUT
C9 GPIO5 PWM0 PWM Waveform Out CH0 OUT
C5 /CTS PWM1 PWM Waveform Out CH1 OUT
A5 GPIO1 PWM1 PWM Waveform Out CH1 OUT
C2 GPIO15 PWM1 PWM Waveform Out CH1 OUT
C4 /RTS PWM2 PWM Waveform Out CH2 OUT
A4 GPIO0 PWM2 PWM Waveform Out CH2 OUT
C8 GPIO6 PWM2 PWM Waveform Out CH2 OUT
A3 GPIO3 PWM3 PWM Waveform Out CH3 OUT
3.6.4 Analog to Digital Converter
Three ADC channels with 8 to 10bit resolution in reference to 1.8V are available. A
wide range of trigger sources and programmable S&H timing are available.
Pin # GPIO#
IO Name Alternative
Signal Name Description Direction
A16 GPIO16 AD3 ADC channel
3 In ana-
logue
A12 GPIO10 AD0 ADC channel
0 In ana-
logue
A11 GPIO8 AD1 ADC channel
1 In ana-
logue

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3.7 Bluetooth Radio Interface
The BlueMod+C11/G2 offers three population variants for the antenna
1) The BlueMod+C11/G2/AI variant presents an integrated ceramic antenna.
Pins A-26 and A28 shall always be connected directly to the reference GND plane
3) The BlueMod+C11/G2/AP variant presents a 50Ω impedance antenna interface
on pin A-27 with adjacent GND pins A-26 and A-28. In this case Pin A-26 and A28
shall be connected directly to the reference GND plane. Signal routing of the RF
signal on customer PCB has to be implemented with 50R micro-strip line technique.
If the antenna performance does not meet your requirements or you need antenna
support, please contact Stollmann.
3.8 JTAG
For software development purposes a JTAG interface, connected to the ATMEL
MCU is available.

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4 Pin Description
The BlueMod+C11/G2 module is soldered on customers PCB via stamp pins locat-
ed on the module PCB edges.
4.1 Pin Numbering
Top View

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4.2 Pin Description
4.2.1 General Pin Description
Pin Signal Type Ac-
tive Description
A1 /EXT_RES I-PU L Reset low active internal 47k pull-up
A2 GPIO11 (DTXD) I/O-PU General Purpose IO – Debug Uart Output
A3 GPIO3 I/O-PU General Purpose IO
A4 GPIO0 I/O-PU General Purpose IO
A5 GPIO1 I/O-PU General Purpose IO
A6 GPIO2 I/O-PU General Purpose IO
A7 ATDO O JTAG test data output
A8 ATCK I-PU JTAG clock
A9 ATMS I-PU JTAG mode select
A10 ATDI I-PU JTAG test data input
A11 GPIO8 I/O-PU General Purpose IO
A12 GPIO10 I/O-PU General Purpose IO - internal 10k pull-up
A13 GPIO7 I/O-PU General Purpose IO
A14 GPIO9 I/O-PU General Purpose IO
A15 GPIO12 (DRXD) I/O-PU General Purpose IO – Debug Uart Input
A16 GPIO16 I/O-PU General Purpose IO
A17 reserved do not connect-
A26 ANT_GND Antenna ground, connect directly to plane
A27 ANT 50 Ohm Rx/Tx connection to antenna
A28 ANT_GND Antenna ground, connect directly to plane
C1 GPIO14 I/O-PU General Purpose IO
C2 GPIO15 I/O-PU General Purpose IO
C3 GPIO13 I/O-PU General Purpose IO
C4 /RTS I-PU L Request to send
C5 /CTS O L Clear to send
C6 RXD O Receive Data
C7 TXD I-PU Transmit Data
C8 GPIO6 I/O-PU General Purpose IO
C9 GPIO5 I/O-PU General Purpose IO
C10 GPIO4 I/O-PD General Purpose IO - internal 47k pull-down
C11 USB_DM I/O USB D-, Data pin
C12 USB_DP I/O USB D+, Data pin
C13 VCC P +3.3V Power digital and low power RF
C14 GND P GND
C15 GND P GND
C16 VCC P +3.3V Power RF amplifier
Type: PU – pulled up on Module; PD pulled down on Module
Notes: General) Pull-up resistor on module pulls to min. (VDD -0,65V) to max. (VDD -0,45V)
VDD is 3,0V to 3,6V. Use of ext. pull-ups on open inputs is recommended
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