Synopsys Identify User manual

LO
Preface
© 2015 Synopsys, Inc. Identify Debugger User Guide
2March 2015
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Preface
Identify Debugger User Guide © 2015 Synopsys, Inc.
March 2015 3
Disclaimer
SYNOPSYS, INC., AND ITS LICENSORS MAKE NO WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING,
BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
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Preface
© 2015 Synopsys, Inc. Identify Debugger User Guide
4March 2015
Service Marks (sm)
MAP-in, SVP Café, and TAP-in are service marks of Synopsys, Inc.
SystemC is a trademark of the Open SystemC Initiative and is used under
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All other product or company names may be trademarks of their respective
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Printed in the U.S.A
March 2015

Identify Debugger User Guide © 2015 Synopsys, Inc.
March 2015 5
Contents
Chapter 1: Using the Debugger
Configuring and Invoking the Debugger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Reviewing the Instrumentation Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Changing the Communication Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Reviewing the JTAG Chain Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Saving the Debugged Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Invoking the Debugger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Debugger Windows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IICE Instrumentation Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Console Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Project Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Commands and Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Opening and Saving Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Executing a Script File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Activating/Deactivating an Instrumentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Selecting Multiplexed Instrumentation Sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Activating/Deactivating Folded Instrumentation . . . . . . . . . . . . . . . . . . . . . . . . . 24
Run Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Sampled Data Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Sample Buffer Trigger Position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Sampled Data Display Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Saving and Loading Activations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Cross Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Listing Watchpoints and Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
HAPS Deep Trace Debug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Running Deep Trace Debug with DDR3 Memory . . . . . . . . . . . . . . . . . . . . . . . 40
Viewing Captured Deep Trace Debug Samples . . . . . . . . . . . . . . . . . . . . . . . . 41
Hardware Configuration Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Debugging on a Different Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Simultaneous Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

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Debugger-Analyst Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Waveform Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Generating the Fast Signal Database . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Logic Analyzer Interface Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Logic Analyzer Scan Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Logic Analyzer Properties Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Logic Analyzer Submit Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
IICE Assignments Report Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Chapter 2: Board Bring-up
Board Query . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Board Bring-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Setting Initial Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
ConfPro GUI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Board Configuration Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Utility Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Chapter 3: Incremental Flow
Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Setting up the Original Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Creating the Incremental Instrumentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Redefining the Instrumented Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Generating the Bit File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Incremental Implementation Support
with Distributed Instrumentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Debugging the Incremental Version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Incremental Flow Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Chapter 4: IICE Hardware Description
JTAG Communication Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Breakpoint and Watchpoint Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Breakpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Watchpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Multiple Activated Breakpoints and Watchpoints . . . . . . . . . . . . . . . . . . . . . . . . 83
Sampling Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Complex Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Creating a Complex Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Debugging with the Complex Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Disabling the Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

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State Machine Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Simple or Advanced Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Advanced Triggering Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
State-Machine Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
State-Machine Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Chapter 5: Connecting to the Target System
Basic Communication Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Debugger Communications Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Debugger Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
JTAG Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
JTAG Hardware in Instrumented Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Using the Built-in JTAG Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Using the Synopsys Debug Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Boards Without Direct Built-in JTAG Connections . . . . . . . . . . . . . . . . . . . . . . 130
Setting the JTAG Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
JTAG Communication Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Basic Communication Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
On-chip Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
JTAG Chain Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
UMRBus Communications Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

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Contents
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Identify Debugger User Guide © 2015 Synopsys, Inc.
March 2015 9
CHAPTER 1
Using the Debugger
Before a design can be debugged, the instrumentor is first used to define the
specific signals to be monitored and then to generate an
instrumentation
design
constraints
(
idc
) file containing the instrumented signals and break
points. The design is synthesized and the device is programmed with the
debuggable design. The debugger is then launched to analyze the design
while it is running in the target system
The debugger enables HDL designs to be analyzed by interacting with the
instrumented HDL design implemented in the target hardware system. You
can activate breakpoints and watchpoints to cause trigger events within the
IICE
™
on the target device. These triggers cause signal data to be captured in
the IICE. The data is then transferred to the debugger through a communica-
tions port where it can be displayed in a variety of formats. This chapter
describes:
•Configuring and Invoking the Debugger, on page 10
•Debugger Windows, on page 13
•Commands and Procedures, on page 18
•HAPS Deep Trace Debug, on page 40
•Debugging on a Different Machine, on page 44
•Simultaneous Debugging, on page 45
•Debugger-Analyst Integration, on page 46
•Waveform Display, on page 51
•Logic Analyzer Interface Parameters, on page 54

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Chapter 1:
Using the Debugger
Configuring and Invoking the Debugger
© 2015 Synopsys, Inc. Identify Debugger User Guide
10 March 2015
Configuring and Invoking the Debugger
To configure a design for debugging, click the project tab to reopen the project
window (reopening the project window shows the instrumentation and
communication settings). Configuring and invoking the debugger is described
in the following sections:
•Reviewing the Instrumentation Settings, on page 10
•Changing the Communication Settings, on page 10
•Reviewing the JTAG Chain Settings, on page 11
•Saving the Debugged Design, on page 12
•Invoking the Debugger, on page 12
Reviewing the Instrumentation Settings
The instrumentation settings are displayed in the
Instrumentation settings
section of the project window. Because these configuration settings are inher-
ited from the instrumentor and used to construct the IICE, you cannot
change these settings in the debugger.
Changing the Communication Settings
The cable type and port specification communication settings can be set or
changed from the project window.
There is a list of possible vendor cable-type settings available from the
Cable
type
drop-down menu. A
umrbus
setting is also available to setup UMRBus
communications between the host and the HAPS
®
board system (see
UMRBus Communications Interface
, on page 136). Set
Cable type
value
according to the type of cable you are using to connect to the programmable
device.
Adjust the port setting based on the port where the communication cable is
connected. Most often,
lpt1
is the correct setting for parallel ports.

Configuring and Invoking the Debugger Chapter 1:
Using the Debugger
Identify Debugger User Guide © 2015 Synopsys, Inc.
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Reviewing the JTAG Chain Settings
The JTAG chain settings are viewed by clicking the
Show chain
button in the
Communication settings
section of the project window. Normally, the JTAG chain
settings for the devices are automatically extracted from the design. When the
chain settings cannot be determined, they must be created and/or edited
using the
chain
command in the console window. The settings shown below
are for a 2-device chain that has JTAG identification register lengths of 8 and
10 bits. In addition, the device named “fpga” has been enabled for debugging.
“fpga” device enabled for debugging

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Chapter 1:
Using the Debugger
Configuring and Invoking the Debugger
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Saving the Debugged Design
Saving a your design in the debugger saves the following additional informa-
tion to the project definition file:
• IICE settings
• Instrumentations and activations
To save your design definition in the debugger, click the
Save current
activations
icon or select
File->Save activations
from the menu.
Invoking the Debugger
Before you can open a design in the debugger, the design must have
been created with the instrumentor (only the instrumentor can
configure a design for debugging) and synthesized. The debugger can
be launched directly from a synthesis project or opened directly from
a Windows or Linux prompt. Invoking the debugger includes:
•Synthesis Tool Launch, on page 12
•Operating System Invocation, on page 13
Synthesis Tool Launch
If you are using a Synopsys FPGA synthesis tool or the Certify tool, invoke the
debugger directly from the graphical user interface as follows:
• From Synplify Pro or Synplify Premier, highlight the Identify implemen-
tation and select
Run->Launch Identify Debugger
from the menu bar or
popup menu, or click the
Launch Identify Debugger
icon in the top menu
bar.
• From Synplify, select
Run->Launch Identify Debugger
from the menu bar or
click the
Launch Identify Debugger
icon in the top menu bar.
• From Certify, highlight the Identify implementation and select
Tools->Launch Identify Debugger
from the menu bar or popup menu, or click
the
Launch Identify Debugger
icon in the top menu bar.
The debugger IICE instrumentation window opens with the corresponding
project displayed (see
IICE Instrumentation Window
, on page 14).

Debugger Windows Chapter 1:
Using the Debugger
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March 2015 13
Operating System Invocation
The debugger runs on both the Windows and Linux platforms. To explicitly
invoke the debugger from a Windows system, either:
• double click the
Identify Debugger
icon on the desktop
•run
identify_debugger
.
exe
from the /bin directory of the installation path
To explicitly invoke the debugger from a Linux system:
•run
identify_debugger
from the /bin directory of the installation path
The initial debugger project window opens. To display the instrumentation
window, do either of the following:
•Clickthe
Open existing project
icon in the menu bar and, in the
Open Project
File
dialog box, navigate to the project directory and open the corre-
sponding project (
prj
) file.
•Select
File->Open project
from the main menu and, in the
Open Project File
dialog box, navigate to the project directory and open the corresponding
project (
prj
) file.
The debugger instrumentation (IICE) window opens with the corresponding
project displayed (see
Project Window
, on page 17).
Debugger Windows
The Graphical User Interface for the debugger has three major areas:
•IICE Instrumentation Window, on page 14
•Console Window, on page 16
•Project Window, on page 17
In this section, each of these areas and their uses are described. The
following discussions assume that:
• an HDL design has been loaded into the instrumentor and instrumented
• the design has been synthesized in the synthesis tool

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Chapter 1:
Using the Debugger
Debugger Windows
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14 March 2015
• the synthesized output netlist has been placed and routed by the place
and route tool
• the resultant bit file has been used to program the FPGA with the
instrumented design
• the board containing the programmed FPGA is cabled to your host for
analysis by the debugger
IICE Instrumentation Window
The instrumentation window in the debugger, like the instrumentation
window in the instrumentor, includes a hierarchy browser on the left and the
source code display on the right.
Hierarchy Browser Source-Code Display

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Using the Debugger
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March 2015 15
Hierarchy Browser
The hierarchy browser on the left shows a graphical representation of the
design’s hierarchy. At the top of the browser is the ROOT node. The ROOT
node represents the top-level entity or module of your design. For VHDL
designs, the first level below the ROOT is the architecture of the top-level
entity. The level below the top-level architecture for VHDL designs, or below
the ROOT for Verilog designs, shows the entities or modules instantiated at
the top level.
Clicking on a + sign opens the entity/module instance so that the hierarchy
below that instance can be viewed. Lower levels of the browser represent
instantiations,
case
statements,
if
statements, functional operators, and other
statements.
Single clicking on any element in the hierarchy browser causes the associ-
ated HDL code to be displayed in the adjacent source code window.
Source Code Display
The source code display shows the HDL source code annotated with signals
and breakpoints that were previously instrumented.
Note:
Signals and breakpoints that were not enabled in the instru-
mentor are not displayed in the debugger.
Signals that can be selected for setting watchpoints are underlined, colored in
blue text, and have small watchpoint (or “P”) icons next to them. Breakpoints
that can be activated have small green circular icons in the left margin to the
left of the line number.

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Chapter 1:
Using the Debugger
Debugger Windows
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16 March 2015
Selecting the watchpoint or “P” icon next to a signal (or the signal itself)
allows you to select the
Watchpoint Setup
dialog box from the popup menu. This
dialog box is used to specify a watchpoint expression for the signal. See
Setting a Watchpoint Expression
, on page 19.
Selecting the green breakpoint icon to the left of the source line number
causes that breakpoint to become armed when the
run
command is executed.
See
Run Command
, on page 26.
Console Window
The debugger console window displays commands that have been executed,
including those executed by menu selections and button clicks. The console
window also allows you to enter debugger commands and to view the results
of command execution.

Debugger Windows Chapter 1:
Using the Debugger
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To capture all the text written to the console, use the
log
console command
(see the
Reference Manual
). Alternately, you can click the right mouse button
inside the console window and select
Save Console Output
from the menu. To
capture all commands executed in the console window, use the
transcript
command (see the
Reference Manual
).
To clear the text in the console window, use the
clear
command or click the
right mouse button inside the console window and select
clear
from the menu.
Project Window
An empty project window is displayed when you explicitly start up the
debugger. The window is replaced by the instrumentation window when the
synthesis project (
prj
) file is read into the debugger.
The project window is restored at any time by clicking its tab at the bottom of
the window.
The project window displays the symbolic view of the project on the left and a
Run
button with a list of all of the available IICE units that can be debugged
on the right.

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Chapter 1:
Using the Debugger
Commands and Procedures
© 2015 Synopsys, Inc. Identify Debugger User Guide
18 March 2015
Commands and Procedures
This section describes the typical operations performed in the debugger and
includes the following topics:
•Opening and Saving Projects, on page 18
•Executing a Script File, on page 19
•Activating/Deactivating an Instrumentation, on page 19
•Selecting Multiplexed Instrumentation Sets, on page 23
•Activating/Deactivating Folded Instrumentation, on page 24
•Run Command, on page 26
•Sampled Data Compression, on page 28
•Sample Buffer Trigger Position, on page 29
•Sampled Data Display Controls, on page 31
•Saving and Loading Activations, on page 35
•Cross Triggering, on page 36
•Listing Watchpoints and Signals, on page 38
Opening and Saving Projects
The debugger commands to open and save projects are available as menu
items and icons.
When opening a project:
Function Menu Bar
Icon
Menu Command
Open existing project File->Open project
Save current
activations
File->Save activations

Commands and Procedures Chapter 1:
Using the Debugger
Identify Debugger User Guide © 2015 Synopsys, Inc.
March 2015 19
• The working directory is automatically set from the corresponding
project file.
• If the project was saved with encrypted original sources, you are
prompted to enter the original password used to encrypt the files. This
password is then used to read any encrypted files.
Executing a Script File
A script file contains Tcl commands and is a convenient way to capture a
command sequence that you would like to repeat. To execute a script file,
select the
File->Execute Script
menu selection and navigate to your script file
location or use the
source
command (see
source
, on page 83 in the
Reference
Manual
).
Activating/Deactivating an Instrumentation
The trigger conditions used to control the sampling buffer comprise break-
points, watchpoints, and counter settings (see Chapter 4,
IICE Hardware
Description
). Activation and deactivation of breakpoints and watchpoints are
discussed in this chapter.
Setting a Watchpoint Expression
Any signal that has been instrumented for triggering can be activated as a
watchpoint in the debugger. A watchpoint is defined by assigning it one or
two HDL constant expressions. When a watched signal changes to the value
of its watchpoint expression, a trigger event occurs.
A watchpoint is set on a signal by clicking-and-holding on the signal
or the watchpoint icon next to the signal and then selecting the
Set
Trigger Expressions
menu item to bring up the
Watchpoint Setup
dialog
box.
A watchpoint is set on a partial bus signal by clicking-and-holding
on the signal or the “P” icon next to the signal, selecting the partial
bus group from the list displayed, and then selecting the
Set Trigger
Expressions
menu item to bring up the
Watchpoint Setup
dialog box.
There are two forms of watchpoints: value and transition.

LO
Chapter 1:
Using the Debugger
Commands and Procedures
© 2015 Synopsys, Inc. Identify Debugger User Guide
20 March 2015
•A
value
watchpoint triggers when the watched signal attains a specific
value.
•A
transition
watchpoint triggers when the watched signal has a specific
value transition.
To create a value watchpoint, assign a single, constant expression to the
watchpoint. A value watchpoint triggers when the watched signal value
equals the expression. In the example below, the signal is a 4-bit signal, and
the watchpoint expression is set to “0010” (binary). Any legal VHDL or Verilog
(as appropriate) constant expression is accepted.
To create a transition watchpoint, assign two constant expressions to the
watchpoint. A transition watchpoint triggers when the watched signal value
is equal to the first expression during a clock period and the value is equal to
the second expression during the next clock period. In the example below, the
transition being defined is a transition from “0010” to “1011.”
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