Sys Tec Electronic CANopen ChipF40 User guide

CANopen ChipF40
System Manual
Edition June 2012
System House for Distributed Automation

© SYS TEC electronic GmbH 2010 L-1062e_9
This side was left blank intentionally.

L-1062e_9 © SYS TEC electronic GmbH 2010
In this manual are descriptions for copyrighted products which are not explicitly
indicated as such. The absence of the trademark (©) symbol does not infer that a
product is not protected. Additionally, registered patents and trademarks are
similarly not expressly indicated in this manual
The information in this document has been carefully checked and is believed to be
entirely reliable. However, SYS TEC electronic GmbH assumes no responsibility
for any inaccuracies. SYS TEC electronic GmbH neither gives any guarantee nor
accepts any liability whatsoever for consequential damages resulting from the use
of this manual or its associated product. SYS TEC electronic GmbH reserves the
right to alter the information contained herein without prior notification and
accepts no responsibility for any damages which might result.
Additionally, SYS TEC electronic GmbH offers no guarantee nor accepts any
liability for damages arising from the improper usage or improper installation of
the hardware or software. SYS TEC electronic GmbH further reserves the right to
alter the layout and/or design of the hardware without prior notification and
accepts no liability for doing so.
©Copyright 2012 SYS TEC electronic GmbH. rights – including those of
translation, reprint, broadcast, photomechanical or similar reproduction and
storage or processing in computer systems, in whole or in part – are reserved. No
reproduction may occur without the express written consent from SYS TEC
electronic GmbH.
Contact Direct Your local distributor
Address: SYS TEC electronic GmbH
August-Bebel-Str. 29
D-07973 Greiz
GERMANY
Please find a list of our distributors
under http://www.systec-
electronic.com/distributors
Ordering
Information: +49 (3661) 6279-0
Technical
Support: +49 (3661) 6279-0
Fax: +49 (3661) 62 79 99
Web Site: http://www.systec-electronic.com
9th Edition June 2012

© SYS TEC electronic GmbH 2010 L-1062e_9
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Table of Content
L-1062e_9 © SYS TEC electronic GmbH 2010
Table of Content
1Preface..................................................................................................1
2Introduction to the CANopen ChipF40............................................3
2.1Features ........................................................................................4
3Hardware Overview............................................................................5
3.1Pin Layout....................................................................................5
3.2Pin Description Of The Board......................................................6
3.3Board Configuration.....................................................................7
3.3.1DIP-Switch......................................................................7
3.3.2CAN Transceiver ............................................................8
3.4Reset.............................................................................................8
3.5Configuration of Communication Parameters .............................9
3.6Default Configuration ................................................................13
3.7Pin Assignments for Selected I/O Configurations F40..............13
3.8Pin Assignments for Selected I/O Configurations F40 V3........15
3.9Technical Data............................................................................17
4Setting up the CANopen ChipF40...................................................19
4.1Power Supply .............................................................................19
4.2CAN Interface ............................................................................19
5QuickStart..........................................................................................21
5.1Start-Up of the CANopen ChipF40 ...........................................21
5.2Shut-Down of the CANopen ChipF40.......................................21
5.3CAN Message and Identifier......................................................22
5.4PDO Mapping for I/O’s .............................................................22
5.4.1Default Mapping CANopen ChipF40...........................23
5.4.2Default Mapping CANopen ChipF40 V3.....................23
5.5Board Reset ................................................................................24
5.6Node-Guarding...........................................................................24
6Controller Area Network – CAN.....................................................27
6.1Communication with CANopen.................................................27
6.2CAN Application Layer.............................................................29
6.3CANopen – Open Industrial Communication............................30
7CANopen Communication...............................................................33
7.1CANopen Fundamentals............................................................33
7.2CANopen Device Profiles..........................................................34
7.3Communication Profile..............................................................35
7.4Service Data Objects..................................................................35
7.5Process Data Objects..................................................................36
7.6PDO-Mapping............................................................................38
7.7Error Handling............................................................................39
7.8Network Services .......................................................................39

© SYS TEC electronic GmbH 2010 L-1062e_9
7.8.1Life-Guarding ...............................................................40
7.8.2Heartbeat....................................................................... 40
7.8.3Heartbeat Producer........................................................ 40
7.8.4Heartbeat Consumer...................................................... 41
7.9Network Boot-Up....................................................................... 42
7.10Object Dictionary Entries ..........................................................44
7.11PDO Mapping Example............................................................. 45
7.12Input/Output Assignment to Object Dictionary Entries ............47
8CANopen ChipF40 Operation.........................................................49
8.1CANopen State Transitions ....................................................... 49
8.2Power On.................................................................................... 50
8.3PRE-OPERATIONAL............................................................... 50
8.4OPERATIONAL........................................................................ 50
8.5STOPPED .................................................................................. 50
8.6Restart Following Reset / Power-On ......................................... 50
8.7NMT-Boot-Configuration..........................................................52
8.8Analog Input Operation ............................................................. 53
8.8.1Handling Analog Values............................................... 53
8.8.2Formula for Calculating the Analog Input Value......... 53
8.8.3Selecting the Interrupt Trigger...................................... 54
8.8.4Interrupt Source ............................................................ 55
8.8.5Interrupt Enable ............................................................55
8.8.6Interrupt Upper and Lower Limit ................................. 55
8.8.7Delta Function...............................................................56
8.8.8Example for Trigger Conditions................................... 57
8.9Functionality of PWM Outputs.................................................. 58
8.10Emergency Message .................................................................. 58
8.10.1Error Code..................................................................... 59
8.10.2Error Register................................................................ 59
8.11Display State at Run and Error LED ........................................60
8.11.1Run LED.......................................................................60
8.11.2Error LED ..................................................................... 61
9Operation in the Event of Errors....................................................63
9.1State of the CANopen ChipF40 in the Event of Errors............. 63
9.2Output Handling in the Event of Errors..................................... 63
9.2.1Digital Outputs.............................................................. 63
9.2.2PWM Outputs ............................................................... 64
9.3Changing from Error State to Normal Operation ...................... 65
10Object Dictionary CANopen ChipF40............................................67
11Object Dictionary CANopen ChipF40 V3......................................69
12Revision History of this Document.................................................. 71

© SYS TEC electronic GmbH 2010 L-1062e_9
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Index of Figures
L-1062e_9 © SYS TEC electronic GmbH 2010
Index of Figures
Figure 1:Pin Layout..................................................................................5
Figure 2:DIP-switch Pinout and Functions ..............................................7
Figure 3:DIP-switch Pinout and Functions, version 3301002 only.........8
Figure 4:structure of /RESIN Line ...........................................................8
Figure 5:State Diagram of a CANopen Device......................................43
Figure 6:Example Trigger Conditions....................................................57

© SYS TEC electronic GmbH 2010 L-1062e_9
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Index of Tables
L-1062e_9 © SYS TEC electronic GmbH 2010
Index of Tables
Table 1:Pinout of the DIPmodul-connector............................................6
Table 2:Configuration of Node-ID........................................................10
Table 3:Configuration of CAN Bit Rate...............................................11
Table 4:Configuration of CAN Bit Rate over LSS...............................11
Table 5:I/O Configuration.....................................................................12
Table 6:Number of I/Os Depending on the Selected Configuration F4013
Table 7:Input/Output Configuration and I/O Pin Assignment F40 ......14
Table 8:Number of I/Os Depending on the Selected Configuration F40
V3.............................................................................................15
Table 9:Input/Output Configuration and I/O Pin Assignment F40 V3.16
Table 10:CAN ID for Different PDO Types...........................................22
Table 11:PDO Mapping for I/O‘s F40....................................................23
Table 12:PDO Mapping for I/O‘s F40 V3..............................................23
Table 13:COB-Identifier (Communication Target Object Identifier).....37
Table 14:Emergency-Message Contents.................................................39
Table 15:Heartbeat Message Structure ...................................................40
Table 16:Structure of a Consumer Heartbeat Time Entry ......................41
Table 17:Calculation of the COB-Identifier from the Node Addresses..42
Table 18:Base Identifier..........................................................................42
Table 19:Description of State Flow Diagram Symbols ..........................43
Table 20:PDO Mapping Example...........................................................46
Table 21:Object Dictionary Input/Output Entries F40 ...........................47
Table 22:Object Dictionary Input/Output Entries F40 V3......................48
Table 23:NMT-Master Messages for Status Control..............................49
Table 24:SDOs zum Setzen der NMT-Boot-Konfiguration...................52
Table 25:Storage of Analog Values........................................................53
Table 26:Interrupt Trigger Bits...............................................................54
Table 27:Emergency Message ................................................................59
Table 28:Run LED States........................................................................60

© SYS TEC electronic GmbH 2010 L-1062e_9
Table 29:Error Led States....................................................................... 61
Table 30:Example for Error Handling digital outputs............................ 64
Table 31:Example for Error Handling PWM outputs............................. 64
Table 32:Object Dictionary of the CANopen ChipF40.......................... 68
Table 33:Object Dictionary of the CANopen ChipF40 V3.................... 70

Preface
L-1062e_9 © SYS TEC electronic GmbH 2010 1
1Preface
This manual describes only the functions of the CANopen ChipF40.
In this manual low active signals are denoted by a "/" in front of the
signal name (i.e.: /RD). A "0" indicates a logic-zero or low-level
signal, while a "1" represents a logic-one or high-level signal.
Declaration of the Electro Magnetic Conformity for the
CANopen ChipF40
The CANopen ChipF40 (henceforth product) was designed for
installation in electrical appliances or as dedicated Evaluation Boards
(i.e.: for use as a test and prototype platform for hardware/software
development) in laboratory environments.
Note:
SYS TEC products lacking protective enclosures are subject to dam-
age by Electro Static Discharge (ESD) and, hence, may only be
unpacked, handled or operated in environments in which sufficient
precautionary measures have been taken in respect to ESD dangers. It
is also necessary that only appropriately trained personnel (such as
electricians, technicians and engineers) handle and/or operate these
products. Moreover, SYS TEC products should not be operated
without protection circuitry if connections to the product's pin header
rows are longer than 3 m.
SYS TEC products fulfill the norms of the European Union’s
Directive for Electro Magnetic Conformity only in accordance to the
descriptions and rules of usage indicated in this manual (particularly
in respect to the pin header row connectors, power connector and
serial interface to a host-PC).
Implementation of SYS TEC products into target devices, as well as
user modifications and extensions of SYS TEC products, is subject to
renewed establishment of conformity to, and certification of, Electro
Magnetic Directives. Users should ensure conformance following any

2© SYS TEC electronic GmbH 2010 L-1062e_9
modifications to the products as well as implementation of the
products into target systems.
The CANopen ChipF40 is one of a series of SYS TEC DIPmodules
that can be fitted with different controllers and, hence, offers various
functions and configurations. SYS TEC supports all common 8- and
16-bit controllers in two ways:
(1) as the basis for Development Kits in which user-designed
hardware can be implemented on a wrap-field around the
controller and
(2) as insert-ready, fully functional ECUcore modules which can be
directly embedded into the user’s peripheral hardware design.
SYS TEC's microcontroller modules allow engineers to shorten
development horizons, reduce design costs and speed project concepts
from design to market.

Introduction to the CANopen ChipF40
L-1062e_9 © SYS TEC electronic GmbH 2010 3
2Introduction to the CANopen ChipF40
The CANopen ChipF40 is available in various firmware-versions:
MM-217-Y CANopen ChipF40 standard version
MM-217-V3Y CANopen ChipF40 V3, compatible to CANopen
Chip164.
3301002 CANopen ChipF40, 63 Node-ID’s adjustable via
DIP-switch, default I/O configuration 1, adjustable
via CANopen SDO only.
The differences and peculiarities of the both versions are described
later in this document.
The CANopen ChipF40 is a tiny yet highly cost-effective Single
Board I/O device. In the size of a 40-pin DIP device, the module is
designed for use as core component in a customer application design.
The CANopen ChipF40 features, besides the implemented standard
CANopen firmware, digital inputs and outputs as well as analog input
channels and PWM outputs. Using the various on-board configuration
options, the module is adaptable to different applications.
All applicable controller signals extend to standard-width (2.54 mm.)
pin header rows aligning two edges of the board, making the features
and functionality of the Chip readily available to the user. To achieve
the compact form factor of a 40-pin DIP device, small package types
of the different components are used. The CANopen ChipF40 operates
with a single 5 V supply voltage according to the specifications of
standard TTL devices.
The firmware implemented in the CANopen ChipF40 has the
complete functionality of a CANopen Slave device and has been
certified by CiA (CAN in Automation e.V.). The present version of
the CANopen-Chip supports 11-Bit identifier (CAN 2.0B passive).
The firmware supports the standard Device Profile according to
CiA 401 and the Communication Profile according to CiA 301 V4.01.
The CANopen ChipF40 provides various on-board configuration
options for both the CANopen network parameters and the selection of

4© SYS TEC electronic GmbH 2010 L-1062e_9
input und output characteristics (number and type of I/O's). The serial
EEPROM device on the CANopen ChipF40 stores the configuration
data of the CANopen Slave during runtime. This provides the
advantage that, in the event of a temporary loss of the power supply,
configuration data are still valid in the EEPROM.
2.1 Features
•single board CANopen I/O-node in 40-pin DIP dimensions
(24x56mm) populated with Fujitsu MB90F352 16-bit
microcontroller
•controller signals and ports extending to standard-width (2.54 mm.)
pin rows lining the edges of the board
•CAN signals (CANH, CANL) in CAN 2.0B passive mode
•reference voltage pins for the on-chip A/D-converter
•EEPROM for storage of CANopen configuration parameters
•on-board PCA82C251 CAN transceiver, supporting up to 100
nodes on one CAN bus
•CAN signals also available for connection to an external, optically
isolated CAN transceiver
•8-position DIP-switch enables selection of:
Node-ID (4-bit), baud rate (2-bit) and I/O configuration (2-bit),
Node-ID (6-bit) and baud rate (2-bit) by version 3301002

Hardware Overview
L-1062e_9 © SYS TEC electronic GmbH 2010 5
3Hardware Overview
3.1 Pin Layout
Please note that all module connections are not to exceed their
expressed maximum voltage or current. Maximum signal input values
are indicated in the corresponding controller User’s Manual/Data
Sheets located on the SYS TEC Products CD. As damage from
improper connections varies according to use and application, it is the
user's responsibility to take appropriate safety measures to ensure that
the module connections are protected from overloading through
connected peripherals. All controller signal extend to the pin header
connector without any additional protection circuitry. External
circuitry in which the CANopen ChipF40 is implemented must follow
the guidelines for EMC conformance. As Figure 1 indicates, all
controller signals extend to standard-width (2.54 mm / 0.10 in.) pin
rows lining two sides the board (referred to as DIPmodul-connector).
This allows the CANopen ChipF40 to be plugged into any target
application like a "big chip".
GND
RESET
DI AI
DI AI
DI AI
DI AI
DI AI
DI AI
DI AI
DI AI
VAGND
VAREF
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
VCC
CAN (TxDC)
CANHigh
CANLow
1
20 21
40
CANopen-Chip
top view
/BOOT
GND
DIO
DIO
CAN(RxDC)
GND
DIO
DIO
1
8
ON
D1D2
Figure 1: Pin Layout

6© SYS TEC electronic GmbH 2010 L-1062e_9
A more detailed description of pin signals and functions is available in
Table 1.
3.2 Pin Description Of The Board
Pin Number Function I/O Description
1, 2 P1.2, P1.3 I/O Port Pin P1.2, P1.3 of the microcontroller
3, 4 P4.4, P4.5 I/O Port Pin P4.4, P4.5 of the microcontroller
5 /BOOT I /BOOT = 0 & RESIN = 1-0-Edge Æactivate
Boot-Mode.
Is used for firmware update over serial line.
6 GND - Ground 0V
7, 8 P2.0, P2.1 I/O Port Pin P2.0, P2.1 of the microcontroller
9 VAREF - Reference voltage input of the on-chip A/D
converter
10 VAGND - Analog Ground
11, 12, 13, 14,
15, 16, 17, 18 P6.0, P6.1,
P6.2, P6.3,
P6.4, P6.5,
P6.6, P6.7
I Port Pin P6.0-P6.7 of the microcontroller
19 RESIN I Reset input of the module, 0 - 1 transition
triggers the RESET signal
20 GND - Ground 0V
21, 22 P5.0, P5.1 I/O Port Pin P5.0, P5.1 of the microcontroller
23, 24, 25, 26,
27, 28, 29, 30 P3.0, P3.1,
P3.2, P3.3,
P3.4, P3.5,
P3.6, P3.7
I/O Port Pin P3.1-P3.7 of the microcontroller
31, 32 P5.2, P5.3 I/O Port Pin P5.2, P5.3 of the microcontroller
33, 34 P2.2, P2.3 I/O Port Pin P2.2, P2.3 of the microcontroller
35 GND - Ground 0 V
36 RxDC I Receive line of the on-chip CAN controller
37 CANL I/O CANL in-/output of the CAN transceiver
38 CANH I/O CANH in-/output of the CAN transceiver
39 TxDC O Send line of the on-chip CAN controller
40 VCC - Power supply +5 V =
Table 1: Pinout of the DIPmodul-connector
The assignment between applicable I/O lines and their specific
function is provided in Table 7.

Hardware Overview
L-1062e_9 © SYS TEC electronic GmbH 2010 7
The use of an external CAN driver or an external galvanic isolation of
CAN interface ( use of signals RxDC and TxDC instaed of CANL and
CANH) demands the disassembling of resistors on J1 of the module.
A simulaneously use of onboard CAN driver and external CAN driver
is not possible.
3.3 Board Configuration
3.3.1 DIP-Switch
An 8-position DIP-switch is located on the topside of the
CANopen ChipF40. Four of these switches enable configuration of the
Node-ID for CANopen, two set the CAN baud rate CAN bus, and the
remaining two switches are used to enable I/O configuration.
Additional configurations are possible within CANopen (refer to
section 3.5).
Figure 2 shows the DIP-switch pinout and functions. The switch
position "OFF" corresponds to logic-zero or low-level signals while
"ON" represents high level or logic-one. See Figure 1 for location and
switch positions.
Figure 2: DIP-switch Pinout and Functions
1 2 3 4 5 6 7 8
Node-ID
Baud rate
Configuration
1
2
3
4
5
6
7
8
Node-ID low
Baud rate
Node-ID hi
g
h

8© SYS TEC electronic GmbH 2010 L-1062e_9
Figure 3: DIP-switch Pinout and Functions, version 3301002 only
3.3.2 CAN Transceiver
The firmware operates with 11-bit identifier (Full CAN 2.0B passive).
The selection of the CAN transceiver is made by selection of the
corresponding pins of the CANopen ChipF40. Pins 37 and 38 for use
of the on-board or pins 36 and 39 for use of an external optically
isolated CAN transceiver device.
3.4 Reset
A 1µF capacitor is connected to the microcontroller‘s RESET input.
This enables automatic release of a power-on reset. The capacitor is
charged via a 50kOhm resistor when power is turned on and holds the
RESET input at a low level for a duration of approximately 50
milliseconds
VCC
RESIN
X1/19
/RESIN
MB90F352
100R
100k
1
μ
F
Figure 4: structure of /RESIN Line
Table of contents
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