TechNexion TAM-3517 User manual
TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
3
1Contents
2 Revision...........................................................................................................................................5
3 Care and Maintenance.....................................................................................................................6
3.1 General....................................................................................................................................6
3.2 Regulatory Information............................................................................................................6
4 Description ......................................................................................................................................9
4.1 Block Diagram TAM-3517 System on Module ......................................................................... 10
4.2 Functional Block Diagram CPU................................................................................................ 11
5 System Components...................................................................................................................... 12
5.1 CPU: AM-3517........................................................................................................................ 12
5.1.1 AM-3517 Sitara ARM Processor Features........................................................................ 12
5.2 PMIC: TPS-65023.................................................................................................................... 13
5.2.1 TPS-65023 –Introduction ............................................................................................... 13
5.2.2 TPS-65023 Features........................................................................................................ 13
5.3 Memory................................................................................................................................. 14
5.3.1 Hynix H5PS1G63EFR (option 1) ....................................................................................... 14
5.3.2 Micron MT47H64M16 (option 2) .................................................................................... 15
5.3.3 Nanya NT5TU64M16GG (option 3) ................................................................................. 16
5.4 NAND Flash............................................................................................................................ 17
5.4.1 Micron MT29F4G16ABBDAHC ........................................................................................ 17
5.4.2 MT29F2G16ABDHC-ET.................................................................................................... 18
5.5 Network PHY: SMSC LAN8710A.............................................................................................. 19
5.6 USB PHY................................................................................................................................. 20
5.7 WiFi Module .......................................................................................................................... 20
5.7.1 WiFi Signals Description.................................................................................................. 20
5.7.2 I-PEX Connector.............................................................................................................. 21
5.8 EEPROM................................................................................................................................. 22
6 How to use the Multiplex Mode..................................................................................................... 23
6.1 Multiplexing in U-boot ........................................................................................................... 23
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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7 TAM-3517 Module Pin Description ................................................................................................ 24
7.1.1 Definitions...................................................................................................................... 40
8 Signal Description .......................................................................................................................... 41
8.1 External Memory Interfaces –GPMC Signals Description........................................................ 41
8.2 Video Interfaces –CAM Signals description............................................................................. 43
8.3 Video Interfaces –DSS Signals Description ............................................................................. 44
8.4 Video Interfaces –TV Signals Description ............................................................................... 45
8.5 Serial Communication Interfaces –I2C Signals Description...................................................... 46
8.6 Serial Communication Interfaces –McBSP LP Signals Description...........................................47
8.7 Serial Communication Interfaces –McSPI Signals Description................................................. 48
8.8 Serial Communication Interfaces –UARTs Signals Description................................................ 49
8.9 Serial Communication Interfaces –USB Signals Description.................................................... 50
8.1 Serial Communication Interfaces - HECC CAN Bus Signals Description .................................... 51
8.2 Removable Media Interfaces –MMC/ SDIO Signals ................................................................ 52
8.3 General Purpose IOs Signals Description ................................................................................ 52
8.4 Test Interfaces –JTAG Signals Description.............................................................................. 53
8.5 Power Supplies Signals description......................................................................................... 55
8.6 System and Miscellaneous Signals Description ....................................................................... 56
8.7 Touch Interupt Signal Description........................................................................................... 56
8.8 Serial Communcication Interfaces –HDQ/ 1-Wire Signals Description .................................... 56
8.9 PWM Signals Description........................................................................................................56
8.10 Analog Audio Signals Description ........................................................................................... 57
8.11 Ethernet Signals Description...................................................................................................58
8.12 LED Signals Description .......................................................................................................... 58
8.13 Pull-up or Pull-down Signals Description................................................................................. 59
8.14 Boot Option ........................................................................................................................... 59
9 Electrical Characteristics ................................................................................................................60
10 Environmental Specifications ..................................................................................................... 61
11 Mechanical Dimensions ............................................................................................................. 62
11.1 TAM-3517 System on Module Dimensions ............................................................................. 62
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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12 Module Connection ................................................................................................................... 63
12.1 Module Connector DDR2 SO-DIMM ....................................................................................... 63
12.2 Nut to Fix TAM-3517 Module to the Baseboard...................................................................... 64
13 Disclaimer.................................................................................................................................. 65
14 Warranty ...................................................................................................................................66
15 Contact Information................................................................................................................... 67
2Revision
Revision
Date
Description
Created by
0.90
05/07/2011
Preliminary version
TechNexion
B
14/07/2011
First version
TechNexion
B-01
11/08/2011
Change Wi-Fi signals description
TechNexion
B-02
20/09/2011
Change the 24/18 bit table (p.40)
TechNexion
B-03
28/10/2011
Correction in JTAG: JTAG_RTCK &GND and 3V3 & X location
TechNexion
B-04
07/11/2011
Adding option for memory
TechNexion
B-05
14/02/2012
Delete remark (2) on p37 renumber (3) and (4). Add note
PWR_ON. Add note VRTC.
Remove/ Change DSI signals into Not Connected.
TechNexion
B-06
22/02/2012
Change/add description of 4G and 2G NAND Flash
Add Nanya memory option
TechNexion
B-07
06/03/2012
Add chapter for multiplexing in software
TechNexion
B-08
03/07/2012
USB_reset output.
TechNexion
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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3Care and Maintenance
3.1 General
Your device is a product of superior design and craftsmanship and should be treated with care.
The following suggestions will help you.
Keep the device dry. Precipitation, humidity, and all types of liquids or moisture can
contain minerals that will corrode electronic circuits. If your device does get wet, allow it
to dry completely.
Do not use or store the device in dusty, dirty areas. Its moving parts and electronic
components can be damaged.
Do not store the device in hot areas. High temperatures can shorten the life of electronic
devices, damage batteries, and warp or melt certain plastics.
Do not store the device in cold areas. When the device returns to its normal temperature,
moisture can form inside the device and damage electronic circuit boards.
Do not attempt to open the device.
Do not drop, knock, or shake the device. Rough handling can break internal circuit
boards and fine mechanics.
Do not use harsh chemicals, cleaning solvents, or strong detergents to clean the device.
Do not paint the device. Paint can clog the moving parts and prevent proper operation.
Unauthorized modifications or attachments could damage the device and may violate
regulations governing radio devices.
These suggestions apply equally to your device, battery, charger, or any enhancement. If any
device is not working properly, take it to the nearest authorized service facility for service.
3.2 Regulatory Information
Disposal of Waste Equipment by Users in Private Household in the European Union
This symbol on the product or on its packaging indicates that this product must
not be disposed of with your other household waste. Instead, it is your
responsibility to dispose of your waste equipment by handing it over to a
designated collection point for the recycling of waste electrical and electronic
equipment. The separate collection and recycling of your waste equipment at the
time of disposal will help to conserve natural resources and ensure that it is
recycled in a manner that protects human health and the environment. For more information
about where you can drop off your waste equipment for recycling, please contact your local city
office, your household waste disposal service or the shop where you purchased the product.
We hereby declare that the product is in compliance with the essential
requirements and other relevant provisions of European Directive 1999/5/EC
(radio equipment and telecommunications terminal equipment Directive).
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TAM-3517 HARDWARE MANUAL rev B
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Federal Communications Commission (FCC) Unintentional emitter per
FCC Part 15
This device has been tested and found to comply with the limits for a Class B
digital device, pursuant to Part 15 of the FCC rules. These limits are designed
to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instructions, may cause harmful interference to radio
or television reception. However, there is no guarantee that interference will not occur in a
particular installation. If this equipment does cause interference to radio and television reception,
which can be determined by turning the equipment off and on, the user is encouraged to try to
correct the interference by one or more of the following measures:
■ Reorient or relocate the receiving antenna
■ Increase the separation between the equipment and receiver
■ Connect the equipment to an outlet on a different circuit from that to which the receiver is
connected
■ Consult the dealer or an experienced radio/TV technician for help.
WARNING! To reduce the possibility of heat-related injuries or of overheating
the computer, do not place the computer directly on your lap or obstruct the
computer air vents. Use the computer only on a hard, flat surface. Do not allow
another hard surface, such as an adjoining optional printer, or a soft surface,
such as pillows or rugs or clothing, to block airflow. Also, do not allow the AC
adapter to contact the skin or a soft surface, such as pillows or rugs or clothing, during operation.
The computer and the AC adapter comply with the user-accessible surface temperature limits
defined by the International Standard for Safety of Information Technology Equipment (IEC
60950).
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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4Description
The TAM-3517 Is a highly integrated System on Module (SOM) containing the TI ARM Cortex
A8 Sitara AM3517 processor, Wireless LAN, USB PHY, LAN PHY, CAN Bus, Memory and
NAND Flash.
The AM3517 ARM Microprocessors are integrated on TI's advanced 65-nm process technology.
These devices are designed to provide maximum flexibility for ARM based applications
including, but not limited to, Industrial Automation/Control, Single Board Computers, and Human
Machine Interface.
These devices also feature M-Shield™ mobile security technology to enable secure e-
commerce applications and the replay of copyright-protected digital media content.
Applications:
• Portable Data Terminals
• Navigation
• Auto Infotainment
• Medical Imaging
• Home Automation
• Human Interface
• Industrial Control
• Test and Measurement
• Single board Computers
The device can support numerous HLOS and RTOS solutions including Linux, Android and
Windows Embedded CE by TechNexion and/ or third parties.
There are 2 versions: the TAM-3517W with Wi-Fi (used for example in the development kits)
and the TAM-3517 without Wi-Fi (used for example in the HMI). Other configurations can be
discussed with our sales (for example with extended or industrial temperature).
One can always check our website ( www.technexion.com ) for additional product detail
information, mechanical design files, software programming guides, source code software and
custom baseboard creation guideline.
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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4.1 Block Diagram TAM-3517 System on Module
Note: TAM-3517W includes Wi-Fi; TAM-3517 does not have Wi-Fi
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TAM-3517 HARDWARE MANUAL rev B
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4.2 Functional Block Diagram CPU
The functional block diagram of the AM3517 Sitara ARM Processor is shown below.
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TAM-3517 HARDWARE MANUAL rev B
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5System Components
5.1 CPU: AM-3517
5.1.1 AM-3517 Sitara ARM Processor Features
MPU Subsystem
o600-Mhz Sitara™ ARM® Cortex-A8™ Core
oNEON SIMD Coprocessor and Vector floating point (FP) co-processor
Memory Interfaces:
o166 MHz 16/32-bit mDDR/DDR2 Interface with 1 GByte total addressable space
oUp to 83 MHz General Purpose Memory Interface supporting 16-bit Wide
Multiplexed Address/Data bus
o64 K-Byte shared SRAM
o3 Removable Media Interfaces [MMC/SD/SDIO]
IO Voltage:
omDDR/DDR2 IOs: 1.8V
oOther IOs: 3.3V
Core Voltage: 1.2V
Commercial and Extended Temperature Grade (operating restrictions apply)
16-bit Video Input Port capable of capturing HD video
491-pin sBGA package (17x17, .65 mm pitch)
HD resolution Display Subsystem
Serial Communication
oHigh-End CAN Controller
o10/100 Mbit Ethernet MAC
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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5.2 PMIC: TPS-65023
5.2.1 TPS-65023 –Introduction
The TPS65023 is an integrated Power Management IC for applications powered by one Li-Ion
or Li-Polymer cell, and which require multiple power rails. The TPS65023 provides three highly
efficient, step-down converters targeted at providing the core voltage, peripheral, I/O and
memory rails in a processor based system. The core converter allows for on-the-fly voltage
changes via serial interface, allowing the system to implement dynamic power savings. All three
step-down converters enter a low-power mode at light load for maximum efficiency across the
widest possible range of load currents. The TPS65023 also integrates two general-purpose 200
mA LDO voltage regulators, which are enabled with an external input pin.
5.2.2 TPS-65023 Features
1.7 A, 90% Efficient Step-Down Converter for Processor Core (VDCDC1)
1.2 A, Up to 95% Efficient Step-Down Converter for System Voltage (VDCDC2)
1.0 A, 92% Efficient Step-Down Converter for Memory Voltage (VDCDC3)
30 mA LDO/Switch for Real Time Clock (VRTC)
2 × 200 mA General-Purpose LDO
Dynamic Voltage Management for Processor Core
Preselectable LDO Voltage Using Two Digital Input Pins
Externally Adjustable Reset Delay Time
Battery Backup Functionality
Separate Enable Pins for Inductive Converters
I2C Compatible Serial Interface
I2C Setup and Hold Timing:
oTPS65023: 300ns
oTPS65023B: 100ns
I2C Setup and Hold Timing:
oSN0901059: 300ns
oSN0901059B: 100ns
85-µA Quiescent Current
Low Ripple PFM Mode
Thermal Shutdown Protection
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TAM-3517 HARDWARE MANUAL rev B
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5.3 Memory
5.3.1 Hynix H5PS1G63EFR (option 1)
The TAM-3517 has a single channel 32 bit External Memory Interfaces (EMI) controller.
The 32 bit wide channel is connected 16 bit wide to two Hynix H5PS1G63EFR DDR2 SDRAM
Chips. The SDRAM_nCS0 signal is used to select them.
The standard configuration is organized as1Gbit (4Bank x 16M x 16bits). Therefore given 2
chips are used a total of 2Gbit or 256MB of memory is available.
Features:
VDD = 1.8 +/- 0.1V
VDDQ = 1.8 +/- 0.1V
All inputs and outputs are compatible with SSTL_18 interface
8 banks
Fully differential clock inputs (CK, /CK) operation
Double data rate interface
Source synchronous-data transaction aligned to bidirectional data strobe (DQS, DQS)
Differential Data Strobe (DQS, DQS)
Data outputs on DQS, DQS edges when read (edged DQ)
Data inputs on DQS centers when write(centered DQ)
On chip DLL align DQ, DQS and DQS transition with CK transition
DM mask write data-in at the both rising and falling edges of the data strobe
All addresses and control inputs except data, data strobes and data masks latched on
the rising edges of the clock
Programmable CAS latency 3,4, 5, 6 and 7 supported
Programmable additive latency 0, 1, 2, 3, 4 and 5 supported
Programmable burst length 4/8 with both nibble sequential and interleave mode
Internal eight bank operations with single pulsed RAS
Auto refresh and self refresh supported
tRAS lockout supported
8K refresh cycles /64ms
JEDEC standard 84ball FBGA(x16)
Full strength driver option controlled by EMR
On Die Termination supported
Off Chip Driver Impedance Adjustment supported
Read Data Strobe supported (x8 only)
Self-Refresh High Temperature Entry
Average Refresh Period 7.8us at lower than Tcase 85°C, 3.9us at 85°C<Tcase<95°C
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TAM-3517 HARDWARE MANUAL rev B
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5.3.2 Micron MT47H64M16 (option 2)
The TAM-3517 has a single channel 32 bit External Memory Interfaces (EMI) controller.
The 32 bit wide channel is connected 16 bit wide to two Micron MT47H64M16 DDR2 SDRAM
Chips. The SDRAM_nCS0 signal is used to select them.
The standard configuration is organized as1Gbit (8M x 16bits x 8 banks). Therefore, given 2
chips are used; a total of 2Gbit or 256MB of memory is available.
Features:
VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V
JEDEC-standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
4n-bit prefetch architecture
Duplicate output strobe (RDQS) option for x8
DLL to align DQ and DQS transitions with CK
8 internal banks for concurrent operation
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency - 1 tCK
Selectable burst lengths (BL): 4 or 8
Adjustable data-output drive strength
64ms, 8192-cycle refresh
On-die termination (ODT)
Industrial temperature (IT) option
RoHS-compliant
Supports JEDEC clock jitter specification
This memory is compatible with the Hynix memory and uses the same software.
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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5.3.3 Nanya NT5TU64M16GG (option 3)
The TAM-3517 has a single channel 32 bit External Memory Interfaces (EMI) controller.
The 32 bit wide channel is connected 16 bit wide to two Nanya NT5TU64M16GG DDR2
SDRAM Chips. The SDRAM_nCS0 signal is used to select them.
The standard configuration is organized as1Gbit (8M x 16bits x 8 banks). Therefore, given 2
chips are used; a total of 2Gbit or 256MB of memory is available.
Features:
1.8V ± 0.1V Power Supply Voltage
8 internal memory banks
Programmable CAS Latency: 3, 4, 5 (DDR2-3C/-3CI/-AC/-ACI/-ACL), 6 (-BD), 7 (-BE)
Programmable Additive Latency: 0, 1, 2, 3, 4 5
Write Latency = Read Latency -1
Programmable Burst Length:
4 and 8 Programmable Sequential / Interleave Burst
OCD (Off-Chip Driver Impedance Adjustment)
ODT (On-Die Termination)
4n-bit prefetch architecture
Data-Strobes: Bidirectional, Differential
Support Industrial grade temperature -40℃~95, Operating Temperature (-3CI/-ACI)
2KB page size for x16
Strong and Weak Strength Data-Output Driver
Auto-Refresh and Self-Refresh
Power Saving Power-Down modes
7.8 μs max. Average Periodic Refresh Interval
RoHS Compliance
Packages:
84-Ball BGA for x16 components
This memory is compatible with the Hynix memory and uses the same software.
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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5.4 NAND Flash
5.4.1 Micron MT29F4G16ABBDAHC
NAND on the TAM-3517 is populated as Micron MT29F4G16ABBDAHC and connected 16 bit
wide to the AM3517 GPMC bus.
The default TAM-3517 supports the chip which provides 512MB of addressable space.
The GPMC_nCS0 signal is used for its selection.
Features:
•Open NAND Flash Interface (ONFI) 1.0-compliant
•Single-level cell (SLC) technology
•Organization
Page size x8: 2112 bytes (2048 + 64 bytes)
Page size x16: 1056 words (1024 + 32 words)
Block size: 64 pages (128K + 4K bytes)
Plane size: 2 planes x 2048 blocks per plane
Device size: 4Gb: 4096 blocks;
•Array performance
Read page: 25μs 3
Program page: 200μs (TYP: 1.8V, 3.3V)3
Erase block: 700μs (TYP)
• Command set: ONFI NAND Flash Protocol
• Advanced command set
Program page cache mode4
Read page cache mode 4
One-time programmable (OTP) mode
Two-plane commands 4
Interleaved die (LUN) operations
Read unique ID
Block lock (1.8V only)
Internal data move
• Operation status byte provides software method for
detecting
Operation completion
Pass/fail condition
Write-protect status
• Ready/Busy# (R/B#) signal provides a hardware
method of detecting operation completion
• WP# signal: Write protect entire device
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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5.4.2 MT29F2G16ABDHC-ET
NAND on the TAM-3517 is populated as Micron MT29F2G16ABDHC and connected 16 bit wide
to the AM3517 GPMC bus.
The TAM-3517 supports the chip which provides 256MB of addressable space.
The GPMC_nCS0 signal is used for its selection.
Features:
• Open NAND Flash Interface (ONFI) 1.0-compliant
• Single-level cell (SLC) technology
• Organization
Page size:
• x8: 2,112 bytes (2,048 + 64 bytes)
• x16: 1,056 words (1,024 + 32 words)
Block size: 64 pages (128K + 4K bytes)
Device size: 2Gb: 2,048 blocks
• READ performance
Random READ: 25μs
Sequential READ: 25ns (3.3V)
Sequential READ: 35ns (1.8V)
• WRITE performance
PROGRAM PAGE: 220μs (TYP, 3.3V)
PROGRAM PAGE: 300μs (TYP, 1.8V)
BLOCK ERASE: 500μs (TYP)
• Data retention: 10 years
• Endurance: 100,000 PROGRAM/ERASE cycles
• First block (block address 00h) guaranteed to be valid with ECC when shipped from factory
• Industry-standard basic NAND Flash command set
• Advanced command set:
PROGRAM PAGE CACHE MODE
PAGE READ CACHE MODE
One-time programmable (OTP) commands
BLOCK LOCK (1.8V only)
PROGRAMMABLE DRIVE STRENGTH
READ UNIQUE ID
• Operation status byte provides a software method of detecting:
Operation completion
Pass/fail condition
Write-protect status
• Ready/busy# (R/B#) signal provides a hardware method of detecting operation completion
• WP# signal: write protect entire device
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
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5.5 Network PHY: SMSC LAN8710A
SMSC's LAN8710A is a high-performance, small-footprint, low-power 10BASE-T/100BASE-TX
transceivers specifically designed for today's consumer electronics, industrial and enterprise
applications. The LAN8710A is the industry's smallest footprint solution with up to 40% lower
power consumption than existing SMSC transceivers. The LAN8710A has an integrated voltage
regulator and ESD protection components to help reduce Bill of Material (BOM) costs.
The LAN8710A connects to the MAC layer using a variable voltage, digital standard MII or RMII
interface. The device supports HP Auto-MDIX†, employs SMSC's proprietary flexPWR
technology and is available in both extended commercial (0° to 85°C) and industrial (-40° to
85°C) temperature range options.
Qualified Magnetics –Magnetics listed under this heading have been tested in order to verify
proper operation with the specific device listed with it.
Suggested magnetic –Magnetics listed under this heading have not been tested in order to
verify proper operation with the specific device listed with it. This category of magnetic has been
evaluated by the contents of the vendor supplied datasheet and legacy performance only.
Vendor
Part Number
Package
Temp
Qualified Magnetics
UDE
RT7-115A1K1A
Integrated RJ45
0° - +70° C
Pulse
H1102
16-pin SOIC
0° - +70° C
Halo
TG110-RP55N5
16-pin SOIC
0° - +70° C
Halo
HFJ11-RP26E- L12RL
Integrated RJ45
0° - +70° C
Delta
RJSE1R5310A
Integrated RJ45
0° - +70° C
Pulse
HX1188
16-pin SOIC
-40° - +85° C
Halo
TG110-RPE5N5
16-pin SOIC
-40° - +85° C
Halo
HFJ11-RPE26E-L12RL
Integrated RJ45
-40° - +85° C
TDK
TLA-6T717W
Integrated RJ45
-40° - +85° C
Delta
LFE8505T
16-pin SOIC
-40° - +85° C
Suggested Magnetics
Pulse
J0011D01B
Integrated RJ45
0° - +70° C
Midcom
000-7219-35
Cardbus
0° - +70° C
Bothhand
TS6121C
16-pin SOIC
0° - +70° C
Bothhand
LU1S041X-43
Integrated RJ45
0° - +70° C
Midcom
000-7090-37R
16-pin SOIC
-40° - +85° C
Midcom
MIC66211-5171T- LF3
Integrated RJ45
-40° - +85° C
Elec & Eltek
820-M0323R
16-pin SOIC
-40° - +85° C
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TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
20
5.6 USB PHY
The SMSC USB3320 is a Hi-Speed USB 2.0 transceiver that provides a configurable physical
layer (PHY) solution and is an excellent macth for a wide variety of products. USB3320 uses the
industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB Transceiver to the link.
ULPI uses a method of in-band signalling and status byte transfers between the link and
transceiver to facilitate a USB session with only 12 pins.
5.7 WiFi Module
(This module is included on the TAM-3517W; the TAM-3517 does not have Wi-Fi)
The Marvell® 88W8686 is a low-power highly-integrated IEEE 802.11g/b MAC/Baseband/RF
WLAN system-on-chip (SoC), designed to support IEEE 802.11g payload data rates of 6, 9, 12,
18, 24, 36, 48, and 54 Mbps, as well as 802.11b data rates of 1, 2, 5.5, and 11 Mbps.
General features:
Ultra low-power dissipation
Single-chip integration of 802.11 g/b wireless RF and baseband, MAC, CPU, memory,
and host interfaces
Integrates all RF to baseband transmit and receive operations, with support for external
PAs
Fully integrated frequency synthesizers with optimized phase noise performance for
OFDM applications
Integrated direct conversion WLAN RF radio
Supports 19.2, 20, 24, 26, 38.4, and 40 MHz oscillator clock sources
Software backward compatible with 88W8385 and 88W8015 devices
5.7.1 WiFi Signals Description
SIGNAL NAME
DESCRIPTION
MMC2_CLK
Clock
MMC2_CMD
Command
MMC2_d0
4 bit data
MMC2_d1
4 bit data
MMC2_d2
4 bit data
MMC2_d3
4 bit data
GPIO 156
Wifi enable –power on/ off
GPIO 57
Wifi working (LED will flash)
SYS-nRESPWRON
Wifi reset
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