Tektronix 7B53A User manual

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_7B53A/7B53AN |
DUAL TIME: BASE.
INSTRUCTION MANUAL
Tektronix, Inc. -@ P.O.Box 500 -® Beaverton, Oregon 97005 -® Serial No. V0 @ — UZ
070-1342-00
972

questions with warranty should be taken up _
with your TEK d Engineer or representative.
Printed in the United States of America. All rights ‘reserved.
Contents of this publication may not be reproduced in any
form without permission of Tektronix, Inc.
U.S.A. and foreign TEKTRONIX products covered by U.S.
and foreign patents and/or patents pending.
TEKTRONIX is a registered trademark of Tektronix, Inc.

7B53A4/7B53AN Service
TABLE OF CONTENTS
SECTION 1 OPERATING INFORMATION Page SECTION4 CALIBRATION Page
Introduction 1-1 Introduction 4-1
Controls and Connectors 1-2 TEKTRONIX Field Service 4-1
General 1-2 Using This Procedure 4-1
Main Triggering Controls 1-2 Test Equipment Required 4-1
Sweep Controls 1-2 Preliminary Control Settings 4-3
Delay Time Control 1-4 Part |~Performance Check 4-4
Delayed Triggering Controls 1-4 Introduction 4-4
Input/Output Connectors 1-4 Index to Part I—Performance Check 4-4
Preliminary Procedure for
Performance Check 4-4
SECTION 2 CIRCUIT DESCRIPTION Trigger System Check 45
Horizontal System Check 4-12
introduction 2-1 Output Signals Check 4-19
Simplified Block Diagram Discussion 2-1 Part I|—Adjustment 4-20
Circuit Operation 2-4 Introduction 4-20
General 2.4 Index to Part Il—Adjustment 4-20
Main Trigger Preamp 2.4 Preliminary Procedure for
Adjustment 4-20
Main Trigger Generator 2-6
Trigger System Adjustment 4-21
Main Sweep Generator 2-8
: Horizontal System Adjustment 4-23
Delayed Trigger Generator 2-11
Delayed Sweep Generator 2-12
Horizontal Preamp 2-14 SECTION 5 ELECTRICAL PARTS LIST
SECTION6 DIAGRAMS AND CIRCUIT BOARD
SECTION3
MAINTENANCE
ILLUSTRATIONS
Introduction 3-1
Preventive Maintenance 3-1 SECTION 7. MECHANICAL PARTS LIST
Troubleshooting 3-1
Corrective Maintenance 3-3 CHANGE INFORMATION
NOTE
Refer to the 7B53A/7B53AN Operators manual for
specifications and complete operating instructions.

MAIN TRIGGERING
AMPLIFIER.
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7B53A/7B53AN Features
The 7B53A and 7B53AN Dual Time Base units provide Main, Intensified, Delayed, and Mixed sweep operation for
TEKTRONIX 7000-Series Oscilloscopes. Calibrated sweep rates from 5 s/DIV (5 nanoseconds with X10 magnification) and
triggering to 100 megahertz are provided. The 7B53A and 7B53AN are electrically identical except that only the 7B53A is
compatible with the alphanumeric readout system provided for 7000-Series Oscilloscopes.
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Other features include 0 to 10 times continuous sweep delay, variable main and delayed sweep rates, and variable main
sweep holdoff. Separate triggering controls are provided for main and delayed sweep triggering, and when operating in the
AUTO MAIN TRIGGERING MODE, a bright base line is displayed in the absence of a trigger signal. The 7B53A/7B53AN
can also be used as an amplifier for X-Y operation.
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DUAL TIME BASE
Ls TBEBAN joiuu smcmmmmne
Fig. 1-1. 7B53A/7B53AN Dual Time Base Units.
7B53A/7B53AN Service

Section 1-7B53A/7B53AN Service
OPERATING INFORMATION
Brief operating information is given in this section, for
more detailed instructions, refer to the 7B53A/7B53AN
Operators Manual.
Before operating the 7B53A/7B53AN it is necessary to
check the settings of the Variable Selector multi-pin
connector (P140) and the Delayed Sweep Gate Out
muilti-pin connector (P613). The Variable Selector multi-
pin connector (P140) determines whether the front-panel
VARIABLE control varies main sweep rates, delayed sweep
rates, or the main sweep holdoff. The Delayed Sweep Gate
Out multi-pin connector (P613) determines whether or not
the Delayed Sweep Gate out signal is connected to the
front-panel DLY’D TRIG IN connector. Refer to
VARIABLE control and Delayed Sweep Gate out infor-
mation in this section for additional instructions.
Variable Selector Connector
(P140)
Ly
P613
4
Delayed Gate Out
Signal Connected
to DLY‘D TRIG IN
Connector
P613 4 U
Delayed Gate Out
Signal Disconnected
from DLY’D TRIG IN
Connector
(P613)
Delayed Gate Out Connector
(P613)
Right Side
Of instrument
Variable Delayed
Sweep Rates
Variable Main
Sweep Rates
Variable Main
Sweep Holdoff
Left Side
Of Instrument
Fig. 1-2. Location of Delayed Sweep Gate Out and Variable Selector multi-pin connectors.
@ REV. APR 1974 1-1

Operating Information—7B53A/7B53AN Service
CONTROLS AND CONNECTORS
General
All controls required for the operation of the 7B53A/
7B53AN, except the Variable Selector and the Diy’d Sweep
Gate Out connector (see Fig. 1-2), are located on the front
panel of the instrument. To make full use of the capabilities
of this instrument, the operator should be familiar with the
function and use of each control. A brief description of the
front-panel controls and connectors is given here. More
detailed information is given under General Operating
Information in the 7B53A/7B53AN Operators Manual. Fig.
1-3 shows the front panel and external controls and
connectors of the 7B53A/7B53AN.
Qa) Main Triggering Controls
LEVEL. Selects the amplitude point on the trigger
signal where sweep triggering occurs.
SLOPE. Two-position switch permits triggering on the
positive-going or negative-going portion of the main trigger-
ing signal.
TRIG’D. Light indicates that the main sweep is
triggered and will produce a display.
MODE. Pushbutton switches select the operating mode
for the main triggering circuits.
COUPLING. Pushbutton switches select the method of
coupling the triggering signal to the main triggering circuits.
SOURCE. Pushbutton switches select the source of the
main triggering signal.
(2) Sweep Controls
TIME/DIV OR DLY TIME. Selects the sweep rate of
the main sweep generator (see Fig. 1-4).
DLY’D Time/Division. Selects the sweep rate of the
delayed sweep generator and selects the MAIN SWP,
INTEN, and DLY‘D SWP Display Modes (see Fig. 1-4).
MAIN
@) TRIGGERING
CONTROLS
SWEEP
CONTROLS
DELAY
(3) TIME
CONTROL
FERTRONIX® |
-7BS3A___ DUAL TIME BASE
MAIN TRIGGERING | '
AMPLIFIER
‘MODE © COUPLING SOURCE
DELAYED
() TRIGGERING
CONTROLS
INPUT/OUTPUT
CONNECTORS
Fig. 1-3. Front-panel controls and connectors.
1-2

VARIABLE. Combination switch and control provides
variable main sweep rates, variable delayed sweep rates, or
variable main sweep holdoff: depending on the connection
of the multi-pin connector P140 (internal). The
VARIABLE control may also be pulled outward to select
the MIXED Display Mode, when operating in the DLY‘D
SWP Display Mode, see Fig. 1-4.
Variable Sweep Rates: Variable sweep rates for the main
or delayed sweep generators may be obtained when P140 is
properly connected, see Fig. 1-2. When the front-panel
VARIABLE control is rotated out of the detent position,
the VARIABLE control is activated for variable sweep rates
(uncalibrated).
Variable Holdoff: Variable main sweep holdoff can be
obtained when P140 is connected for this function, see Fig.
1-2.
When
the
VARIABLE
control
is
rotated
out
of
the
detent
position,
the
holdoff
duration
may
be
varied.
Variable
holdoff
is
used
to
provide
a
stable
display
of
repetitive complex waveforms.
Display Mode. Four display modes can be selected by
the following switch settings:
SSwE'7] ACHERES
oe |
RESET pe ext +10
Swe og) oy
CAL READY eu
VARIABLE — PULL POR MIXED swP
© TIME/DIV or DLY TIME
Operating Information—7B53A/7B53AN Service
MAIN SWP: The MAIN SWP mode (non-delayed) is
selected when the TIME/DIV OR DLY TIME switch and
the DLY’D Time/Division switch are locked together at the
same sweep rate.
INTEN:
The
INTEN
mode,
a
function
of
the
main
and
delayed
sweeps,
is
selected
when
the
DLY'D
Time/Division
switch
is
pulled
out.
In
this
mode,
a
portion
of
the
main
sweep
is
intensified
during
the
time
that
the
delayed
sweep
runs.
DLY’D SWP: The DLY’D SWP mode is selected when
the DLY’D Time/Division switch is pulled out, rotated in
the INTEN mode for the desired delayed sweep rate, and
then pushed in. In this mode, the delayed sweep is
displayed at a rate determined by the DLY’D Time/Division
switch at the end of each delay period, as determined by
TIME/DIV OR DLY TIME switch and the DELAY TIME
MULT dial settings.
MIXED: The MIXED mode is selected when the DLY'D
SWP mode is selected and the VARIABLE knob is pulled
out.
In
the
MIXED
mode,
the
main
sweep
is
displayed
on
the CRT to a point determined by the DELAY TIME
MULT
dial;
the
remainder
of
the
sweep
is
at
the
rate
determined by the delayed sweep.
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MAIN TRIG IN OLY'D TRIG IN
TIME/DIV OR DLY TIME switch
Brackets enclose main sweep rate or de-
lay time (depending on Display Mode)
DLY’'D Time/Division
switch
Selects MAIN SWP, INTEN, and DLY‘D
SWP Display Modes
Dot indicates delayed sweep rate
VARIABLE contral
Varies main sweep rates, delayed sweep
rates, or main sweep holdoff; depending
on the connection of P140 (internal)
Selects MIXED Display Mode
Fig. 1-4. Composite Time/Division switch.
1-3

Operating Information—7B53A/7B53AN Service
SWP CAL. Screwdriver adjustment to match the gain of
the 7B53A/7B53AN to the indicator oscilloscope for
calibrated sweep rates.
POSITION. Controls horizontal position of display.
FINE. Provides precise control of horizontal position
adjustment.
MAG. Pushbutton switch selects X1 or X10 horizontal
magnification.
(3) Delay Time Control
DELAY TIME MULT. Provides variable sweep delay
between 0.00 and 10.0 times the delay time indicated by
the TIME/DIV OR DLY TIME switch.
Delayed Triggering Controls
LEVEL. Selects the RUNS AFTER DLY TIME or
Triggerable After Diy Time Modes, and the amplitude point
at which the delayed sweep is triggered.
SLOPE. Two-position switch permits triggering on the
positive-going or negative-going portion of the delayed
triggering signal.
COUPLING. Two-position switch selects the method of
coupling the triggering signal to the delayed triggering
circuits.
SOURCE. Two-position switch to select the source of
the delayed triggering signal.
G6) Input/Output Connectors
MAIN TRIG IN OR AMP HIN. Front-panel
connector serves two different input functions.
BNC
MAIN TRIG IN: External trigger input for the main
triggering circuit. The SOURCE switch for MAIN
TRIGGERING must be set to EXT or EXT +10 and the
TIME/DIV or DLY'D TIME switch set to any position
except AMPL.
AMPL: When the TIME/DIV OR DLY’D TIME switch is
set to AMPL and the MAIN TRIGGERING SOURCE
switch is set to the EXT or EXT +10 position, this
connector serves as an External Horizontal Input.
DLY’D TRIG IN. Front-panel BNC connector serves
two input functions.
DLY’D TRIG IN: When the Delayed Triggering
SOURCE switch is set to EXT, this connector serves as an
external trigger input for the delayed triggering circuit.
Delayed Sweep Gate Out: When the DLY’D TRIG
SOURCE switch is set to INT, P613 is properly connected
(see Fig. 1-2), and the delayed sweep generator is running
(INTEN, DLY‘'D SWP, or MIXED Display Mode) the
DLY’D TRIG IN connector serves as a Delayed Sweep Gate
Output. The Delayed Sweep Gate signal is a rectangular
positive-going pulse with approximately 3.0 volts amplitude
and pulse width coincident with the delayed sweep.

Section 2—7B53A/7B53AN Service
CIRCUIT DESCRIPTION
Introduction
This section of the manual contains a description of the
circuitry used in the 7B53A/7B53AN Dual Time Base. The
description begins with a discussion of the major circuit
functions using a simplified block diagram.
SIMPLIFIED BLOCK DIAGRAM
The Simplified Block Diagram, Fig. 2-1, shows inter-
connection of the basic circuit blocks in the 7B53A/
7B53AN. In some cases, such as the Main Sweep Trigger,
the block includes a number of separate circuits. The
individual circuits are discussed in detail later in this
section.
Main Sweep Mode
When the TIME/DIV OR DLY TIME switch is set to
select MAIN SWP, operation is as follows:
Main Sweep Trigger. This block includes circuitry for
selecting the trigger source, type of coupling, triggering
mode, and point on the trigger signal where triggering
occurs. Also, regardless of the trigger signal shape or
amplitude (within specification), this circuitry provides a
fast-rise, uniform-amplitude pulse to the Main Sweep Start
Comparator. Termination of the pulse (or gate} occurs at
the rise of Main Sweep Holdoff.
Main Sweep Start Comparator. This circuit is activated
by the positive gate from the Main Sweep Trigger. The
output signal coupled to the Main Sawtooth Generator is a
positive gate with the same duration as the sweep. This gate
is also coupled to the Sweep Gate Out. A negative-going
gate (coincident with the positive gate) is coupled to the
Delayed Sweep Lockout Multi and the Delayed Sweep Start
Control.
Main Sawtooth Generator. The main sweep signal is
developed by the Main Sawtooth Generator. When a
positive gate from the Main Sweep Start Comparator is
applied, a sawtooth waveform is generated. The sawtooth
duration is determined by the positive gate duration. Rate
of change of the sawtooth is set by Ct and Rt, selected by
the TIME/DIV switch.
Sweep Stop Comparator. One side of this comparator is
driven by the main sweep sawtooth signal, and the other
side is set by the Main Swp Stop adjustment. When the
@i
sawtooth waveform passes through the setting of the Main
Swp Stop adjustment, the output of the Sweep Stop
Comparator switches to a positive level. This positive step is
applied to the Main Sweep Holdoff.
Main Sweep Holdoff. This circuit develops a gate which
is used to prevent generation of a trigger signal until the
sweep circuits have stabilized after a sweep. The positive
step from the Sweep Stop Comparator initiates the positive
holdoff gate. The duration of the hold off gate is variable,
depending on the setting of the TIME/DIV OR DLY TIME
switch. Holdoff timing capacitors are separate from sweep
timing capacitors. Holdoff is longer for slower sweep rates.
Output from the Main Sweep Holdoff is coupled to the
Main Sweep Trigger and the Delayed Sweep Holdoff circuit.
A trigger signal cannot be generated during the holdoff
interval. The holdoff serves to reset the trigger circuits so
that they are ready to receive an input trigger signal after
holdoff.
Horiz Output. The Horiz Output block includes the Ext
Horiz Amp, Position Amp, Horiz Display Selector, and
Horiz Out Amp circuits.
With the TIME/DIV OR DLY TIME switch set for main
sweep, this circuit selects the signal from the Main
Sawtooth Generator, amplifies the signal, and converts the
single-ended input to a push-pull output signal. DC posi-
tioning level is also applied to this block.
Delayed Sweep Mode
To generate the delayed sweep, the Main Sawtooth
Generator must first be gated on (see Main Sweep Mode).
Delay Pickoff. This circuit supplies a positive gate which
starts when the main sawtooth signal passes through the
level selected by the DELAY TIME MULT control. The
gate ends with the main sawtooth signal. The output signal
is coupled to the Delayed Sweep Holdoff circuitry.
Delayed Sweep Trigger. When the DLY’D TRIG LEVEL
is set to RUNS AFTER DLY TIME (into switch detent),
the output trigger is generated as soon as the delayed gate is
applied. If the DLY’D TRIG LEVEL control is in the
triggerable mode (out of switch detent), the output trigger
is initiated by the next input trigger that occurs after the
Delay Gate is applied.
2-1

Circuit Description—7B53A/7B53AN Service
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2-2

The Delayed Sweep Trigger output is a positive gate
which is terminated by the Holdoff signal or the positive
step from the Delayed Sweep Stop circuit. The positive
output gate is coupled to the Delayed Sweep Start Multi.
Delayed Sweep Start Multi. The signal from the Delayed
Sweep Trigger causes the Delayed Sweep Start Multi to flip
so that a positive gate is coupled to the Delayed Sweep
Start Control, and a negative gate is applied to the Mixed
Sweep Comparator. The output gates are the same in
duration as the positive gate from the Delayed Sweep
Trigger.
Delayed Sweep Start Control. For delayed sweep mode
of operation the Delayed Sweep Start Control serves to
couple the positive gate from the Delayed Sweep Start
Multi to the Delayed Sawtooth Generator and the Sweep
Gate Out.
Input signals from the Main Sweep Start Comparator
and the Delayed Sweep Lockout Multi are not effective in
this mode.
Delayed Sawtooth Generator. The delayed sweep signal
is developed by the Delayed Sawtooth Generator. The
sawtooth is generated during the time that a positive gate is
applied from the Delayed Sweep Start Control. Rate of
change of the sawtooth is set by Ct and Rt, selected by the
TIME/DIV (Dly‘d) switch.
The sawtooth output signal is coupled to the Mixed
Sweep Comparator and the Horiz Output circuits.
Delayed Sweep Stop Circuit. A positive step occurs at
the output of the Delayed Sweep Stop circuit when the
delayed sawtooth passes through the level selected by the
Diy'd Swp Length adjustment. This step is coupled to the
Delayed Sweep Trigger and the Delayed Sweep Lockout
Multi.
Mixed Sweep Mode
In this mode of operation, the sweep is first running at
the main sweep rate and then, after the selected delay
interval, runs at the delayed sweep rate. The main sweep
and delayed sweep are initiated as previously described.
Operation of other circuit blocks follows.
Circuit Description—7B53A/7B53AN Service
Mixed Sweep Comparator. This circuit determines
whether the delayed sweep generator runs at the main
sweep rate or at the delayed sweep rate. Before the delay
gate is generated (delay gate generated at delay pickoff as
determined by the setting of the DELAY TIME MULT dial)
the main sweep sawtooth signal is coupled through the
Mixed Sweep Comparator, causing the delayed sweep
generator to run at the main sweep rate. The resulting
sawtooth signal is coupled to the Horizontal Output stage.
When a positive gate from the Delayed Sweep Trigger is
applied to the Delayed Sweep Start Multi (at Delay Pickoff
as determined by the DELAY TIME MULT dial setting} a
negative gate is generated and coupled to the Mixed Sweep
Comparator. This opens the Mixed Sweep Comparator,
preventing the Delayed Sweep Generator from running at
the main sweep rate. Simultaneously, the Delayed Sweep
Generator is released to run at the delayed sweep rate.
Delayed Sweep Lockout Multi. The positive step from
the Delayed Sweep Stop circuit is inverted by the Delayed
Sweep Lockout Multi and coupled to the Delayed Sweep
Start Control, thus turning off the Delayed Sawtooth
Generator.
Sweep Gate Out. Depending on the selection of the
TIME/DIV switch, this stage couples the positive gate from
either the Main Sweep Start Multi or the Delayed Sweep
Start Control to connector Ail. The Sweep Gate signal
serves to unblank the CRT in the Oscilloscope during the
sweep.
External Horiz Input
When the TIME/DIV switch is set to AMPL, part of the
Main Sweep Trigger circuitry becomes the Horiz Input
Amp. An external signal connected to the MAIN TRIG IN
or AMPL input is amplified and then coupled to the Horiz
Output stage. The main and delayed sawtooth generators
are disabled to prevent intensity modulation of the CRT
trace by the unblanking waveforms.
2-3

Circuit Description—7B53A/7B53AN Service
CIRCUIT OPERATION
General
This section provides a detailed description of the
electrical operation and relationship of the circuits in the
7B53A/7B53AN. The theory of operation for circuits
unique to this instrument is described in detail in this
discussion. Circuits which are commonly used in the
electronics industry are not described in detail. If more
information is desired in these commonly used circuits,
refer to the following text-books.
TEKTRONIX Circuit Concepts Books (order from your
local TEKTRONIX Field Office or representatives).
Horizontal Amplifier Circuits, TEKTRONIX Part No.
062-1144-00.
Oscilloscope Trigger Circuits, TEKTRONIX Part No.
062-1056-00.
Sweep Generator Circuits, TEKTRONIX Part No.
062-1098-01.
Phillip Cutler, ‘Semiconductor Circuit Analysis’,
McGraw-Hill, New York, 1964.
Lloyd P. Hunter (Ed.), ‘Handbook of Semiconductor
Electronics’, second edition, McGraw-Hill, New York,
1962.
Jacob Millman and Herbert Taub, ‘Pulse, Digital, and
Switching Waveforms”, McGraw-Hill, New York, 1965.
2-4
The main headings in this circuit analysis refer to
schematics in the diagrams section with the same name. The
sub-headings indicate the individual circuit being described.
MAIN TRIGGER PREAMP )
The Main Trigger Preamp converts the push-pull internal
trigger signal to a single-ended signal and selects the main
trigger source and coupling for the Main Trigger Generator.
Fig. 2-2 shows a detailed block diagram of the Main Trigger
Preamp. The schematic of this circuit is shown on diagram
1 at the rear of this manual.
Trigger Preamp. The push-pull trigger signal from the
Vertical Deflection System is converted to a single-ended
output by the emitter-coupled stage, 052-061. The output
of Q61 drives current gain stage Q66-Q70. The DC level of
the output is set by internal Trig DC Bal control, R72.
Input Switching. The MAIN TRIGGERING SOURCE
switch, $10, selects the source of the trigger signal. Three
trigger sources are available; internal, line, and external. The
external signal may also be passed through a + 10 attenua-
tor network.
The MAIN TRIGGERING COUPLING switch, S20,
offers a means of attenuating high or low frequency
components of the trigger signal. In addition to AC and DC
coupling, C23-R23 can be selected to provide low-
frequency attenuation and R25-C25-C26 for high-
frequency attenuation.

Circuit Description—7B53A/7B53AN Service
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Fig. 2-2. Trigger Preamp and input Switching Block Diagram.
2-5

Circuit Description—7B53A/7B53AN Service
MAIN TRIGGER GENERATOR ®
The Main Trigger Generator provides selection of the
level and slope where triggering occurs, and supplies a
fast-rise pulse to the main sweep start comparator. Fig. 2-3
shows a detailed block diagram of the Main Trigger
Generator; the schematic of this circuit is shown on
diagram 2 at the rear of this manual.
Input Stage. The input source-follower, Q310, provides a
high input impedance for the trigger signal. It also provides
isolation between the Main Trigger Generator and the input
source. Input protection diode, CR307 protects 0310 from
excessive input signals by clamping the gate of the input
FET if the input exceeds about —15 volts. The signal at the
source of 0310 is passing through emitter-follower 0315 to
the base of 0320 in the Slope Comparator, and to the
External Horizontal circuit.
Slope Comparator. 0320 and Q322 are connected as a
difference amplifier to provide selection of the slope and
level at which the sweep is triggered. The reference voltage
for the comparator is provided by the LEVEL control, R4,
and the Main Trig Level Center control, R333. R333 sets
the level at the base of Q322 so that the display is triggered
at the 0 volt DC level of the incoming trigger when the
LEVEL control is centered. When the MAIN TRIG-
GERING LEVEL control R4 is set to midrange the base of
Q322 is at approximately 0 volts. This corresponds to the 0
volt level at the input of 0320, thus switching the
comparator at the O volt level of the trigger signal. As the
LEVEL control is turned clockwise, the voltage level on the
base of Q322 becomes more positive. Now the trigger signal
must rise to a more positive level before comparison takes
place. The resultant CRT display starts at a more positive
point on the displayed signal. When the LEVEL control is
turned counterclockwise from 0, the result is the opposite
of the above reaction and produces a CRT display which
starts at a more negative point along the + slope of the
trigger signal.
R326 establishes the emitter current for Q320 and
Q322. The transistor with the most positive base, controls
conduction of the comparator. For example, assume that
the trigger signal from the input stage is positive-going and
Q320 is forward-biased. The increased current flow through
R326 makes the emitter of Q322 more positive and since
the base is held constant by the level control voltage, the
current through 0322 decreases. The increased current
through 0320 makes the voltage at pin 4 of U350A less
positive, and the decrease in current through Q322 makes
voltage at pin 10 of U350C more positive. Notice that the
signal currents at the collectors of Q320 and Q322 are
opposite in phase. The sweep can be triggered from either
the positive or negative edge of the input signal. The
selection is made by the SLOPE switch S4.
2-6
When SLOPE switch S4 is set to +, the voltage between
R347 and R346 decreases and activates U350A by
providing a low voltage level at pin 5 of U350A. A low level
is also applied to pins 6 and 7 of U350B. The low level is
inverted by U350B and this high level is applied to pin 11
of U350C. Thus, pin 14 of U350C goes low, as does pin 13
of U350D. Since pin 11 of U350C is high, pin 10 of U350C
has no effect. If pin 4 of U350A goes low, pin 2 goes high.
Pin 12 of U350D also goes high causing pin 9 of U350D to
go high, and the output at pin 3 of inverter U355B to go
low. However, if pin 4 of U350A goes high, the process
reverses and the output at pin 3 of U355B also goes high.
Thus, pin 3 of U355B follows the input at pin 4 of U350A.
When the SLOPE switch S4 is set to —, +5 volts is
applied to pin 5 of U350A. Pin 2 goes low, as does pin 12
of U350D. Pin 12 is held low, regardless of what happens at
pin 4 of U350A. The +5 volts at pin 5 of U350A is inverted
by U350B, which makes pin 11 of U350C go low. Pin 3 of
U355B now follows the signal at pin 10 of U350C.
R341, R339, and CR340, (between pin 3 of U355B and
pin 4 of U350A), provide regenerative feedback. R343,
R342, and CR343 provide regenerative feedback to pin 10
of U350C.
In the reset condition, pin 15 of U375B is low, as is pin
12 of U355D. When a negative pulse is applied to pin 4 of
U350A, pin 3 of U355B goes low as well as pin 13 of
U355D. Thus, pin 15 of U355D goes high, which sets pin 2
of U375A to the high state and provides the sweep gate
output (trigger pulse) through 0382 and pin C to the Main
Sweep Start Comparator. At the end of sweep, the
positive-going holdoff pulse is coupled to the Sweep Gate
Reset circuit through pin B. The high level at the base of
Q366 turns it on, causing pin 4 and 5 of U355A to go low
coincident with the holdoff pulse. Therefore, pin 2 of
inverter U355A goes high, resetting U375A. Pin 2 of
U375A goes low, thus terminating the sweep gate.
The high at pin 2 of U355A sets U375B, causing pin 12
of U355D to go high, locking out any trigger pulse during
the holdoff period. While pin 12 of U355D is high, pin 15
of U355D will stay low regardless of the state of pin 13 of
U355D.
The Trigger Lockout Latch (U375B) can only be reset
when the Trig’d Sweep Gate Latch (U375A) is in the reset
condition (pin 2 of U375A low, pin 11 of U355C low, and
pin 13 of U355D high). Therefore, if pin 13 of U355D is
low when the holdoff pulse terminates, U375B will stay set.
When pin 13 of U355D goes positive, pin 11 of U355C goes
negative causing a positive level at pin 14 of U355C. This
Positive level resets the trigger lockout latch U375B,
causing pin 12 of U355D to go negative, allowing the next
negative transition at pin 13 of U355D to set the trigger
sweep gate latch U375A. This generates a new sweep gate at
pin C,
@i

Circuit Description—7B53A/7B53AN Service
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2-7

Circuit Description—7B53A/7B53AN Service
MAIN SWEEP GENERATOR >
The Main Sweep Generator circuit produces a sawtooth
voltage which is amplified by the Horizontal Amplifier
circuit to provide horizontal sweep deflection on the CRT
of the indicator oscilloscope. This output signal is generated
on command (trigger pulse) from the Main Trigger Genera-
tor. The Main Sweep Generator also produces a Main Sweep
Gate pulse coincident with the time that the Main Sweep
runs. The Main Gate pulse is processed by the Sweep Gate
Out circuit and the indicator oscilloscope for CRT
unblanking and Auxiliary Gate output. In addition, the
Main Sweep Generator produces several control signals for
other circuits within the instrument. Fig. 2-4 shows a
detailed block diagram of the Main Sweep Generator and
the schematic is shown on diagram 3 at the rear of the
manual.
The MAIN TRIGGERING MODE switch allows three
modes of operation. When the NORM button is pressed, a
sweep is produced only when a trigger pulse is received
from the Main Trigger Generator circuit. When the AUTO
button is pressed, a sweep is produced as in NORM except
that a free-running trace is displayed when a trigger pulse is
not present. SINGLE SWP operation is also similar to
NORM operation except that the sweep is not recurrent.
The RESET button must be pressed to view another trace.
The following circuit description is given with the MAIN
TRIGGERING MODE switch pressed to NORM. Difference
in operation for the other two modes is discussed later.
Main Sweep Start Comparator
0544, 0547, and 0551 comprise the Main Sweep Start
comparator. In the absence of a trigger, 0544 is off and
0547 is heid on by the high level from pin 3 of U520. The
collector of Q547 is low and this low is coupled through
emitter-follower 0551 to pin 1 of U580, thus preventing a
sweep. When the Main Trigger Generator supplies a trigger,
the positive transition is coupled to the base of 0544. The
base of 0544 rises above the level at the base of Q547 and
the current through common emitter resistor R545 is
diverted from 0547 to 0544. The collector of 0547 rises
and the positive step is coupled through emitter-follower
Q551. The positive step appears across divider R555/R556
causing pin 1 of U580 to go positive, thus starting the
sweep.
Sawtooth Generator
The lower half of the U580 diagram symbol constitutes
a Miller Integrator. When pin 1 is positive, a linear sawtooth
(positive-going) is generated and appears at pin 8. The
timing components, Rt and Ct connected to pins 8 and 9,
determine the rate of change of the sawtooth waveform.
Q596 prevents high-speed error currents from being
coupled into U580 by way of C579 and pin 9.
2-8
Sweep Stop Comparator
The Sweep Stop Comparator consists of O564 and
Q568. In the absence of a sawtooth signal at pin 8 of U580,
Q568 is conducting and 0564 is held off by the positive
level set at its base by R564, the Main Sweep Length
adjustment. When the sawtooth voltage at pin 8 of U580
raises the base of O568 higher than the base of 0564, 0568
turns off and Q564 turns on. The collector of Q564 rises
and the positive step is coupled through emitter-follower
0538 to pin 16 of U520 and sweep holdoff begins.
Holdoff Circuit
The Holdoff Circuit consists of pins 8, 10, 16, and 17 of
U520 plus R and C time constants selected by the
TIME/DIV switch. The holdoff prevents re-triggering the
sweep generator until after the sweep timing capacitor (s}
has discharged and the sweep circuits are again ready to
generate a sweep.
At the end of the sawtooth waveform, a positive step is
coupled to pin 16 of U520, by way of the Sweep Stop
Comparator as previously described. The positive pulse seen
at pin 16 of U520 is coupled internally through U520 to
pin 17 and in turn to 0366 in the Main Trigger Generator.
The Main Trigger Generator is reset and the output at
connector pin C goes low. As a result, 0544 turns off and
Q547 turns on. The collector of Q547 drops and the
negative step is coupled through emitter-follower 0551,
thus ending the sweep.
After a time determined by the timing components at
pin 8, internal circuitry within U520 switches pin 17 to its
low state, ending the holdoff gate. The Main Trigger
Generator is released to generate a trigger signal.
A negative gate coincident with the positive holdoff
gate, appears at pin 10 of U520. This negative gate is
inverted by Q528 and coupled to the Delayed Sweep
Generator for composite holdoff functions.
Trig'd Lamp Driver
When the main sweep gate is high and the sweep is
running, the TRIG’D lamp is on. At all other times the
lamp is off.
Delay Pickoff
The upper half of the diagram symbol for U580 includes
the Delay Pickoff circuitry. Inside U580, the main sweep
sawtooth signal is applied to one side of a comparator
circuit. Pin 6 is connected to the other side of the
comparator. The setting of the DELAY TIME MULTI-
PLIER control, R9, determines the point on the main
sweep sawtooth at which the comparator switches.

Circuit Description—7B53A/7B53AN Service
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2-9

Circuit Description—7B53A/7B53AN Service
When the comparator switches (delay pickoff occurs), a
positive gate appears at pin 4 of U580. This gate terminates
at the end of the main sweep sawtooth.
The positive-going gate at pin 4 of U580 is coupled
through emitter-follower 0584 to the Delayed Sweep
Holdoff Generator via Q671.
Auto Triggering Mode
Operation of the Main Sweep Generator circuit in the
AUTO position of the MAIN TRIGGERING MODE switch
is the same as for NORM position just described when a
trigger pulse is applied. However, when a trigger pulse is not
present, a free-running reference trace is produced in the
AUTO position. This occurs as follows:
The Auto Triggering circuit consists of pins 1, 3,6, and
19 of U520. When the AUTO button of the MAIN
TRIGGERING MODE switch is pressed, a low at pin 19 of
U520 enables the Auto Circuit. When a repetitive trigger
signal above 30 Hz, and of adequate amplitude is applied to
the Main Sweep Start Comparator and pin 1 of U520, the
internal Auto Multi at pin 6 of U520 charges towards five
volts through C535 and R535, but is discharged by each
incoming trigger pulse.
In the absence of a trigger pulse, C535 charges towards
+5 V, switching pin 6 to its high state and pin 3 to its low
state. Q547 turns off, its collector rises and a high is
coupled through emitter follower 0551 to pin 1 of U580,
causing the sweep to run.
Single Sweep Operation
Operation of the Main Sweep Generator in the SINGLE
SWEEP position of the MAIN TRIGGERING MODE switch
is similar to operation in the NORM position as previously
described. However, after one sweep has run, all other
sweeps are inhibited until the RESET button is pressed. A
READY lamp is provided to indicate when the sweep is
ready to accept a trigger.
The Single Sweep circuit consists of pins 11, 12, 14, 15,
and 17 of U520. For SINGLE SWP operation, the +5 volt
supply is applied to pin 12 of U520. The holdoff pulse at
pin 17 of U520 goes positive, preventing generation of a
sweep. When the RESET button is pressed, pin 15 is
momentarily held to ground, pin 17 goes low to allow the
Main Trigger Generator to accept a trigger. The holdoff line
(pin 17 of U520) stays low until a sweep has been
completed. At this time, the holdoff pulse rises at pin 17
and stays in the holdoff state until the RESET button is
pressed.
2-10
Q524 acts as a switch for the READY lamp. When the
holdoff gate at pin 17 is high, preventing the sweep
generator from accepting a trigger, pin 11 is high and 0524
and the READY lamp are off. When the RESET button is
pressed, the holdoff gate at pin 17 goes low and allows the
Main Sweep Generator to accept a trigger. Pin 11 rises and
turns on 0524, which provides the current to turn on the
READY lamp.
Sweep Lockout
Q513, 0516, 0538, and pins 3, 16, and 18 of U520
comprise the Sweep Lockout circuit. The Sweep Lockout
circuit is functional when the 7B53A/7B53AN is installed
in the B Horizontal compartment of an indicator oscillo-
scope which accommodates two horizontal plug-in units,
and it is desired to operate in the Alternate Horizontal
Mode, or to operate the 7B53A/7B53AN as a delayed
sweep unit. Lockout is applied to the 7B53A/7B53AN
during the time that the sweep from the associated time
base is displayed.
The indicator oscilloscope controls initiation of a sweep
by supplying current to the base of Q513 when lockout is
required. This current causes a positive step at pin 18 of
U520. Pin 3 of U520 steps positive and 0547 turns on. The
collector of Q547 falls and the low is coupled through
emitter-follower Q551 to pin 1 of U580, thus preventing
the sweep. If lockout is initiated while the sweep is running,
the leading edge of the lockout pulse is differentiated
through C519 and R519, coupled through emitter-follower
0538 and appears as a high at pin 16 of U520. This starts
the holdoff cycle. (The holdoff cycle is as described
previously.)
Delayed Mode Control
When the 7B53A/7B53AN is installed in the B Hori-
zontal compartment of an indicator oscilloscope with two
horizontal compartments, the Delayed Mode Control
determines whether the 7B53A/7B53AN operates as an
independent time base or as a delayed sweep unit in the
triggerable after delay time mode. When approximately +3
to 4.5 volts is present at interface connector Bi (and
therefore pin 13 of U520), the Auto Circuit (previously
described) is disabled. A sweep can be enabled only by a
trigger pulse to the Sweep Start Comparator. During delay
time determined by the settings of the delaying sweep unit,
sweep lockout (previously described) inhibits the sweep.
After delay time, the 7B53A/7B53AN can be triggered. An
approximate zero volt level at pin 13 of U520 enables the
Auto Circuit, causing the 7B53A/7B53AN to operate as an
independent time base.
@i

DELAYED SWEEP HOLDOFF -——————___- my
SWEEP GATE
RESET &
Circuit Description—7B53A/7B53AN Service
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Fig. 2-5. Delayed Trigger Generator Biock Diagram.
DELAYED TRIGGER GENERATOR &
The Delayed Trigger Generator circuitry is essentially
the same as the Main Trigger Generator, except for the
Runs After Dly Time and Triggerable After Delay Time
modes. Therefore, only the circuitry involving these modes
will be described. For detailed description of the remaining
delayed trigger circuitry, refer to the Main Trigger Genera-
tor discussion. Fig. 2-5 shows a detailed block diagram of
the Delayed Trigger Generator; the schematic is shown on
diagram 4 at the rear of this manual.
When the DLY’D TRIG LEVEL is set to RUNS AFTER
DLY TIME, S5 grounds R469 and pin 4 of U455A is forced
to the low state. Thus, pin 2 of U455A will follow pin 5,
but reversed in polarity. When the holdoff pulse is applied
to the base of Q466, pin 4 of U455C goes to the high state,
which resets U475B and terminates the sweep gate. When
the holdoff pulse terminates, pin 4 of U455C goes to the
low state and pin 2 of U455A goes to the high state. This
sets U475B which generates a new sweep gate.
®
When the DLY’D TRIG LEVEL control is in the
Triggerable After Diy Time mode, pin 4 of U455A is high
and pin 2 is low. Therefore, pin 12 of U475B is also low
and the Delayed Trigger Generator operates in the Trigger-
able After Dly Time mode in a similar way as the Main
Trigger Generator operates.
DELAYED SWEEP GENERATOR <>
The Delayed Sweep Generator produces a sawtooth
voltage which is amplified by the Horizontal Amplifier
circuits to provide a delayed sweep CRT display. The
sawtooth output voltage is generated on command of the
Delayed Trigger Generator. The Delayed Sweep Generator
also produces a Delayed Sweep Gate pulse, coincident with
the time that the Delayed Sweep Generator runs, to be
processed by the Sweep Gate Out circuit and the oscillo-
scope for CRT unblanking. Fig. 2-6 shows a detailed block
diagram of the Delayed Sweep Generator and the schematic
is shown on diagram 5 at the rear of the manual.
2-11

Circuit Description—7B53A/7B53AN Service
Diy’d Swp Start Multi
Q603 and Q608 comprise the Dly’d Swp Start Multi.
This circuit is connected as a bistable multivibrator, with
OQ608 normally conducting and Q603 off.
When pin 15 of U475B (Delayed Trigger Generator)
switches to its high state, the positive step appears at the
base of Q603. This causes the multi to flip, so Q603 is on
and Q608 is off, thus causing a positive step through 0610
to pin 1 of U650. Q608 remains in the positive state for the
duration of the delay gate. At the end of the delay gate, the
Dly’d Swp Start Multi reverts to its original state with Q603
off and Q608 on.
Dly‘d Swp Start Control
The Diy’d Swp Start Control circuit includes Q656,
Q654 and 0610. This circuit couples a positive gate to pin
1 of U650 (Miller Integrator) to control the period during
which a sawtooth is generated.
in all Display Modes except MIXED, 0656 and 0654 are
inactive due to the +5 volts applied to the base of 0654,
through CR654 and Q280, from the +5 volt supply. When
the collector of O608 (Dly’d Swp Start Multi) goes positive,
0610 couples the positive gate to pin 1 of U650, initiating
the generation of the delayed sweep sawtooth.
When operating in the MIXED Display Mode, the anode
circuit of CR654 is open. The gate from the Main Swp Start
Multi is negative-going at the base of Q654. The resulting
current from Q654 forward biases Q610, and a positive gate
is coupled to pin 1 of U650.
Mixed Swp Comparator
Q678, 0682, Q684 and Q688 comprise the Mixed Swp
Comparator circuit. This circuit determines whether U650
is running at the main sweep or delayed sweep rate.
When the VARIABLE control is pulled for MIXED,
Q682 is forward biased. The main sweep sawtooth at the
emitter (and thus, the collector) of Q682 is a positive-going
ramp. This causes a ramp of increasing current through
G684. During the time that a Delay Gate is not being
generated, Q603 (Diy’d Swp Start Multi) is biased off and
Q678 is on. In this condition, U650, 0678, Q684 and 0688
form a operational amplifier. The negative-going ramp at
the collector of Q684 becomes a positive-going ramp at pin
8 of U650, running at the main sweep rate.
2-12
When the Delay Gate is generated, the Delayed Trigger
Generator forward biases Q603. The collector current
through R684 reverse biases 678, opening the operational
amplifier loop. U650 is released to run at the delayed sweep
rate. Therefore, the sawtooth at pin 8 of U650 will first run
at the main sweep rate and then change to the delayed
sweep rate when the Delay Gate is generated.
Diy’d Swp Stop
Pins 4, 5, and 6 of U650 (plus external circuitry)
constitute the Dly’d Swp Stop circuit. The setting of the
Dly’d Swp Length adjust (R652) determines the point on
the delayed sweep sawtooth at which pin 4 of U650 goes
positive.
Diy’d Swp Lockout Multi and Diy’d Swp Holdoff
The operation of the Dly’d Swp Lockout and Holdoff
circuits is dependent on the following signals:
1. The Dly'd Swp Stop signal (positive-going) at pin 4 of
U650.
2. The Main Sweep Holdoff signal (positive-going) by
way of R673.
3. The Main Sweep Gate (positive-going) at the base of
Q665 through CR662.
4. The Dly Gate at the base of 0671.
Q659 and O665 form the Diy’d Swp Lockout Multi.
When the Dly’d Swp Stop circuit causes pin 4 of U650 to
go positive, Q659 turns on and Q665 turns off, coupling a
positive-going holdoff pulse to pin G. At the end of the
main sweep, the positive going Main Sweep Gate pulse turns
on Q665 and its collector falls. But the positive-going main
holdoff pulse through R673 keeps pin G positive. When the
main sweep holdoff pulse falls, the level at pin G remains
positive, due to the negative going Diy Gate pulse applied
to Q671. After the delay time determined by the TIME/
DIV OR DLY TIME switch and the DELAY TIME MULT
dial, the Dly Gate pulse rises, Q671 turns off, and the
holdoff pulse at pin G goes negative.
When operating in the MIXED Display Mode, the
Delayed Sweep Stop signal (positive-going) at pin 4 of
U650, turns on O659. The negative step at its collector
turns on O656 and turns off Q654. The resulting negative
level at the collector of Q654 is coupled through emitter
follower Q610, thus removing the positive level from pin 1
of U650.
®