Tektronix P6900 Series User manual

P6900 Series
High-Density Logic Analyzer Probes
with D-Max™ Probing Technology
ZZZ
Instruction Manual
xx
Warning
The servicing instructions are for use by qualified personnel
only. To avoid personal injury, do not perform any servicing
unless you are qualified to do so. Refer to all safety summaries
prior to performing service.
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USA
For product information, sales, service, and technical support:
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Warranty
Tektronix warrants that this product will be free from defects in materials and workmanship for a period of one (1)
year from the date of shipment. If any such product proves defective during this warranty period, Tektronix, at its
option, either will repair the defective product without charge for parts and labor, or will provide a replacement
in exchange for the defective product. Parts, modules and replacement products used by Tektronix for warranty
work may be new or reconditioned to like new performance. All replaced parts, modules and products become
the property of Tektronix.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration of
the warranty period and make suitable arrangements for the performance of service. Customer shall be responsible
for packaging and shipping the defective product to the service center designated by Tektronix, with shipping
charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a location within
the country in which the Tektronix service center is located. Customer shall be responsible for paying all shipping
charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. Tektronix shall not be obligated to furnish service under this warranty a) to repair damage
resulting from attempts by personnel other than Tektronix representatives to install, repair or service the product;
b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any damage
or malfunction caused by the use of non-Tektronix supplies; or d) to service a product that has been modified or
integrated with other products when the effect of such modification or integration increases the time or difficulty
of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX WITH RESPECT TO THE PRODUCT IN LIEU OF ANY
OTHER WARRANTIES, EXPRESS OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY
IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
TEKTRONIX' RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE
AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR THE VENDOR HAS
ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
[W2 – 15AUG04]

Table of Contents
Preface............................................................................................................... v
Related documentation........................................................................................ v
Environmental considerations............................................................................... vi
Commonly used terms ....................................................................................... vi
Operating basics .................................................................................................... 1
Product description ............................................................................................ 1
Connect the probes to the logic analyzer................................................................... 10
Connect the probes to the target system.................................................................... 11
Dress the probe cables........................................................................................ 19
Store the probe heads......................................................................................... 20
Reference........................................................................................................... 21
Probe and target system interface design information.................................................... 21
Board design .................................................................................................. 27
Probe footprint dimensions .................................................................................. 35
Other design considerations ................................................................................. 36
Probepinoutdefinition and channel assignment .................................. .......... .......... .... 37
Specifications ...................................................................................................... 53
Mechanical and electrical specifications ................................................................... 53
Maintenance........................................................................................................ 55
Probe calibration.............................................................................................. 55
Perform the functional check................................................................................ 55
Inspect and clean the probes................................................................................. 55
Service strategy ............................................................................................... 56
Legacy probe and attachment support...................................................................... 56
Repackaging instructions .................................................................................... 57
Replaceable parts .................................................................................................. 59
Parts ordering information................................................................................... 59
Replaceable parts list......................................................................................... 60
Index
P6900 Series Logic Analyzer Probes Instruction Manual i

Table of Contents
List of Figures
Figure i: Differential input amplitude ....................... .................. ................................ . vii
Figure ii: Flying lead set......................................................................................... vii
Figure iii: Probe example....................... .............. ........................ ........................ ... viii
Figure 1: P6960 High-Density probe with D-Max probing technology...................................... 2
Figure 2: P6960HS High-Density probe with D-Max probing technology .................................. 3
Figure 3: P6962 High-Density probe with D-Max probing technology...................................... 4
Figure 4: P6964 High-Density probe with D-Max probing technology...................................... 6
Figure 5: P6980 High-Density Differential probe with D-Max probing technology ....................... 7
Figure 6: P6982 High-Density Differential probe with D-Max probing technology ....................... 8
Figure 7: Connecting the probes to the logic analyzer ........................................................ 10
Figure 8: Replacing the wires on the retention posts.......................................................... 11
Figure 9: Installing the retention posts in the PCB ...................... ........................ .............. 12
Figure 10: Soldering the retention posts in the PCB .......................................................... 13
Figure 11: Installing the alternate retention assembly......... .............. .............. .............. ...... 14
Figure 12: Proper handling of the interface clip ............................................................... 15
Figure 13: Connecting the probes to the target system........................................................ 16
Figure 14: Using the flying lead set to connect to the target system......................................... 18
Figure 15: Proper dressing of the probe cables ................................................................ 19
Figure 16: Protecting the probe heads........................................................................... 20
Figure 17: P6960, P6960HS, P6980, and P6982 probe dimensions ......................................... 27
Figure 18: P6962 and P6964 probe dimensions................................................................ 28
Figure 19: Retention post dimensions........................................................................... 29
Figure 20: Keepout area .......................................................................................... 29
Figure 21: Side-by-side layout................................................................................... 30
Figure 22: End-to-end layout .................................................................................... 30
Figure 23: Alternate retention assembly dimensions.......................................................... 30
Figure 24: Keepout area .......................................................................................... 31
Figure 25: Side-by-side layout................................................................................... 31
Figure 26: End-to-end layout .................................................................................... 32
Figure 27: Signal routing on the target system................................................................. 32
Figure 28: High-Density probe load model..................................................................... 34
Figure 29: Probe footprint dimensions on the PCB............................................................ 35
Figure 30: Optional Via-in-pad placement recommendation................................................. 36
Figure 31: P6960/P6960HS single-ended PCB footprint pinout detail...................................... 37
Figure 32: P6962 single-ended PCB footprint pinout detail.................................................. 39
Figure 33: P6964 single-ended PCB footprint pinout detail.................................................. 41
Figure 34: P6980 differential PCB footprint pinout detail.................................................... 44
Figure 35: P6982 differential PCB footprint pinout detail.................................................... 48
ii P6900 Series Logic Analyzer Probes Instruction Manual

Table of Contents
Figure 36: Replacing the cLGA clip ............................................................................ 56
Figure 37: P6960 High-Density probe accessories ............................................................ 61
Figure 38: P6960HS High-Density probe accessories ........................................................ 62
Figure 39: P6962 High-Density probe accessories ............................................................ 63
Figure 40: P6964 High-Density probe accessories ............................................................ 64
Figure 41: P6980 High-Density Differential probe accessories.............................................. 65
Figure 42: P6982 High-Density Differential probe accessories.............................................. 66
Figure 43: Optional accessories.................................................................................. 67
P6900 Series Logic Analyzer Probes Instruction Manual iii

Table of Contents
List of Tables
Table 1: Logic analyzer clock and qualifier availability .. ........................ ........................ .... 22
Table 2: 2X Demultiplexing source-to-destination channel assignments ............... .................... 24
Table 3: 4X Demultiplexing source-to-destination channel assignments ....... ............................ 25
Table 4: Channel assignment for P6960/P6960HS single-ended data, differential clock logic analyzer
probes .......................................................................................................... 37
Table 5: Channel assignment for a P6962 single-ended data, differential clock logic analyzer probe. .. 40
Table 6: Channel assignment for a P6964 single-ended data, differential clock logic analyzer probe. .. 42
Table 7: Channel assignment for a P6980 differential clock and data logic analyzer probe to a 136- or
102-channel logic analyzer module......................................................................... 44
Table 8: Channel assignment for a P6980 differential clock and data logic analyzer probe to a 68- or
34-channel logic analyzer module .......................................................................... 46
Table 9: Channel assignment for a P6982 differential clock and data logic analyzer probe to a 136- or
102-channel logic analyzer module......................................................................... 48
Table 10: Channel assignment for a P6982 differential clock and data logic analyzer probe to a 68- or
34-channel logic analyzer module .......................................................................... 50
Table 11: Mechanical and electrical specifications ............................................................ 53
Table 12: Environmental specifications......................................................................... 54
Table 13: Parts list column descriptions ........................................................................ 60
Table 14: P6960 replaceable parts list........................................................................... 61
Table 15: P6960HS replaceable parts list....................................................................... 62
Table 16: P6962 replaceable parts list........................................................................... 63
Table 17: P6964 replaceable parts list........................................................................... 64
Table 18: P6980 replaceable parts list........................................................................... 65
Table 19: P6982 replaceable parts list........................................................................... 66
Table 20: P6900 Series Probes optional accessories........................................................... 67
iv P6900 Series Logic Analyzer Probes Instruction Manual

Preface
This document provides information on using and servicing the P6900 Series
logic analyzer probes.
Related documentation
The following list and table provide information on the related documentation
available for your Tektronix product. For additional information, refer to the
Tektronix Web site (www.tektronix.com/manuals).
Related documentation
Item Purpose
TLA Quick Start User Manuals High-level operational overview
Online Help In-depth operation and UI help
Installation Reference Sheets High-level installation information
Installation Manuals Detailed first-time installation information
XYZs of Logic Analyzers Logic analyzer basics
Declassification and Securities instructions Data security concerns specific to sanitizing
or removing memory devices from Tektronix
products
Application notes Collection of logic analyzer application
specific notes
Product Specifications & Performance
Verification Procedures
TLA Product specifications and performance
verification procedures
TPI.NET Documentation Detailed information for controlling the logic
analyzer using .NET
Field upgrade kits Upgrade information for your logic analyzer
Optional Service Manuals Self-service documentation for modules and
mainframes
P6900 Series Logic Analyzer Probes Instruction Manual v

Preface
Environmental considerations
This section provides information about the environmental impact of the product.
Product end-of-life
handling
Observe the following guidelines when recycling an instrument or component:
Equipment recycling. Production of this equipment required the extraction and
use of natural resources. The equipment may contain substances that could be
harmful to the environment or human health if improperly handled at the product’s
end of life. In order to avoid release of such substances into the environment and
to reduce the use of natural resources, we encourage you to recycle this product
in an appropriate system that will ensure that most of the materials are reused or
recycled appropriately.
This symbol indicates that this product complies with the applicable European
Union requirements according to Directives 2002/96/EC and 2006/66/EC
on waste electrical and electronic equipment (WEEE) and batteries. For
information about recycling options, check the Support/Service section of the
TektronixWebsite(www.tektronix.com).
Restriction of hazardous
substances
This product is classified as an industrial monitoring and control instrument
accessory, and is not required to comply with the substance restrictions of the
recast RoHS Directive 2011/65/EU until July 22, 2017.
Commonly used terms
Refer to the following list of commonly used terms throughout the manual.
cLGA An acronym for compression Land Grid Array, a connector that provides an
electrical connection between a PCB and the probe input circuitry.
Compression Footprint A connectorless, solderless contact between your PCB and the P6900 Series
probes. Connection is obtained by applying pressure between your PCB and
the probe through a cLGA c-spring.
vi P6900 Series Logic Analyzer Probes Instruction Manual

Preface
Differential Input
Amplitude Definition
For differential signals, the magnitude of the difference voltage Vmax-Vmin (and
Vmin-Vmax) must be greater than or equal to 150 mV.
Figure i: Differential input amplitude
D-Max probing technology Trademark name that describes the technology used in the P6900 Series
high-density logic analyzer probes.
Flying Lead Set A lead set designed to attach to a P6960 Probe to provide general-purpose probing
capability. (See Figure ii.)
Figure ii: Flying lead set
P6900 Series Logic Analyzer Probes Instruction Manual vii

Preface
Functional Check
Procedure
Functional check procedures verify the basic functionality of the probes by
confirming that the probes recognize signal activity at the probe tips.
Keepout Area An area on a printed circuit board in which component, trace, and/or via placement
may be restricted.
Module The unit that plugs into a mainframe that provides instrument capabilities such
as logic analysis.
Module End The end of the probe that plugs into the module unit.
PCB An acronym for Printed Circuit Board; also known as Etched Circuit Board (ECB).
Probe The device connects a module with a target system. (See Figure iii.)
Figure iii: Probe example
Probe Adapter A device that connects the LA module probe to a target system.
Probe Head The end of the probe that connects to the target system or probe adapter.
SMT KlipChip An interface device for attaching logic analyzer probes to components with a
maximum lead diameter of 2.413 mm (0.095 in) and stackable on lead centers
of 1.27 mm (0.050 in).
viii P6900 Series Logic Analyzer Probes Instruction Manual

Operating basics
This section provides a brief description of the Tektronix P6900 Series
High-Density Logic Analyzer Probes, information on attaching color-coded probe
labels, and probe and adapter connection instructions from the logic analyzer to
the target system.
Product description
The P6900 Series Probes connect TLA7ACx Series Logic Analyzer modules
to a target system.
The P6960, P6960HS, P6962, and P6964 probes consist of 32 single-ended
channels and two (2) differential channels in one probe head.
The P6980 probe consists of 34 channels in two probe heads, with each head
containing 17 differential channels.
The P6982 probe consists of 17 differential channels in one probe head.
Probe labels If you purchase probes for the logic analyzer module, you will need to apply the
color-coded labels. You will find instructions on how to attach the labels to the
probes on a color reference card that is included with the probes:
P6960 High Density Logic Analyzer Probe Labeling and Installation
Instructions
P6962 High Density Logic Analyzer Probe Labeling and Installation
Instructions
P6964 High Density Logic Analyzer Probe Optimized for 4X Demultiplexing
Labeling and Installation Instructions
P6980 High Density Differential Logic Analyzer Probe Labeling and
Installation Instructions
P6982 High Density Differential Logic Analyzer Optimized for 2X
Demultiplexing Probe Labeling and Installation Instructions
P6900 Series Logic Analyzer Probes Instruction Manual 1

Operating basics
P6960 High-Density Probe The P6960 Probe is a 34-channel, high-density connectorless probe with D-Max
probing technology. (See Figure 2.) The probe consists of one probe head that has
34 channels (32 data and 2 clock/qual).
Figure 1: P6960 High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6960 Probe:
Differential or single-ended clock and qualification inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2
clock/quals)
Narrow 34-channel probe head makes for easier placement and layout
2X mode, (for example, 1:2 demultiplexing) uses one-half of the probe head
4X mode, (for example, 1:4 demultiplexing) uses one-quarter of the probe
head
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude
150 mV amplitude each side minimum differential signal
Minimal loading of 0.5 pF at 20 kΩto ground
2 P6900 Series Logic Analyzer Probes Instruction Manual

Operating basics
Operationinno
rmal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed –2.5 V (clock only)
NOTE. You can find more information about the P6960 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
P6960HS High-Density
Probe
The P6960HS Probe is a 34-channel, high-sensitive, high-density connectorless
probe with D-Max probing technology. It has twice the voltage sensitivity
compared with the standard P6960 probe. (SeeFigure2.)Theprobeconsistsofa
probe head with 34 channels (32 data and 2 clock/qual).
Figure 2: P6960HS High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6960HS Probe:
Differential or single-ended clock and qualification inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2
clock/quals)
Narrow 34-channel probe head makes for easier placement and layout
2X mode, (for example, 1:2 demultiplexing) uses one-half of the probe head
P6900 Series Logic Analyzer Probes Instruction Manual 3

Operating basics
4X mode, (for example, 1:4 demultiplexing) uses one-quarter of the probe
head
Color-coded keyed attachment
–1.25 V to +2.5 V input operating range
–1.0 V to +2.25 V threshold range
100 mV minimum single-ended signal amplitude
50 mV amplitude each side minimum differential signal
Minimal loading of 0.5 pF at 20 kΩto ground
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +2.5 V and the maximum negative voltage does not
exceed –1.25 V (clock only)
NOTE. You can find more information about the P6960HS probe routing and
pinout in the Signal Routing section. (See Figure 27 on page 32.)
P6962 High-Density Probe The P6962 Probe is a 34-channel, high-density connectorless probe with D-Max
probing technology. (See Figure 3.) The probe consists of one probe head that has
34 channels (32 data and 2 clock/qual), distributed over 2 module-end connectors.
Figure 3: P6962 High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6962 Probe:
Differential or single-ended clock and qualification inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
4 P6900 Series Logic Analyzer Probes Instruction Manual

Operating basics
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2
clock/quals)
Narrow 34-channel probe head makes for easier placement and layout
Optimized for 4X mode (1:4 demultiplexing) to minimize board real estate
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude
150 mV amplitude each side minimum differential signal
Minimal loading of 0.5 pF at 20 kΩto ground
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed –2.5 V (clock only)
NOTE. You can find more information about the P6962 probe routing and pinout
in the P6962 Single-ended Probe with D-Max probing technology section. (See
Figure 32 on page 39.)
P6900 Series Logic Analyzer Probes Instruction Manual 5

Operating basics
P6964 High-Density Probe The P6964 Probe is a 34-channel, high-density connectorless probe with D-Max
probing technology. (See Figure 4.) The probe consists of one probe head that has
34 channels (32 data and 2 clock/qual), distributed over 4 module-end connectors.
Figure 4: P6964 High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6964 Probe:
Differential or single-ended clock and qualification inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2
clock/quals)
Narrow 34-channel probe head makes for easier placement and layout
Optimized for 4X mode (1:4 demultiplexing) to minimize board real estate
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude
150 mV amplitude each side minimum differential signal
6 P6900 Series Logic Analyzer Probes Instruction Manual

Operating basics
Minimal loadingof0.5pFat20kΩto ground
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed –2.5 V (clock only)
NOTE. You can find more information about the P6964 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
P6980 High-Density
Differential Probe
The P6980 Probe is a 34-channel, high-density connectorless differential probe
with D-Max probing technology. (See Figure 5.) The probe consists of two
independent probe heads of 17 channels each (16 data and 1 clock/qual).
Figure 5: P6980 High-Density Differential probe with D-Max probing technology
The following list details the capabilities and qualities of the P6980 Probe:
Differential data, clock and qualification inputs (single-ended signals may be
probed if negative input is grounded)
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of two probe heads supporting 17 channels each, for a total of 34
channels
2X mode (1:2 demultiplexing) and 4X mode (1:4 demultiplexing), use one
probe head to minimize required board real estate
P6900 Series Logic Analyzer Probes Instruction Manual 7

Operating basics
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude (5 V maximum)
150 mV each side minimum differential signal amplitude (2.5 V maximum)
Minimal loading of 0.5 pF at 20 kΩto ground
Operation in normal or inverted polarity is acceptable
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed –2.5 V
NOTE. You can find more information about the P6980 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
P6982 High-Density
Differential Probe
The P6982 Probe is a 17-channel, high-density connectorless differential probe
with D-Max probing technology. (See Figure 6.) The probe consists of one probe
head of 17 differential channels (16 data and 1 clock/qual).
Figure 6: P6982 High-Density Differential probe with D-Max probing technology
The following list details the capabilities and qualities of the P6982 Probe:
Differential data, clock and qualification inputs (single-ended signals may be
probed if negative input is grounded)
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
8 P6900 Series Logic Analyzer Probes Instruction Manual