Texas Instruments TRF7960 User manual

TRF7960
TRF7961
www.ti.com SLOU186F–AUGUST 2006–REVISED AUGUST 2010
MULTI-STANDARD FULLY INTEGRATED 13.56-MHZ RFID
ANALOG FRONT END AND DATA-FRAMING READER SYSTEM
Check for Samples: TRF7960,TRF7961
1 Introduction
1.1 Features
12
•Completely Integrated Protocol Handling •Parallel 8-Bit or Serial 4-Pin SPI Interface With
MCU Using 12-Byte FIFO
•Separate Internal High-PSRR Power Supplies
for Analog, Digital, and PA Sections Provide •Ultra-Small 32-Pin QFN Package
Noise Isolation for Superior Read Range and (5 mm ×5 mm)
Reliability •Available Tools
•Dual Receiver Inputs With AM and PM –Reference Design/EVM With Development
Demodulation to Minimize Communication Software
Holes –Source Code Available for MSP430
•Receiver AM and PM RSSI
•Reader-to-Reader Anti-Collision 1.2 APPLICATIONS
•High Integration Reduces Total BOM and Board •Secure Access Control
Area •Product Authentication
–Single External 13.56-MHz Crystal Oscillator –Printer Ink Cartridges
–MCU-Selectable Clock-Frequency Output of
RF, RF/2, or RF/4 –Blood Glucose Monitors
–Adjustable 20-mA, High-PSRR LDO for •Contactless Payment Systems
Powering External MCU •Medical Systems
•Easy to Use With High Flexibility
–Auto-Configured Default Modes for Each
Supported ISO Protocol
–12 User-Programmable Registers
–Selectable Receiver Gain and AGC
–Programmable Output Power
(100 mW or 200 mW)
–Adjustable ASK Modulation Range
(8% to 30%)
–Built-In Receiver Band-Pass Filter With
User-Selectable Corner Frequencies
•Wide Operating Voltage Range of 2.7 V to 5.5 V
•Ultra-Low-Power Modes
–Power Down <1μA
–Standby 120 μA
–Active (Rx only) 10 mA
1.3 Description
The TRF7960/61 is an integrated analog front end and data-framing system for a 13.56-MHz RFID reader
system. Built-in programming options make it suitable for a wide range of applications for proximity and
vicinity RFID systems.
The reader is configured by selecting the desired protocol in the control registers. Direct access to all
control registers allows fine tuning of various reader parameters as needed.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Tag-it is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Copyright ©2006–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

TRF7960
TRF7961
SLOU186F–AUGUST 2006–REVISED AUGUST 2010 www.ti.com
Table 1-1. PRODUCT SELECTION TABLE
PROTOCOLS
DEVICE ISO14443A/B ISO15693 Tag-it™
ISO18000-3
106 kbps 212 kbps 424 kbps 848 kbps
TRF7960 √√√√√√
TRF7961 √ √
2Introduction Copyright ©2006–2010, Texas Instruments Incorporated
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TRF7960
TRF7961
www.ti.com SLOU186F–AUGUST 2006–REVISED AUGUST 2010
1 Introduction .............................................. 14.4 ELECTRICAL CHARACTERISTICS ................. 8
4.5 Application Schematic for the TRF796x EVM
1.1 Features .............................................. 1(Parallel Mode) ....................................... 9
1.2 APPLICATIONS ...................................... 14.6 Application Schematic for the TRF796x EVM (SPI
1.3 Description ........................................... 1Mode) ............................................... 10
2 Description (continued) ................................ 45 System Description ................................... 11
3 Physical Characteristics ............................... 55.1 Power Supplies ..................................... 11
3.1 Terminal Functions ................................... 55.2 Receiver –Analog Section ......................... 17
5.3 Register Descriptions ............................... 24
3.2 PACKAGING/ORDERING INFORMATION .......... 65.4 Direct Commands From MCU to Reader ........... 34
4 ELECTRICAL SPECIFICATIONS ..................... 75.5 Reader Communication Interface .................. 36
4.1 ABSOLUTE MAXIMUM RATINGS .................. 75.6 Parallel Interface Communication .................. 38
4.2 DISSIPATION RATINGS TABLE .................... 75.7 Serial Interface Communication .................... 40
4.3 RECOMMENDED OPERATING CONDITIONS ..... 75.8 External Power Amplifier Application ............... 44
Copyright ©2006–2010, Texas Instruments Incorporated Contents 3
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8 (Parallel)
3 (SPI)
Z – Matching
Circuit
Tx_Out
Rx_IN1
Rx_IN2
VDD_X
VDD_I/O
SYS_CLK
DATA_CLK
VDD
TRF796x MSP430
Xtal
13.56 MHz
IRQ
Xtal In
Xtal Out
TRF7960
TRF7961
SLOU186F–AUGUST 2006–REVISED AUGUST 2010 www.ti.com
2 Description (continued)
Figure 2-1. Typical Application
A parallel or serial interface can be implemented for communication between the MCU and reader.
Transmit and receive functions use internal encoders and decoders with a 12-byte FIFO register. For
direct transmit or receive functions, the encoders / decoders can be bypassed so the MCU can process
the data in real time. The transmitter has selectable output power levels of 100 mW (20 dBm) or 200 mW
(23 dBm) into a 50-Ωload (5 -V supply) and is capable of ASK or OOK modulation. Integrated voltage
regulators ensure power-supply noise rejection for the complete reader system.
Data transmission comprises low-level encoding for ISO15693, modified Miller for ISO14443-A,
high-bit-rate systems for ISO14443 and Tag-it coding systems. Included with the data encoding is
automatic generation of SOF, EOF, CRC, and / or parity bits.
The receiver system enables AM and PM demodulation using a dual-input architecture. The receiver also
includes an automatic gain control option and selectable gain. Also included is a selectable bandwidth to
cover a broad range of input sub-carrier signal options. The received signal strength for AM and PM
modulation is accessible via the RSSI register. The receiver output is a digitized sub-carrier signal among
a selectable protocol and bit rate as outlined in Table 5-11. A selected decoder delivers bit stream and a
data clock as outputs.
The receiver system also includes a framing system. This system performs CRC and / or parity check,
removes the EOF and SOF settings, and organizes the data in bytes. Framed data is then accessible to
the MCU via a 12-byte FIFO register and MCU interface. The framing supports ISO14443 and ISO15693
protocols.
The TRF7960/61 supports data communication levels from 1.8 V to 5.5 V for the MCU I/O interface, while
also providing a data synchronization clock. An auxiliary 20-mA regulator (pin 32) is available for
additional system circuits.
4Description (continued) Copyright ©2006–2010, Texas Instruments Incorporated
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www.ti.com SLOU186F–AUGUST 2006–REVISED AUGUST 2010
3 Physical Characteristics
3.1 Terminal Functions
Figure 3-1. TRF796x Pin Assignments (Top View)
Table 3-1. Terminal Functions
TERMINAL TYPE(1) DESCRIPTION
NAME NO.
VDD_A 1 OUT Internal regulated supply (2.7 V –3.4 V) for analog circuitry
VIN 2 SUP External supply input to chip (2.7 V –5.5 V)
VDD_RF 3 OUT Internal regulated supply (2.7 V –5 V), normally connected to VDD_PA (pin 4)
VDD_PA 4 INP Supply for PA; normally connected externally to VDD_RF (pin 3)
TX_OUT 5 OUT RF output (selectable output power, 100 mW at 8 Ωor 200 mW at 4 Ω, with VDD = 5 V)
VSS_RF 6 SUP Negative supply for PA; normally connected to circuit ground
VSS_RX 7 SUP Negative supply for RX inputs; normally connected to circuit ground
RX_IN1 8 INP RX input, used for AM reception
RX_IN2 9 INP RX input, used for PM reception
VSS 10 SUP Chip substrate ground
BAND_GAP 11 OUT Band-gap voltage (1.6 V); internal analog voltage reference; must be ac-bypassed to ground.
Also can be configured to provide the received analog signal output (ANA_OUT)
ASK/OOK 12 BID Direct mode, selection between ASK and OOK modulation (0 = ASK, 1 = OOK)
IRQ 13 OUT Interrupt request
MOD 14 INP Direct mode, external modulation input
VSS_A 15 SUP Negative supply for internal analog circuits; normally connected to circuit ground
Supply for I/O communications (1.8 V –5.5 V). Should be connected to VIN for 5-V
VDD_I/O 16 SUP communication, VDD_X for 3.3-V communication, or any other voltage from 1.8 V to 5.5 V.
I/O_0 17 BID I/O pin for parallel communication
I/O_1 18 BID I/O pin for parallel communication
I/O_2 19 BID I/O pin for parallel communication
I/O_3 20 BID I/O pin for parallel communication
I/O_4 21 BID I/O pin for parallel communication
(1) SUP = Supply, INP = Input, BID = Bi-directional, OUT = Output
Copyright ©2006–2010, Texas Instruments Incorporated Physical Characteristics 5
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Table 3-1. Terminal Functions (continued)
TERMINAL TYPE(1) DESCRIPTION
NAME NO.
I/O pin for parallel communication
I/O_5 22 BID Strobe out clock for serial communication
Data clock output in direct mode
I/O pin for parallel communication
I/O_6 23 BID MISO for serial communication (SPI)
Serial bit data output in direct mode 1 or sub-carrier signal in direct mode 0
I/O pin for parallel communication.
I/O_7 24 BID MOSI for serial communication (SPI)
Pulse enable and selection of power down mode. If EN2 is connected to VIN, then VDD_X is
EN2 25 INP active during power down to support the MCU. Pin can also be used for pulse wake-up from
power-down mode.
DATA_CLK 26 INP Clock input for MCU communication (parallel and serial)
Clock for MCU (3.39 / 6.78 / 13.56 MHz) at EN = 1 and EN2 = don't care
SYS_CLK 27 OUT If EN = 0 and EN2 = 1, then system clock is set to 60 kHz
EN 28 INP Chip enable input (If EN = 0, then chip is in power-down mode).
VSS_D 29 SUP Negative supply for internal digital circuits; normally connected to circuit ground
OSC_OUT 30 OUT Crystal oscillator output
OSC_IN 31 INP Crystal oscillator input
VDD_X 32 OUT Internally regulated supply (2.7 V –3.4 V) for external circuitry (MCU)
Thermal Pad Connected to circuit ground
3.2 PACKAGING/ORDERING INFORMATION(1)
PACKAGED DEVICES PACKAGE TYPE (2) TRANSPORT MEDIA QUANTITY
TRF7960RHBT Tape and reel 250
RHB-32
TRF7960RHBR Tape and reel 3000
TRF7961RHBT Tape and reel 250
RHB-32
TRF7961RHBR Tape and reel 3000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package .
6Physical Characteristics Copyright ©2006–2010, Texas Instruments Incorporated
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www.ti.com SLOU186F–AUGUST 2006–REVISED AUGUST 2010
4 ELECTRICAL SPECIFICATIONS
4.1 ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE UNIT
VIN Supply voltage 6 V
IOOutput current 150 mA
Continuous power dissipation See Dissipation Ratings Table
Maximum junction temperature, any condition(2) 140 °C
TJMaximum junction temperature, continuous operation, long-term reliability(2) 125 °C
Tstg Storage temperature range –55 to 150 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 °C
HBM (human body model) 2 kV
ESDS rating CDM (charged device model) 500 V
MM (machine model) 200
(1) The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may
cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those specified are not implied.
(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
4.2 DISSIPATION RATINGS TABLE
POWER RATING(2)
θJC θJA (1)
PACKAGE (°C/W) (°C/W) TA≤25°C TA= 85°C
RHB (32) 31 36.4 2.7 W 1.1 W
(1) This data was taken using the JEDEC standard high-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to increase substantially.
Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and
long-term reliability.
4.3 RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT
VIN Supply voltage 2.7 5 5.5 V
TJOperating virtual junction temperature range –40 125 °C
TAOperating ambient temperature range –40 25 110 °C
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SLOU186F–AUGUST 2006–REVISED AUGUST 2010 www.ti.com
4.4 ELECTRICAL CHARACTERISTICS
over temperature range VS= 5 V (unless otherwise noted) TYP
–40°C
PARAMETER CONDITIONS MIN/
25°C TO UNIT MAX
110°C
IPD Supply current in power-down mode All systems disabled, including supply-voltage regulators 1 10 μA MAX
The reference voltage generator and the VDD_X remain
IPD2 Supply current in power-down mode 2 120 300 μA MAX
active to support external circuitry.
Oscillator running, supply-voltage regulators in
ISTBY Supply current in standby mode 1.5 4 mA MAX
low-consumption mode
Supply current without antenna driver Oscillator, regulators, Rx and AGC, are all active. Tx is
ION1 10 16 mA MAX
current off.
Supply current with antenna driver Oscillator, regulators, Rx, AGC, and Tx are all active.
ION2 70 mA MAX
current Pout = 100 mW.
Supply current with antenna driver Oscillator, regulators, Rx, AGC, and Tx are all active.
ION3 120 mA MAX
current Pout = 200 mW.
1.4 MIN
BG Band Gap voltage Internal analog reference voltage 1.6 V
1.7 MAX
1.4 MIN
VPOR Power on reset voltage (POR) 2 V
2.5 MAX
3.1 MIN
VDD_A Regulated supply for analog circuitry 3.5 V
3.8 MAX
4 MIN
VDD_RF Regulated supply for RF circuitry Regulator set for 5-V system with 250-mV difference. 4.6 V
5.2 MAX
3.1 MIN
VDD_X Regulated supply for external circuitry 3.4 V
3.8 MAX
The difference between the external supply and the
Rejection of external supply noise on
PPSRR regulated voltage is higher than 250 mV. Measured at 26 20 dB MIN
the supply VDD_RF regulator 212 kHz.
Half-power mode 8 12 ΩMAX
RRFOUT PA driver output resistance Full- power mode 4 6 ΩMAX
5 MIN
RRFIN RX_IN1 and RX_IN2 input resistance 10 kΩ
20 MAX
VRFIN Maximum input voltage At RX_IN1 and RX_IN2 inputs 3.5 VPP MAX
fSUB-CARRIER = 424 kHz 1.2 2.5 mVPP MAX
VSENS Input sensitivity fSUB-CARRIER = 848 kHz 1.2 3 mVPP MAX
tSET_PD Set up time after power down 10 20 ms MAX
tSET_STBY Set up time after standby mode 30 100 μs MAX
Recovery time after modulation
tREC Modulation signal: sine, 424-kHz, 10-mVpp 60 μs MAX
(ISO14443)
30 MIN
fSYS_CLK SYS_CLK frequency In PD2 mode EN = 0 and EN2 = 1 60 kHz
120 MAX
CLKMAX Maximum CLK frequency 2 MHz TYP
VIL Input logic low 0.2 0.2 VDD_I/O MAX
VIH Input logic high 0.8 VDD_I/O MIN
ROUT Output resistance I/O_0 to I/O_7 low_io = H for VDD_I/O <2.7 V 400 800 ΩMAX
RSYS_CLK Output resistance SYS_CLK low_io = H for VDD_I/O <2.7 V 200 400 ΩMAX
8ELECTRICAL SPECIFICATIONS Copyright ©2006–2010, Texas Instruments Incorporated
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Test Port
or
Ext Ant Port
1
TRF796x
RHB - 32
2 3 4
5
6
7
8
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
17
18
19
20
21
22
23
24
33
Thermal Pad
VDD_X
OSC_IN
OSC_OUT
VSS_D
EN
SYS_CLK
DATA_CLK
EN2
VDD_I / O
VSS_A
MOD
IRQ
ASK / OOK
BAND GAP
VSS
RX2_PM
RX1_AM
VDD_A
VSS_RX
VSS_RF
TX_OUT
VDD_PA
VDD_RF
VIN
I / O_0
I / O_1
I / O_2
I / O_3
I / O_4
I / O_5
I / O_6
I / O_7
1000 pF
1000 pF
1500 pF 1500 pF
680 pF
680 pF 220 pF
VSWR
Adj
Phase Adj
330 nH 150 nH
Freq Adj
100 pF
27 pF
2.2 uF
10 nF
10 nF 10 nF 10 nF
2.2 uF 2.2 uF 2.2 uF
0 Ohms
0 Ohms
27 pF 27 pF
13.56 MHz
VSWR Adj
DVcc
D/AVss
XIN
1 K
1 K
Reader Pwr Enable (GPIO)
Interrupt Capable GPIO
MSP430 (Family)
4.7 uF
10V
0.1 uF
1 K
CLK (GPIO)
PX.7
PX.6
PX.5
PX.4
PX.3
PX.2
PX.1
PX.0
Vcc
100
0.1 uF
2.2 uF
10 nF
10K
10 pF
Harmonic
Suppression
C1 C2´
Xtal CLCS
C1 + C2
=+
Antenna
Circuit
Ant “Q”
Adj
R “cal”
open / short / load
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TRF7961
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4.5 Application Schematic for the TRF796x EVM (Parallel Mode)
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Test Port
or
Ext Ant Port
1
TRF796x
RHB - 32
2 3 4
5
6
7
8
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
17
18
19
20
21
22
23
24
33
Thermal Pad
VDD_X
OSC_IN
OSC_OUT
VSS_D
EN
SYS_CL
DATA_CLK
EN2
VDD_I / O
VSS_A
MOD
IRQ
ASK /
BAND GAP
VSS
RX2_PM
RX1_AM
VDD_A
VSS_RX
VSS_RF
TX_OUT
VDD_PA
VDD_RF
VIN
I / O_0
I / O_1
I / O_2
I / O_3
I / O_4
I / O_5
I / O_6
I / O_7
1000 pF
1000 pF
1500 pF 1500 pF
680 pF
680 pF 220 pF
VSWR
Adj
Phase Adj 330 nH 150 nH
Freq Adj
100 pF
27 pF
2.2 Fµ
10 nF
10 nF 10 nF 10 nF
2.2 Fµ
2.2 Fµ
2.2 Fµ
0 Ohms
0 Ohms
27 pF 27 pF
13.56 MHz
VSWR Adj
Vcc
DVcc
D/AVss
MISO
MOSI
XIN
10 K 10 K
1 K
1 K
CLK (GPIO)
Slave Select (GPIO)
Reader Pwr Enable (GPIO)
Interrupt Capable GPIO
MSP430 (Family)
4.7 F
10V
µ
0.1 Fµ
1 K
100
0.1 Fµ
2.2 Fµ
10 nF
10 pF
Harmonic
Suppression
10 K
C1 C2´
Xtal CLCS
C1 + C2
=+
Antenna
Circuit
Ant “Q”
Adj
R “cal”
open / short / load
TRF7960
TRF7961
SLOU186F–AUGUST 2006–REVISED AUGUST 2010 www.ti.com
4.6 Application Schematic for the TRF796x EVM (SPI Mode)
10 ELECTRICAL SPECIFICATIONS Copyright ©2006–2010, Texas Instruments Incorporated
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