Texas Instruments DAC63004WCSP-EVM User manual

User’s Guide
DAC63004WCSP-EVM User's Guide
ABSTRACT
This user’s guide describes the characteristics, operation, and use of the DAC63004WCSP-EVM evaluation
module (EVM). This EVM is designed to evaluate the performance of the DAC63004W and DAC53004W
commercial, buffered voltage output DACs in a variety of configurations. The DAC63204W, DAC53204W, and
DAC63202W are also supported by this EVM. Throughout this document, all these devices are referred to
as the DACx3004W, and the terms evaluation board, evaluation module, and EVM are synonymous with
the DAC63004WCSP-EVM. This document includes a schematic, printed-circuit board (PCB) layouts, and a
complete bill of materials.
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Table of Contents
1 Overview..................................................................................................................................................................................3
1.1 Kit Contents........................................................................................................................................................................3
1.2 Related Documentation from Texas Instruments............................................................................................................... 3
2 System Setup.......................................................................................................................................................................... 4
2.1 Software Setup...................................................................................................................................................................4
2.2 Hardware Setup................................................................................................................................................................. 5
3 Detailed Description............................................................................................................................................................... 7
3.1 Hardware Description.........................................................................................................................................................7
3.2 Software Description........................................................................................................................................................ 10
4 Schematic, PCB Layout, and Bill of Materials................................................................................................................... 16
4.1 Schematics.......................................................................................................................................................................17
4.2 PCB Layout...................................................................................................................................................................... 19
4.3 Bill of Materials.................................................................................................................................................................21
List of Figures
Figure 2-1. Software Installation Path..........................................................................................................................................4
Figure 2-2. FTDI USB Drivers......................................................................................................................................................5
Figure 2-3. Hardware Setup........................................................................................................................................................ 5
Figure 3-1. DAC63004WCSP-EVM Hardware Simplified Schematic.......................................................................................... 7
Figure 3-2. DAC63004WCSP-EVM High Current Output Stage Block Diagram......................................................................... 9
Figure 3-3. DAC63004WCSP-EVM Optional Current Source Circuit Layout.............................................................................. 9
Figure 3-4. DAC63004WCSP-EVM GUI Connection Detection................................................................................................ 10
Figure 3-5. Interface Settings.................................................................................................................................................... 10
Figure 3-6. High Level Configuration Page................................................................................................................................11
Figure 3-7. Basic DAC Subpage................................................................................................................................................12
Figure 3-8. Margining Subpage................................................................................................................................................. 13
Figure 3-9. Function Generation Subpage................................................................................................................................ 14
Figure 3-10. Low Level Configuration Page.............................................................................................................................. 15
Figure 3-11. Low Level Configuration Page Options................................................................................................................. 15
Figure 4-1. DAC63004WCSP-EVM Schematic Page 1.............................................................................................................17
Figure 4-2. DAC63004WCSP-EVM Schematic Page 2.............................................................................................................18
Figure 4-3. DAC63004WCSP-EVM PCB Components Layout................................................................................................. 19
Figure 4-4. DAC63004WCSP-EVM PCB Layers.......................................................................................................................20
List of Tables
Table 1-1. Contents of DAC63004WCSP-EVM Kit...................................................................................................................... 3
Table 1-2. Optional Components Not Included With Kit...............................................................................................................3
Table 1-3. Related Documentation.............................................................................................................................................. 3
Table 2-1. DAC63004WCSP-EVM Power Supply Inputs.............................................................................................................6
Table 2-2. DAC63004WCSP-EVM Jumper Settings....................................................................................................................6
Table 3-1. DAC63004WCSP-EVM J1 Pin Definitions..................................................................................................................8
Table 3-2. DAC63004WCSP-EVM J2 Pin Definitions..................................................................................................................8
Table 3-3. DAC63004WCSP-EVM J8 Pin Definitions..................................................................................................................8
Table 3-4. DAC63004WCSP-EVM J9 Pin Definitions..................................................................................................................8
Table 4-1. DAC63004WCSP-EVM Bill of Materials................................................................................................................... 21
Trademarks
FemtoFET™, BoosterPack™, and LaunchPad™ are trademarks of Texas Instruments.
Windows™ is a trademark of Microsoft Corporation.
LabVIEW™ is a trademark of National Instruments.
All trademarks are the property of their respective owners.
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1 Overview
The DAC63004WCSP-EVM is an easy-to-use platform to evaluate the functionality and performance of the
DAC63004W and DAC53004W commercial devices. The DAC63004WCSP-EVM has optional, nonpopulated
components that can be used to evaluate the DACx3004W with external FemtoFET™ MOSFETs for high current
source applications in a small, 4-mm × 4-mm solution size.
The 12-bit DAC63004W and 10-bit DAC53004W are a pin-compatible family of ultra-low power, quad-channel,
buffered, voltage-output and current-output smart digital-to-analog converters (DACs). The DAC outputs are
capable of both voltage and current output. The DACx3004W support Hi-Z power-down mode and Hi-Z
output during power-off conditions. The DAC outputs provide a force-sense option for use as a programmable
comparator and current sink. The multifunction GPIO, function generation, and nonvolatile memory (NVM)
enable these smart DACs for use in applications and design reuse without the need for runtime software. These
devices also automatically detect I2C, SPI, and PMBus interfaces, and contain an internal reference.
1.1 Kit Contents
Table 1-1 details the contents of the EVM kit. Contact the nearest TI Product Information Center if any
component is missing. Make sure to verify the latest versions of the related software at the Texas Instruments
website, www.ti.com. Table 1-2 lists the optional components not included with the kit. These optional
components are available for purchase from the Texas Instruments website at www.ti.com.
Table 1-1. Contents of DAC63004WCSP-EVM Kit
Item Quantity
DAC63004WCSP-EVM evaluation board PCB 1
USB micro-B plug to USB-A plug cable 1
Table 1-2. Optional Components Not Included With Kit
Item Quantity
BOOSTXL-DAC-PORT digital-to-analog converter (DAC)
BoosterPack™ plug-in module 1
TM4C1294 Connected LaunchPad™ Evaluation Kit (EK-TM4C1294XL)
(In this document, the LaunchPad Evaluation Kit is referred to as TI
launchpad)
1
1.2 Related Documentation from Texas Instruments
The following document provides information regarding Texas Instruments integrated circuits used in the
assembly of the DAC63004WCSP-EVM. This user's guide is available from the TI web site under literature
number SLAU879. Any letter appended to the literature number corresponds to the document revision that is
current at the time of the writing of this document. Newer revisions may be available from the TI web site
at www.ti.com, or call the Texas Instruments Literature Response Center at [phone] or the Product
Information Center at [phone]. When ordering, identify the document by both title and literature number.
Table 1-3. Related Documentation
Document Literature Number
DAC63004W product page SLASF72
DAC53004W product page
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2 System Setup
2.1 Software Setup
This section provides the procedure for EVM software installation.
2.1.1 Operating Systems
The EVM software is compatible with the Windows™ 10 operating system.
2.1.2 Software Installation
Before software installation, make sure that the DAC63004WCSP-EVM is not connected to the computer.
The software can be downloaded from the device product folders. After the software is downloaded, navigate to
the download folder, and run the DAC63004WCSP-EVM software installer executable.
When the DAC63004WCSP-EVM software is launched, an installation dialog window opens and prompts the
user to select an installation directory. Figure 2-1 shows that the software path defaults to C:\Program Files
(x86)\Texas Instruments\DAC63004WCSP-EVM.
Figure 2-1. Software Installation Path
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The software installation also installs the FTDI USB drivers, and automatically copies the required LabVIEW™
software files and drivers to the computer. The FTDI USB drivers install in a second executable. Figure
2-2 shows the window that is automatically launched after the DAC63004WCSP-EVM software installation is
complete.
Figure 2-2. FTDI USB Drivers
2.2 Hardware Setup
This section describes the overall system setup for the EVM. A computer runs the software that provides an
interface to the DAC63004WCSP-EVM through the onboard controller.
The USB connection generates 5 V of power for use as the DAC supply voltage (VDD). The onboard controller
generates 3.3 V of power for the input/output (IO) signals generated by the controller. These IO signals are level
translated to the VDD voltage of the DAC. Figure 2-3 displays the system hardware setup.
USB Port
EVM
Jumpers
Figure 2-3. Hardware Setup
2.2.1 Electrostatic Discharge Caution
CAUTION
Many of the components on the DAC63004WCSP-EVM are susceptible to damage by electrostatic
discharge (ESD). Observe proper ESD handling precautions when unpacking and handling the
EVM, including the use of a grounded wrist strap at an approved ESD workstation.
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2.2.2 Power Configurations and Jumper Settings
The DAC63004WCSP-EVM provides electrical connections to the device supply pins. Table 2-1 shows the
connections.
Table 2-1. DAC63004WCSP-EVM Power Supply Inputs
DAC63004WCSP-
EVM Connector Supply Name Voltage Range
J2.1 VDD 1.8 V to 5.5 V (5 V available from the USB); remove J3 if applying an external VDD to the DAC.
J1.1 GND 0 V
The jumper settings on the DAC63004WCSP-EVM are crucial to the proper operation of the EVM. Table 2-2
provides the details of the configurable jumper settings on the EVM.
Table 2-2. DAC63004WCSP-EVM Jumper Settings
Jumper Default Position Available Option Description
J3 Closed: 5-V USB supply connected to
EVM VDD supply
Open: 5-V USB supply disconnected from EVM VDD
supply External or onboard VDD selection
J5 2-3: I2C enabled 1-2: SPI enabled I2C or SPI selection
J6 Closed: GPIOs enabled Open: GPIOs disabled Controller GPIO enable
J7 Closed: EVM VDD supply connected to
DAC VDD
Open: EVM VDD supply disconnected from DAC
VDD Supply selection for theDACx3004W
If an external supply is applied to the DAC VDD pin, remove jumper J3 to disconnect the 5-V USB supply from
the DAC VDD pin.
J7 can be used to measure the supply current for the DACx3004W. Place jumper J7 to connect the EVM supply
to the DACx3004W. Remove jumper J7 and place a current meter between the J7 header pins to measure the
current consumed by the ultra-low power DACx3004W.
GPIO2 from the onboard controller is connected to the DAC GPIO pin of the DACx3004W. This input can be
controlled through the graphical user interface (GUI) using the controls for GPIO2. If DAC GPIO is configured as
an output, remove J6 to disable the GPIOs from the onboard controller.
GPIO3 from the onboard controller is broken out to J1, pin 8 and is controlled through the GUI using the controls
for GPIO3.
To enable the GPIO pins, close jumper J6. To disable the GPIO pins, remove jumper J6.
2.2.3 Connecting the Hardware
After the power and jumper configurations are set up as per Section 2.2.2, connect the USB cable from the
DAC63004WCSP-EVM USB port to the computer.
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3 Detailed Description
3.1 Hardware Description
The following sections provide detailed information on the EVM hardware and jumper configuration settings.
3.1.1 Theory of Operation
Figure 3-1 shows a simplified schematic of the DAC63004WCSP-EVM board. There are two 16-pin connectors
that provide access to all of the DAC pins. The GPIO, I2C, and SPI signals from the onboard controller are
connected to the DAC through three level translators. Each level translator can be independently disabled to
disconnect the onboard controller GPIO, I2C, and SPI signals from the DAC signals while the DAC is running in
stand-alone mode.
VDD
DAC_OUT3
DAC_FB2
DAC_OUT2
DACx3004W
DAC_SCLK
DAC_SDO
DAC_SCL
EXT_REF
DAC_SDI
GND
GND
GND
DAC_SYNC
DAC_SDA
DAC_GPIO/
FTDI_GPIO2
DAC_VREF
DAC_CAP
DAC_FB0
DAC_OUT0
DAC_OUT1
DAC_FB1
NC
FTDI_GPIO3
DAC_VREF
GND
GND
NC
NC
GND
GND
GND
J2 J1
Controller
GPIO Lines
I2C Lines
SPI Lines
DAC_FB3
R5
R6
R7
J5
SPI/I2C
Selection
J6
GPIO
Enable
USB Port
J3
USB 5V
Connection
IOUT2
IOUT3
IOUT0
IOUT1
J7
DAC VDD
Connection
IOUTX
DAC_FBX
DAC_OUTX
J9 J8
R8
DNP
Figure 3-1. DAC63004WCSP-EVM Hardware Simplified Schematic
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3.1.1.1 Signal Definitions
The DAC63004WCSP-EVM provides access to all DAC pins through connection J1 and J2. Table 3-1 and
Table 3-2 list the J1 and J2 pin definitions. J8 and J9 provide access to the current outputs when the optional
components are populated. Table 3-3 and Table 3-4 list the J8 and J9 pin definitions.
Table 3-1. DAC63004WCSP-EVM J1 Pin Definitions
Pin# Signal Description
1 GND Ground
2 DAC_SDI SPI SDI signal for DAC
3 DAC_SYNC SPI SYNC signal for DAC
4 DAC_SDA I2C SDA
5 GND Ground
6 GND Ground
7 NC Not connected
8 FTDI_GPIO3 GPIO3 output of the onboard controller
9 DAC_GPIO GPIO Input for DACx3004W
10 DAC_VREF DAC_VREF
11 DAC_VREF VREF input to the DAC
12 DAC_CAP LDO bypass capacitor
13 DAC_FB0 Feedback pin for DAC VOUT0
14 DAC_OUT0 Output pin for DAC VOUT0
15 DAC_OUT1 Output pin for DAC VOUT1
16 DAC_FB1 Feedback pin for DAC VOUT1
Table 3-2. DAC63004WCSP-EVM J2 Pin Definitions
Pin# Signal Description
1 DAC_VDD VDD power supply for DAC
2 DAC_SCLK SPI SCLK
3 DAC_SDO SPI SDO
4 DAC_SCL I2C SCL
5 EXT_REF External reference input for DAC
6 GND Ground
7 GND Ground
8 GND Ground
9 NC Not connected
10 NC Not connected
11 DAC_FB3 Feedback pin for DAC VOUT3
12 DAC_OUT3 Output pin for DAC VOUT3
13 GND Ground
14 GND Ground
15 DAC_OUT2 Output pin for DAC VOUT2
16 DAC_FB2 Feedback pin for DAC VOUT2
Table 3-3. DAC63004WCSP-EVM J8 Pin Definitions
Pin# Signal Description
1 IOUT0 Current output connection for Q1
2 IOUT1 Current output connection for Q2
Table 3-4. DAC63004WCSP-EVM J9 Pin Definitions
Pin# Signal Description
1 IOUT2 Current output connection for Q3
2 IOUT3 Current output connection for Q4
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3.1.1.2 Optional Current Source Circuitry
The DAC63004WCSP-EVM has optional, nonpopulated components that can be used to evaluate the
DACx3004W with external FemtoFET MOSFETs for high current source applications in a small, 4 mm × 4
mm area.
Figure 3-2 shows the block diagram for the optional circuit. The DACx3004W is a four channel device, so there
are up to four high current outputs available with the optional circuitry. 3-Ω RSET resistors are used in this
example. This circuit can achieve a current of 200 mA when the DAC outputs are set to 0.6 V. The RSET resistors
used in this example are size 0603 with a power rating of 0.33 W. Larger resistors can be used to achieve a
higher power rating which allows for a higher current output.
RSET
OUTx
FBx
VDD
GND
VDD
IOUTx
DACx3004W
Figure 3-2. DAC63004WCSP-EVM High Current Output Stage Block Diagram
Figure 3-3 is a snip of the 4-mm × 4-mm high current output stage layout. The layout consists of the
DACx3004W, four FemtoFET MOSFETs, and four size-0603 resistors. The DAC63004WCSP-EVM has
footprints for 0805 resistors that are not a part of the example layout so that larger resistors can also be
evaluated with the DAC63004WCSP-EVM.
1
Figure 3-3. DAC63004WCSP-EVM Optional Current Source Circuit Layout
Remove R5, R6, R7, and R8 on the DAC63004WCSP-EVM to disconnect the DAC_OUTx and DAC_FBx pins
before populating the optional components for the high current output stage.
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3.2 Software Description
This section describes the features of the DAC63004WCSP-EVM software, and discusses how to use these
features. The software provides basic control of all the DACx3004W registers and functions.
3.2.1 Starting the Software
To launch the software, navigate to the Texas Instruments folder in the Start menu, and select the
DAC63004WCSP-EVM icon.
Figure 3-4 shows that if the onboard controller is connected correctly, the status bar at the bottom of the screen
displays CONNECTED. If the controller is not properly connected or not connected at all, the status displays
DEMO. If the GUI is not displaying the CONNECTED status while the EVM is connected, unplug and reconnect
the EVM, and then relaunch the GUI software. If the display continues to display DEMO, uncheck the Demo
Mode checkbox (see Figure 3-6, upper-right corner).
Figure 3-4. DAC63004WCSP-EVM GUI Connection Detection
Figure 3-5 shows the Interface Settings window. When the GUI starts, the Interface Settings window pops up.
This window contains drop-down menus that select protocol (SPI or I2C) and, if I2C protocol is selected, the I2C
device address.The menu does not pop up if the GUI starts in Demo mode. In this case, uncheck the Demo
Mode checkbox. If the interface must be updated again, toggle the Demo Mode checkbox for the menu to
reappear.
Figure 3-5. Interface Settings
The SDO pin on the DACx3004W is connected to the GPIO2 output from the onboard controller. Before
configuring the SDO pin as an output to enable readback, remove J6 to disable the GPIO outputs from the
onboard controller or remove R13 on the DAC63004WCSP-EVM to disconnect the GPIO2 pin from the SDO pin.
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3.2.2 Software Features
The DAC63004WCSP-EVM GUI incorporates interactive functions that help configure an individual DACx3004W
device using I2C or SPI communication. These functions are built into several GUI pages, as shown in the
following subsections. The menu bar on the far left of the GUI allows the user to switch between pages. The
menu bar displays the High Level Configuration page with Basic DAC, Margining, and Function Generation
subpages, and the Low Level Configuration page.
Before using the GUI, see the respective device data sheet for detailed DACx3004W programming instructions.
3.2.2.1 High Level Configuration Page
Figure 3-6 shows the High Level Configuration page that provides an interface to quickly configure the
parameters and relevant register settings for the respective DACx3004W device. The High Level Configuration
page consists of the Basic DAC, Margining, and Function Generation subpages.
Figure 3-6. High Level Configuration Page
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3.2.2.1.1 Basic DAC Subpage
Figure 3-7 shows the Basic DAC subpage that provides an interface to quickly power up, select the reference
and output span, and program the output voltage or current for the respective DACx3004W device. When VDD
is applied, the DACx3004W device starts up in Hi-Z power-down mode by default. The Basic DAC subpage also
provides controls to configure the GPIO pin on the respective DACx3004W device, and control the two GPIO
outputs of the DAC63004WCSP-EVM onboard controller. The register settings can be programmed or retrieved
using the Program NVM or Reload NVM checkboxes, respectively.
Figure 3-7. Basic DAC Subpage
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3.2.2.1.2 Margining Subpage
Figure 3-8 shows the Margining subpage. This subpage provides the settings for the margin-low, margin-high,
and nominal DAC outputs. Self-resetting triggers are used to trigger the margin-high and margin-low voltage
levels for each DAC channel. The Code Step and Slew Rate drop-down menu settings are also provided on this
page to control the slew of each margin high or low trigger (Trigger MHx). The register settings are programmed
or retrieved using the Program NVM or Reload NVM checkboxes, respectively.
Figure 3-8. Margining Subpage
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3.2.2.1.3 Functions Generation Subpage
Figure 3-9 shows the Function Generation subpage. This subpage provides control of the relevant register
settings for function generation This subpage provides the ramp programming done through the Code Step
and Slew Rate drop-down menu settings. The DAC waveform drop-down menu selects the waveform to
be generated: triangular, saw-tooth, inverse saw-tooth, square, or sine. The Margin High Code and Margin
Low Code settings define the upper and lower bounds of the waveform, respectively. The Start Function
Gen checkboxes start or stop the defined function generation for each channel. The register settings can be
programmed or retrieved using the Program NVM or Reload NVM checkboxes, respectively.
Figure 3-9. Function Generation Subpage
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3.2.2.2 Low Level Configuration Page
Figure 3-10 shows the Low Level Configuration page. This subpage allows access to low-level communication
directly with the respective DACx3004W device registers. Select a register on the Register Map list to show a
description of the values in that register, as well as information on the register address, default value, size, and
current value. Data are written to the registers by entering a value in the value column of the GUI.
Figure 3-10. Low Level Configuration Page
To store the values of the register map locally, select Save Configuration under the File menu option. The stored
configuration files can be recalled and loaded by selecting Open Configuration.
Figure 3-11 shows the four configuration buttons provided on the Low Level Configuration page that allow the
user to read from and write to the device registers:
•Write Selected
•Write Modified
•Read Selected
•Read All
The Write Modified button is enabled only in Deferred Update Mode. Deferred Update Mode initiates a write
operation only when the Write Selected or Write Modified buttons are pressed. By default, Immediate Update
Mode is selected for the Low Level Configuration page write operations.
Figure 3-11. Low Level Configuration Page Options
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4 Schematic, PCB Layout, and Bill of Materials
This section contains the schematics, printed circuit board (PCB) layout diagrams, and a complete bill of
materials for the DAC63004WCSP-EVM. The optional components are shown as do not populate (DNP) on the
schematic, and have quantities of zero in the BOM.
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4.1 Schematics
VBUS 1
D- 2
D+ 3
ID 4
GND 5
67 8
11 10
9
J4
L1
4.7µF
C6
100nF
C7
D1
100nF
C12
GND GND
GND GND
D2 D3
GND GNDGNDUSB_SHIELD
USB Connector Interface
USB_DP_P
USB_DM_N
100nF
C14
VCCIO_FTDI
USB_DM_N
USB_DP_P
GND
0 R33BCD_DET
1 2
Y1
0
R44
1.00M
R43
GND GND
GND
FTDI_SCL_GPIO_0
FTDI_SDA_GPIO_1
FTDI_GPIO_3
FTDI_SS0
FTDI_SCK
FTDI_MOSI
FTDI_MISO
FTDI_IO2
FTDI_IO3
USB to SPI/I2C Conversion
FTDI_XSCI
FTDI_XSCO
FTDI_XSCI
FTDI_XSCO
VCCIO_FTDI
4.7µF
10V
C19
GND
Decoupling Caps for FTDI422H
VCCIO_FTDI DAC_5V
100nF
C15
100nF
C13
GND GND
Level Translator for SPI
DAC_SDI
DAC_SYNC
DAC_SCLK
Level Translator for I2C
VCCA
3VCCB 7
SDA_A
4SDA_B 1
SCL_A
5SCL_B 8
OE
6GND 2
TCA9406DCTR
U2
VCCIO_FTDI
VCCIO_FTDI DAC_5V
GND
Level Shi

ers
DAC_SCL
DAC_SDA
Level Shifter Enables
Output To DAC
USB_VBUS
USB_VBUS VCCIN_FTDI
USB_VBUS
USB_VBUS
DAC_SCLK
DAC_SDA
DAC_SDI
DAC_SYNC
DAC_SCL
DAC_SDO
Level Translator for GPIO
VCCA
3VCCB 7
SDA_A
4SDA_B 1
SCL_A
5SCL_B 8
OE
6GND 2
TCA9406DCTR
U6
VCCIO_FTDI
VCCIO_FTDI
100nF
25V
C29
GND
100nF
25V
C30
GND
GND
DAC_5V
DAC_5V
DAC_5V
DAC_GPIO
DAC 5V Port
3.30k
R26
3.30k
R27
3.30k
R24
3.30k
R23
50V
100pF
C8
100nF
C16
10.0
R31
10.0
R29
DAC_SDO
GND
OE_I2C
OE_GPIO
OE_SPI
SH-J2
OE_SPI
OE_I2C
VCCIO_FTDI
10.0k
R37
10.0k
R22
SH-J3
VCCIO_FTDI
OE_GPIO
10.0k
R32
GND
330
R34
12k
R30
VCCA
1VCCB 14
A1
2
A2
3
A3
4
A4Y
5
B1Y 13
B2Y 12
B3Y 11
B4 10
OE
8
Thermal_Pad 15 NC
6
NC
9GND 7
TXU0304BQA
U4
FTDI_GPIO3
GND
GND
VCCIN
26
VCCIO
7
VOUT3V3
25
DCNF0
4
DCNF1
5
IO2 11
IO3 12
SS 32
SS0O 17
RESET
3
BCD_DET
31
DEBUGGER
1
DM
22 DP
23
EP 33
INTR/WAKEUP/GPIO3 16
MISO 9
MOSI 10
RREF
21
SCK 8
SCL/SS1O/GPIO0 13
SDA/SS2O/GPIO1 14
STEST_RST
2
SUSP_OUT/SS3O/GPIO2 15
VBUS_DET
30
VPP
29
XSCI
18
XSCO
19
AGND 27
DGND 6
DGND 28
UGND 20
UGND 24
U3
FT4222HQ-D-R
VCCIO_FTDI
GND
VCCIO_FTDI
FTDI_GPIO_2
1
2
3
J5
SPI/I2C Enable
1
2
J6
GPIO Enable
50V
18pF
C17
50V
18pF
C18
12MHz Crystal with
20pF Capacitor
Figure 4-1. DAC63004WCSP-EVM Schematic Page 1
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SLAU879 – DECEMBER 2022
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DAC63004WCSP-EVM User's Guide 17
Copyright © 2022 Texas Instruments Incorporated

BOOSTXL-DAC-PORT Interface Left
BOOSTXL-DAC-PORT Interface Right
Pull ups for all digital IOs
DAC_GPIO/SDO
DAC_SCL/SYNC
DAC_A0/SDI
DAC_SDA/SCLK
DAC_VREF
DAC_CAP
DAC_FB0
DAC_FB1
3.32k R1 3.32k R2 3.32k R3 3.32k R4
DAC_5V
GND
DAC_VREF DAC_VDD
GND
Reference and Decoupling Capacitors for DAC
DAC_5V
DAC_OUT0
DAC_OUT1
GND
DAC_SCLK
DAC_SDO
DAC_SCL
EXT_REF
DAC_SDI
DAC_SYNC
DAC_SDA
DAC_GPIO
0R13
0R15
DAC_GPIO/SDO
DAC_GPIO
DAC_SDO
0R17
0R19
DAC_SCL/SYNC
DAC_SCL
DAC_SYNC
0R14
0R16
DAC_A0/SDI
DAC_A0
DAC_SDI
0R18
0R20
DAC_SDA/SCLK
DAC_SDA
DAC_SCLK
Interface selection I2C / SPI
GND
DAC_VREF
DAC_CAP
DAC_VREF
DAC_SDO
USB_VBUS
DAC_SCL
DAC_SDI
DAC_SDA
DAC_SCLKDAC_SYNC
DAC_5V
DAC_5V
SH-J1
3.32k
R25
DAC_5V
DAC_FB2
DAC_FB3
DAC_OUT2
DAC_OUT3
DAC_FB0
DAC_OUT0
DAC_OUT1
DAC_FB1
DAC_FB3
DAC_OUT3
DAC_FB2
DAC_OUT2
FTDI_GPIO3
DAC_GPIO
SH-J4
3
1
2
Q1
CSD13380F3
3
1
2
Q2
CSD13380F3
3
1
2
Q3
CSD13380F3
3
1
2
Q4
CSD13380F3
DAC_OUT0 DAC_FB0
DAC_FB1DAC_OUT1
DAC_FB2DAC_OUT2
DAC_FB3DAC_OUT3
GND
GND
6.3V
0.1uF
C3
6.3V
2.2uF
C5
GND
DAC_VDD
6.3V
0.1uF
C1
0R8
0R7
0R6
0R5
DACOUTx DACFBx 0

Jumpers
1
2
J3 USB-DAC_5V
1
2
J7
DAC_5V-DAC_VDD
J10
GND
GND
3.32k
R21
GND
10.0
R42
10.0
R39
10.0
R40
10.0
R41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J2
3
R9
VDD
B1
OUT0 D2
OUT1 D3
OUT2 A3
OUT3 A2
FB0 C2
FB1 C3
FB2 B3
FB3 B2
SCL
B4
CAP
D1
VREF
A1
GPIO
A4
SDA
D4 A0
C4
AGND C1
DAC63004YBHR
U1
3
R10
3
R11
3
R12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J1
1
2
J9
1
2
J8
Figure 4-2. DAC63004WCSP-EVM Schematic Page 2
Schematic, PCB Layout, and Bill of Materials www.ti.com
18 DAC63004WCSP-EVM User's Guide SLAU879 – DECEMBER 2022
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4.2 PCB Layout
Figure 4-3. DAC63004WCSP-EVM PCB Components Layout
www.ti.com Schematic, PCB Layout, and Bill of Materials
SLAU879 – DECEMBER 2022
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DAC63004WCSP-EVM User's Guide 19
Copyright © 2022 Texas Instruments Incorporated

Figure 4-4. DAC63004WCSP-EVM PCB Layers
Schematic, PCB Layout, and Bill of Materials www.ti.com
20 DAC63004WCSP-EVM User's Guide SLAU879 – DECEMBER 2022
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Copyright © 2022 Texas Instruments Incorporated