Texas Instruments LP877451Q1EVM User manual

User’s Guide
LP877451Q1EVM Evaluation Module
ABSTRACT
The LP87745-Q1 device is designed to meet the power management requirements of the AWR and IWR MMICs
in various automotive and industrial radar applications. The device has three step-down DC/DC converters,
a 5 V boost converter and a 1.8 V/3.3 V LDO. The LDO is powered from the boost and intended for xWR
and peripheral devices IO supply. The device is controlled by an SPI serial interface and by enable signal.
The step-down DC/DC converters support programmable switching frequency of 17.6 MHz, 8.8 MHz or 4.4
MHz and have low noise across wide frequency range which enables LDO-free power solution with minimal
or no additional passive filtering. LP87745-Q1 device offers flexible external component selection to optimize
the solution in terms of performance or cost. The features of the device target safety-relevant applications with
system-safety requirements up to ASIL-C level.
This user's guide provides instructions to power up and evaluate LP87745-Q1 device using the
LP877451Q1EVM evaluation module (EVM) and software user interface (LP87745-Q1 GUI). By default
LP877451Q1EVM has LP877451A1RXVRQ1 device OTP version (17.6 MHz, Low noise use case BOM), but
this EVM can also be used to evaluate another OTP device from LP8774x-Q1 product family.
CAUTION
Hot surface.
Contact may cause burns.
Do not touch!
Table of Contents
1 Top View with Basic External Connections..........................................................................................................................2
2 Input, Output Voltages, and Load Current Requirements...................................................................................................3
3 Jumpers and connectors....................................................................................................................................................... 4
3.1 Test Points..........................................................................................................................................................................6
4 Getting Started........................................................................................................................................................................7
4.1 GUI.....................................................................................................................................................................................7
4.2 GUI Installation and working with GUI............................................................................................................................... 7
5 Watchdog...............................................................................................................................................................................10
6 Schematics, Layout and BOM..............................................................................................................................................11
6.1 Schematic Diagram.......................................................................................................................................................... 11
6.2 PCB Layer Diagram......................................................................................................................................................... 14
6.3 Part List............................................................................................................................................................................ 15
List of Figures
Figure 1-1. EVM Top-View Diagram With Basic Connections and Default Jumpers................................................................... 2
Figure 4-1. GUI Front Page......................................................................................................................................................... 8
Figure 4-2. GUI Configuration Page............................................................................................................................................ 8
Figure 4-3. GUI Register Map Page............................................................................................................................................ 9
Figure 5-1. Watchdog Sequence in Q&A Mode.........................................................................................................................10
Figure 6-1. PMIC Schematic......................................................................................................................................................11
Figure 6-2. Preregulator Schematic...........................................................................................................................................12
Figure 6-3. MCU Schematic...................................................................................................................................................... 13
Figure 6-4. Layout of Top Layer, Layer 1................................................................................................................................... 14
Figure 6-5. Layout of Ground layer 1, Layer 2...........................................................................................................................14
Figure 6-6. Layout of Signal Layer 1, Layer 3............................................................................................................................14
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Figure 6-7. Layout of Signal Layer 2, Layer 4............................................................................................................................14
Figure 6-8. Layout of Ground Layer 2, Layer 5..........................................................................................................................14
Figure 6-9. Layout of Bottom Layer, Layer 6............................................................................................................................. 14
List of Tables
Table 2-1. Input and Output Voltages, and Load Current Requirements..................................................................................... 3
Table 3-1. Terminal Blocks...........................................................................................................................................................4
Table 3-2. Configuration Jumpers................................................................................................................................................4
Table 3-3. Test Points on the EVM...............................................................................................................................................6
Table 4-1. Jumper Connections for Powering the EVM............................................................................................................... 7
Table 6-1. Parts List................................................................................................................................................................... 15
Trademarks
All trademarks are the property of their respective owners.
1 Top View with Basic External Connections
Figure 1-1 shows the top-view diagram of the EVM along with basic connections. By default, EVM is configured
to power up through VBAT supply through onboard 12 V VIN to 3.3 V VOUT pre-regulator. EVM can also be
powered through external 3.3 V supply or through USB port. Please refer to Table 3-2 for the right jumper
configuration for each power-supply input.
VIN 3.3V (3V - 4V)
Nega

ve Posi

ve
VBAT
5V – 20V
Nega

ve
Posi

ve
BUCK3 VOUT BOOST VOUT
BUCK2 VOUT BUCK1 VOUT
VIO_LDO
VOUT
USB
Default Jumpers
Figure 1-1. EVM Top-View Diagram With Basic Connections and Default Jumpers
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2 Input, Output Voltages, and Load Current Requirements
LP87745-Q1 device works with 3.3 V input supply and supply is internally monitored for undervoltage (UV) and
overvoltage (OV) conditions and hence keep the input supply voltage within 3.3 V +/- 6 % to avoid input supply
UV/OV detection.
• If the VBAT/pre-regulator path is used (default configuration), input supply to the device is already regulated
to 3.3 V.
• If external 3.3 V supply is used, ensure that input supply voltage is always within the recommended voltage
range and drop across supply path must be considered.
• If EVM is configured to work with USB supply, regulators should not be loaded.
Table 2-1 lists the input and output voltage for each regulator and their maximum load-current requirements.
Refer LP87745-Q1 device data sheet for more information about device electrical characteristics and its
features.
Table 2-1. Input and Output Voltages, and Load Current Requirements
Regulator Name Input Supply Voltage at PMIC Supply Pin Output Voltage Maximum Load Current
BUCK1 3.1 V - 3.5 V 1.8 V 3 A
BUCK2 3.1 V - 3.5 V 1.0 V 3 A
BUCK3 3.1 V - 3.5 V 1.2 V 3 A
BOOST 3.1 V - 3.5 V 5 V 0.3 A
VIO_LDO 5 V (Generated from BOOST) 3.3 V 0.150 A
If all the regulators are loaded with maximum load current simultaneously, PMIC and PCB can become hot.
Make sure that PMIC junction temperature does not exceed 150 °C.
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3 Jumpers and connectors
The LP877451Q1EVM has many terminal blocks, jumpers and test points to offer certain flexibility to help users
to verify the EVM according to their application conditions. However, EVM is pre-configured with default jumper
settings and users can power up the regulators without the need of jumper modifications. Setting these jumpers
correctly for the correct function of the EVM is important. Table 3-1 lists all the terminal blocks on the EVM and
Table 3-2 lists the jumpers and their functionality. All the terminal blocks are marked with polarity and Pin 1 of
test points / jumpers are marked with white dot for identification purpose. To understand more about the jumper
functionality, see the schematic diagrams in Section 6.1.
Table 3-1. Terminal Blocks
Terminal Block Number Terminal Block Name Description
J1 VIN 3.3V 3.3 V External Input Voltage
J20 VIO_LDO Terminal block for VIO_LDO
Output
J21 BOOST Terminal block for BOOST Output
J27 BUCK3 Terminal block for BUCK3 Output
J29 BUCK1 Terminal block for BUCK1 Output
J31 BUCK2 Terminal block for BUCK2 Output
J33 J33 USB Connector
J35 VBAT 5 V - 20 V Input
Table 3-2. Configuration Jumpers
Jumper/Connector Number Jumper/Connector Name Configuration Description
J3 VIO_SEL
Pins 1 and 2 3.3 V supply generated from USB
supply
Pins 2 and 3 (Default) 3.3 V VIO supply generated from
PMIC VIO_LDO
J4 SDI_SPI
Pins 1 and 2 (Default) Connects PMIC SDI_SPI signal
to MCU SDO_SPI port directly
Pins 2 and 3
Connects PMIC SDI_SPI signal
to MCU SDO_SPI port through a
level shifter (series resistors need
to be mounted if this option is
used)
J5 EN_PVIN_3V3
Closed (Default)
Connects PMIC ENABLE pin
to PVIN_Bx pins (PVIN_3V3)
through a pull up resistor and
device gets enabled as soon as
3.3 V is generated/applied
Open
If PMIC needs to be enabled
through USB/GUI or through pre-
regulator PGOOD signal, then
this jumper must be kept open
J6 SCLK_SPI
Pins 1 and 2 (Default) Connects PMIC SCLK_SPI signal
to MCU SCLK_SPI port directly
Pins 2 and 3
Connects PMIC SCLK_SPI signal
to MCU SCLK_SPI port through a
level shifter (series resistors need
to be mounted if this option is
used)
J7 SDO_SPI
Pins 1 and 2 (Default) Connects PMIC SDO_SPI signal
to MCU SDI_SPI port directly
Pins 2 and 3
Connects PMIC SDO_SPI signal
to MCU SDI_SPI port through a
level shifter (series resistors need
to be mounted if this option is
used)
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Table 3-2. Configuration Jumpers (continued)
Jumper/Connector Number Jumper/Connector Name Configuration Description
J8 EN_LVPMIC
Option 1: Open (Default) PMIC Enable signal from 3.3 V
Input. J5 must be closed
Option 2: Pins 1 and 2 PMIC Enable signal path from
GUI interface. J5 must be open if
this Option is used
Option 3: Pins 2 and 3
PMIC Enable signal path from
pre-regulator PGOOD signal. J5
must be open if this Option is
used
J9 PVIN_3V3
Option 1: Pins 1/3 and 2/4
3V3_PREREG (Default)
PVIN_3V3 connected to pre-
regulator output. J9-Option-2
must be open and J11 must be
open
Option 2: Pins 5/7 and 6/8 3V3_PS
PVIN_3V3 connected to external
3.3V supply (J1). J9-Option-1
must be open and J11 must be
open
J10 SYNCCLKIN Pins 1 and 2 (Default)
SYNCCLKIN pin connected to
MCU clock port (used for testing
external clock input signal)
J11 3V3_USB
Open (Default)
Closed
PMIC input supply (PVIN_3V3)
is generated from USB supply.
J9 jumpers must be open if this
jumper is closed
J13 CS_SPI_WD
Pins 1 and 2 (Default) Connects PMIC CS_SPI signal to
MCU CS_SPI port directly
Pins 2 and 3
Connects PMIC CS_SPI signal to
MCU CS_SPI port through a level
shifter (series resistors must be
mounted if this option is used)
J14 WD_DIS
Closed (Default)
Pull down resistor in CS_SPI pin
enabled which will disable Q&A
watchdog during the PMIC power
up. For this to be effective, USB
cable should not be connected
to the EVM when the PMIC
is powered up. If USB cable
is connected before PMIC is
powered up, USB MCU will drive
this pin high (through J13) during
the startup
Open
Q&A watchdog disable function
not active during the PMIC power
up
J15 VMON1_GPO1
Pins 1 and 2 (Default: open) Connects PMIC VMON1 signal to
MCU port directly
Pins 2 and 3 (Default: open)
Connects PMIC VMON1 signal
to MCU port through level shifter
(series resistors must be mounted
if this option is used)
J16 nINT
Pins 1 and 2 (Default) Connects PMIC nINT signal to
MCU port directly
Pins 2 and 3
Connects PMIC nINT signal to
MCU port through level shifter
(series resistors must be mounted
if this option is used)
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Table 3-2. Configuration Jumpers (continued)
Jumper/Connector Number Jumper/Connector Name Configuration Description
J17 VMON1_SEL
Pins 1 and 2 (Default: open)
VMON1 reference voltage
generated from voltage divider on
VIO supply
Pins 2 and 3 (Default: open) VMON1 voltage taken from
BUCK1 (1.0 V) output
J18 nERR_GPO2
Pins 1 and 2 (Default) Connects PMIC nERR_GPO
signal to MCU port directly
Pins 2 and 3
Connects PMIC nERR_GPO2
signal to MCU port through level
shifter (series resistors must be
mounted if this option is used)
J19 nRSTOUT
Pins 1 and 2 (Default) Connects PMIC nRSTOUT signal
to MCU port directly
Pins 2 and 3
Connects PMIC nRSTOUT signal
to MCU port through level shifter
(series resistors must be mounted
if this option is used)
3.1 Test Points
Table 3-3 lists all the available connectors on the EVM.
Table 3-3. Test Points on the EVM
Connector Number Connector Name Description
J2 USB_5V_S Test point to measure 5 V supply from USB
cable
J12 VOUT_VLDO Test point to measure VOUT_VLDO output
J22 Load Module Connector
Connector placeholder for
PMICLOADBOARDEVM for doing load
transient testing
J23 Load Module Connector
Connector placeholder for
PMICLOADBOARDEVM for doing load
transient testing
J24 FB_B1 Test point to measure the BUCK1 feedback
signal
J25 FB_B2 Test point to measure the BUCK2 feedback
signal
J26 FB_B3 Test point to measure the BUCK3 feedback
signal
J28 J28 SMA connector for BUCK3 noise
measurement
J30 J30 SMA connector for BUCK2 noise
measurement
J32 J32 SMA connector for BUCK1 noise
measurement
J36 VBAT_PIN_S Test point to measure the VBAT input supply
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4 Getting Started
In its default configuration, connecting +12 V and GND to the VBAT terminal block (J35) will power up the EVM.
While loading the regulators, ensure that input power supply has sufficient current source capabilities to avoid
supply voltage collapse due to current limiting.
EVM can also be powered through external 3.3 V input supply or through USB power by modifying jumper
settings on the EVM. Table 4-1 describes the jumper settings for different supply options.
Table 4-1. Jumper Connections for Powering the EVM
Power Source Input Voltage Range Jumpers
VBAT 5 V - 20 V Both 3V3_PREREG jumpers in J9 (Default option)
Vin 3.3V 3.1 V - 3.5 V Remove 3V3_PREREG jumpers on J9 and place
them on 3V3_PS position on J9. With this
configuration, do not apply power to VBAT terminal
USB 5 V USB cable J11, 3V3_USB. With this option, jumpers on J9 must
be removed.
The LP877451Q1EVM does not require any specific power-down sequence. The EVM can be powered down
by turning off the power supply or by toggling the EN Pin off in the GUI, if the GUI control signal is used to
enable/disable the device. Refer to Table 3-2 and GUI section for more information about configuring jumpers
and using GUI.
4.1 GUI
Texas Instruments provides a simple to use LP87745-Q1 GUI tool to enable, configure, and evaluate the various
features of the LP87745-Q1 device on the EVM. Please refer to the GUI README.md file in the GUI tool's
Help->View README.md tab for a more detailed description of this tool.
The GUI will run on most PC platforms and requires a USB port for connecting the EVM to the host computer.
The EVM USB connector is type-C and a type-A to type-C cable is provided along with the EVM to connect
to the host computer. EVM will get automatically connected to the GUI after the USB cable is connected and
manual assignment of COM port is not necessary. If Hardware not Connected displays on the bottom left of
the GUI, clicking Click to connect to hardware icon next to it will re-establish the connection. The GUI uses the
ACCtrl COM port which can be found from the device manager of the operating system.
4.2 GUI Installation and working with GUI
The GUI can be found here and it can be run in browser or it can be installed to the computer. Please refer to the
README.md file in the GUI tool for a complete guide on how to use the tool.
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Figure 4-1. GUI Front Page
The EVM can be configured in the configuration page shown in Figure 4-2. By default, all the configuration
registers are locked and CRC protected. Clicking the Unlock registers check box on the Configuration Page will
automatically write REGISTER_LOCK_STATUS =0x9B to unlock the configuration registers for write operation.
CRC can be disabled by writing CONFIG_CRC_EN = 0h through Console window (Options → Show Console) or
GUI Register Map Page. For example, output voltages, startup and shutdown delays and peak current limits can
be changed for each buck converter.
Figure 4-2. GUI Configuration Page
In the register map page shown in Figure 4-3, registers can be read or written to.
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Figure 4-3. GUI Register Map Page
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5 Watchdog
This section provides the basic overview of the SPI based Q&A watchdog algorithm implemented on the EVM.
Please refer LP87745-Q1 device data sheet for more detailed information about device watchdog functionality.
This watchdog requires specific SPI messages from the host MCU in specific time intervals to detect correct
operation of the MCU. On the EVM, MSP432 MCU is used as a host MCU.
During operation, the device provides a 4-bit question for the MCU and the MCU calculates the required 32-bit
answer. This answer is split into four answer bytes: Answer-3, Answer-2, Answer-1 and Answer-0. The MCU
writes these answer bytes one byte at a time into WD_ANSWER[7:0] from the SPI interface.
A good event occurs when the MCU sends the correct answer-bytes calculated for the current question in the
correct watchdog window and in the correct sequence. This sequence is visualized in Figure 5-1
A bad event occurs when one of the events that follows occur:
• The MCU sends the correct answer-bytes, but not in the correct watchdog window.
• The MCU sends incorrect answer-bytes.
• The MCU returns correct answer-bytes, but in the incorrect sequence.
Window-2Window-1
Three correct answer-bytes must be provided in Window-1 and
in the correct order:
x Answer-3
x Answer-2
x Answer-1
After the Window-1 time elapses, Window 2 begins.
The MCU needs to write the answer-bytes to the WD_ANSWER[7:0] bits.
The fourth answer-byte, Answer-0, must be provided
in Window-2.
After the MCU writes the fourth Answer-0 to
WD_ANSWER[7:0], the Watchdog generates the
next question within 1 Internal System Clock Cycle,
after which the next Watchdog Sequence
(Q&A [n + 1]) begins
Write to
WD_ANSWER[7:0]
-> Answer-3
MCU provides answer(2)
Answer
Read bits WD_
QUESTION[3:0]
MCU reads question (1)
I2C2 / SPI
Commands
NCS Pin (for
SPI only)
1 Internal System Clock Cycle
to Generate a new question for the next watchdog
sequence Q&A [n + 1]
Q&A [n] Q&A [n + 1]
Question
Watchdog Sequence
Write to
WD_ANSWER[7:0]
-> Answer-1
Write to
WD_ANSWER[7:0]
-> Answer-0
t = tWINDOW-1 t = tWINDOW-2
Write to
WD_ANSWER[7:0]
-> Answer-2
Figure 5-1. Watchdog Sequence in Q&A Mode
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6 Schematics, Layout and BOM
This section contains the schematics, layout and the bill of materials for the LP87745Q1EVM.
6.1 Schematic Diagram
This section includes images of the EVM schematics and different layers of the layout.
Figure 6-1. PMIC Schematic
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Figure 6-2. Preregulator Schematic
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Figure 6-3. MCU Schematic
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6.2 PCB Layer Diagram
Figure 6-4. Layout of Top Layer, Layer 1 Figure 6-5. Layout of Ground layer 1, Layer 2
Figure 6-6. Layout of Signal Layer 1, Layer 3 Figure 6-7. Layout of Signal Layer 2, Layer 4
Figure 6-8. Layout of Ground Layer 2, Layer 5 Figure 6-9. Layout of Bottom Layer, Layer 6
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6.3 Part List
Table 6-1 lists all the components on the EVM.
Table 6-1. Parts List
Designator Quantity Description Part Number Manufacturer
!PCB1 1 Printed Circuit Board BMC083 Any
C1, C8, C68, C69,
C75, C76, C77, C78,
C80, C83
10 CAP, CERM, 2.2 uF, 6.3 V, +/-
10%, X7R, AEC-Q200 Grade 1,
0603
GCM188R70J225KE22D MuRata
C2, C55, C56, C57,
C73, C74, C79, C81,
C82, C90, C91
11 CAP, CERM, 0.1 uF, 16 V, +/-
10%, X7R, 0402
GCM155R71C104KA55D MuRata
C3 1 CAP, Polymer Hybrid, 100 uF, 25
V, +/- 20%, 30 ohm, 6.3x7.7 SMD
EEHZC1E101XP Panasonic
C4, C5 2 CAP, CERM, 22 uF, 10 V, +/-
10%, X7R, AEC-Q200 Grade 1,
1206
GCM31CR71A226KE02L MuRata
C6, C7, C9, C24, C32,
C36, C67
7 CAP, CERM, 10 uF, 10 V, +/-
10%, X7R, 0805
GCM21BR71A106KE22L MuRata
C10, C11, C12, C20,
C25, C26, C27, C28,
C84, C86, C88
11 Cap Ceramic Multilayer 4.7uF
6.3V DC 10% SMD Paper T/R
GCJ188C70J475KE02J Murata
C13, C15 2 CAP, CERM, 2.2 µF, 6.3 V,+/-
10%, X7R, 0603
GCM188R70J225KE22J MuRata
C14, C16, C58, C59,
C60
5 3 Terminals Low ESL Chip
Multilayer Ceramic Capacitors for
Automotive
NFM18HC105C1C3D Murata
C17, C18, C19 3 CAP, CERM, 330 pF, 50 V, +/-
10%, X7R, 0402
GRM155R71H331KA01D MuRata
C21, C22, C23 3 CAP, CERM, 0.22 µF, 16 V,+/-
10%, X7R, AEC-Q200 Grade 1,
0402
GCM155R71C224KE02D MuRata
C29, C30, C31, C43,
C44, C45, C46, C47,
C48, C64, C65, C66,
C85, C87, C89
15 Chip Multilayer Ceramic
Capacitors for Automotive
GCM188D70J106ME36D Murata
C33, C34, C35, C37,
C38, C39, C40, C41,
C42
9 CAP, CERM, 22 µF, 6.3 V,+/-
20%, X7T, AEC-Q200 Grade 1,
0805
CGA4J1X7T0J226M TDK
C49, C50, C51, C104,
C106
5 CAP CER 0603 1UF 10V X7R
10%
C0603C105K8RACAUTO KEMET
C52, C53, C54 3 CAP, CERM, 0.22 uF, 16 V, +/-
10%, X7R, 0402
GRM155R71C224KA12D MuRata
C70 1 CAP, CERM, 3300 pF, 50 V, +/-
10%, X7R, 0603
C0603C332K5RACTU Kemet
C71, C72 2 CAP, CERM, 12 pF, 50 V,+/- 5%,
C0G/NP0, AEC-Q200 Grade 1,
0402
CGA2B2C0G1H120J050BA TDK
C92, C98, C99 3 CAP, CERM, 0.47 uF, 50 V, +/-
10%, X7R, AEC-Q200 Grade 1,
0603
CGA3E3X7R1H474K080AE TDK
C93, C94, C96, C97 4 CAP, CERM, 2.2 uF, 50 V, +/-
10%, X7R, AEC-Q200 Grade 1,
0805
CGA4J3X7R1H225K125AB TDK
C95 1 CAP, Polymer Hybrid, 68 uF, 35
V, +/- 20%, 35 ohm, 6.3x7.7 SMD
EEHZC1V680XP Panasonic
C100 1 CAP, CERM, 1 uF, 50 V, +/- 10%,
X7R, 0603
UMK107AB7105KA-T Taiyo Yuden
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Table 6-1. Parts List (continued)
Designator Quantity Description Part Number Manufacturer
C102, C109 2 CAP, CERM, 4.7 µF, 50 V,+/-
20%, X7R, AEC-Q200 Grade 1,
1210
UMK325B7475MMHT Taiyo Yuden
C103, C105 2 CAP, CERM, 0.022 uF, 50 V, +/-
10%, X7R, 0402
GRM155R71H223KA12D MuRata
C107 1 CAP, CERM, 0.1 uF, 10 V, +/-
10%, X7R, 0603
C0603X104K8RACTU Kemet
C108 1 C0603 22 pF X7R 30ppm/°C
10.00% 50 V
C0603C220K5RACAUTO KEMET
C110 1 CAP, CERM, 1 uF, 25 V, +/- 10%,
X7R, 0805
C0805C105K3RACTU Kemet
C111, C112, C113,
C114
4 CAP, CERM, 22 uF, 16 V, +/-
20%, X7R, AEC-Q200 Grade 1,
1210
CGA6P1X7R1C226M250AC TDK
D1, D2, D3, D4, D5 5 LED, Blue, SMD LB Q39G-L2N2-35-1 OSRAM
D6 1 Diode, Schottky, 60 V, 3 A, AEC-
Q101, SOD-123HE
FSV360FP Fairchild
Semiconductor
H1, H4, H5, H7 4 FC2058-440-A Fascomp
H2, H3, H6, H8 4 MACHINE SCREW PAN
PHILLIPS 4-40
9900 Keystone
J1, J20, J21, J27, J29,
J31, J35
7 Terminal Block, 5mm, 2x1, R/A,
TH
1792863 Phoenix Contact
J2, J5, J11, J12, J14,
J36
6 Header, 100mil, 2x1, Gold, TH HTSW-102-07-G-S Samtec
J3, J4, J6, J7, J8, J10,
J13, J15, J16, J17,
J18, J19, J24, J25, J26
15 Header, 100mil, 3x1, Gold, TH HTSW-103-07-G-S Samtec
J9 1 Header, 2.54mm, 4x2, Gold, TH TSW-104-08-L-D Samtec
J28, J30, J32 3 SMA Jack, Straight, 50 Ohm,
Gold, TH
SMA-J-P-H-ST-TH1 Samtec
J33 1 Receptacle, 0.5mm, USB TYPE
C, R/A, SMT
12401610E4#2A Amphenol Canada
J34 1 Header (Shrouded), 1.27mm,
5x2, Gold, SMT
FTSH-105-01-F-DV-K Samtec
L1, L2, L4 3 240nH Shielded Thin Film
Inductor 5A 23mOhm Max 0806
(2016 Metric)
TFM201610ALMAR24MTAA TDK
L3 1 Inductor, Shielded, Metal
Composite, 1.5 µH, 2.3 A, 0.11
ohm, AEC-Q200 Grade 0, SMD
TFM201610ALMA1R5MTAA TDK
L5, L6, L7 3 Ferrite Bead, 30 ohm @ 100
MHz, 6 A, 0805
MPZ2012S300AT000 TDK
L8, L9, L10 3 Inductor, Shielded, Metal
Composite, 470 nH, 3.9 A, 0.039
ohm, AEC-Q200 Grade 0, SMD
TFM201610ALMAR47MTAA TDK
L11 1 Inductor, Shielded, Composite,
4.7 uH, 4.5 A, 0.0401 ohm, SMD
XAL4030-472MEB Coilcraft
L12 1 Inductor, Shielded, Metal
Composite, 1.5 µH, 5.8 A, 0.019
ohm, SMD
74438356015 Wurth Elektronik
LBL1 1 THT-14-423-10 Brady
R1, R24, R38 3 RES, 20.0 k, 1%, 0.1 W, AEC-
Q200 Grade 0, 0603
CRCW060320K0FKEA Vishay-Dale
R2, R7, R77, R81, R86 5 RES, 100 k, 1%, 0.1 W, 0603 RC0603FR-07100KL Yageo
R4 1 RES, 0, 0%, 0.2 W, AEC-Q200
Grade 0, 0402
CRCW04020000Z0EDHP Vishay-Dale
Schematics, Layout and BOM www.ti.com
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Table 6-1. Parts List (continued)
Designator Quantity Description Part Number Manufacturer
R5, R9, R10, R11,
R13, R17, R30, R31,
R32, R33
10 RES, 0, 5%, 0.063 W, AEC-Q200
Grade 0, 0402
CRCW04020000Z0ED Vishay-Dale
R14 1 RES, 8.25 k, 1%, 0.1 W, AEC-
Q200 Grade 0, 0603
CRCW06038K25FKEA Vishay-Dale
R15, R18, R19, R21,
R22, R48, R55
7 RES, 1.2 k, 5%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW04021K20JNED Vishay-Dale
R25, R28, R29, R47,
R57, R69, R70, R71,
R72, R73, R74, R75,
R76
13 RES, 10 k, 5%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW040210K0JNED Vishay-Dale
R35, R36, R37, R52 4 RES, 0, 5%, 0.1 W, AEC-Q200
Grade 0, 0402
ERJ-2GE0R00X Panasonic
R40, R41, R42 3 RES 0 OHM JUMPER 1/4W
0603
HCJ0603ZT0R00 Stackpole
Electronics
R43, R44, R45 3 RES, 49.9, 1%, 0.063 W, AEC-
Q200 Grade 0, 0402
RMCF0402FT49R9 Stackpole
Electronics Inc
R46, R49, R56 3 RES, 4.87 k, 1%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW04024K87FKED Vishay-Dale
R50 1 RES, 100, 5%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW0402100RJNED Vishay-Dale
R51, R53, R59 3 RES, 1.0 M, 5%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW04021M00JNED Vishay-Dale
R58 1 RES, 383 k, 1%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW0402383KFKED Vishay-Dale
R60 1 RES, 200 k, 5%, 0.063 W, AEC-
Q200 Grade 0, 0402
CRCW0402200KJNED Vishay-Dale
R78 1 RES, 255 k, 1%, 0.1 W, 0603 RC0603FR-07255KL Yageo
R79 1 RES, 0.51, 1%, 0.25 W, 0805 CRM0805-FX-R510ELF Bourns
R82 1 RES, 1.00 k, 1%, 0.1 W, 0603 RC0603FR-071KL Yageo
R84 1 RES, 43.2 k, 1%, 0.1 W, AEC-
Q200 Grade 0, 0603
CRCW060343K2FKEA Vishay-Dale
R85 1 RES, 100, 5%, 0.1 W, AEC-Q200
Grade 0, 0603
CRCW0603100RJNEA Vishay-Dale
R87 1 RES, 1.00 k, 1%, 0.1 W, 0603 ERJ-3EKF1001V Panasonic
R88 1 RES, 100, 1%, 0.1 W, 0603 RC0603FR-07100RL Yageo
SH-J1, SH-J2, SH-J3,
SH-J4, SH-J5, SH-J6,
SH-J7, SH-J8, SH-J9,
SH-J10, SH-J11, SH-
J12, SH-J13, SH-J14,
SH-J15
15 Shunt, 100mil, Gold plated, Black 881545-2 TE Connectivity
TP1, TP2, TP3, TP4,
TP5, TP6, TP7, TP8,
TP9, TP10, TP11,
TP12, TP13, TP14,
TP15, TP16
16 Test Point, Compact, SMT 5016 Keystone
U1 1 Three Buck Converters and 5-V
Boost for AWR and IWR Radar
Sensors
LP877451A1RXVRQ1 Texas Instruments
U2 1 Linear Voltage Regulator IC 1
Output 500mA 6-WSON (2x2)
TPS74533PQWDRVRQ1 Texas Instruments
U3 1 AEC-Q100 Quad Comparator,
PW0014A (TSSOP-14)
LM2901AVQPWRQ1 Texas Instruments
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Table 6-1. Parts List (continued)
Designator Quantity Description Part Number Manufacturer
U4 1 Automotive Catalog, Dual,
200mA, Low-IQ Low-Dropout
Regulator for Portable Devices,
DSE0006A (WSON-6)
TLV7103318QDSERQ1 Texas Instruments
U5 1 MSP432E401YTPDT, PDT0128A
(TQFP-128)
MSP432E401YTPDTR Texas Instruments
U6 1 4-Channel USB ESD Solution
with Power Clamp, DRY0006A
(USON-6)
TPD4S012DRYR Texas Instruments
U7 1 Low-Capacitance 6-Channel
+/-15 kV ESD Protection Array
for High-Speed Data Interfaces,
RSE0008A (UQFN-8)
TPD6E004RSER Texas Instruments
U8 1 8-BIT BIDIRECTIONAL LOW-
VOLTAGE TRANSLATOR,
PW0020A (TSSOP-20)
SN74GTL2003PWR Texas Instruments
U9 1 Automotive 4 A Low Noise
Synchronous Buck Regulators,
RJR0014A (VQFN-HR-14)
LM62440APPQRJRRQ1 Texas Instruments
Y1 1 Crystal, 25 MHz, 8pF, SMD CX3225CA25000D0HSSCC Kyocera
C61, C62, C63 0 Chip Multilayer Ceramic
Capacitors for Automotive
GCM188D70J106ME36D Murata
C101 0 CAP, CERM, 1000 pF, 50 V, +/-
10%, X7R, 0603
C0603C102K5RACTU Kemet
J22, J23 0 Receptacle, 2.5mm, 3x2, Gold,
SMT
6651712-1 TE Connectivity
R3, R8 0 RES, 20.0 k, 1%, 0.1 W, AEC-
Q200 Grade 0, 0603
CRCW060320K0FKEA Vishay-Dale
R6, R12, R20, R61,
R62, R63, R64, R65,
R66, R67, R68
0 RES, 0, 5%, 0.063 W, AEC-Q200
Grade 0, 0402
CRCW04020000Z0ED Vishay-Dale
R16, R27, R39 0 RES, 100 k, 1%, 0.1 W, 0603 RC0603FR-07100KL Yageo
R23, R26, R34 0 RES, 3.9, 5%, 0.1 W, AEC-Q200
Grade 0, 0603
CRCW06033R90JNEA Vishay-Dale
R54 0 RES, 0, 5%, 0.1 W, AEC-Q200
Grade 0, 0402
ERJ-2GE0R00X Panasonic
R80, R83 0 RES, 1.00 k, 1%, 0.1 W, 0603 RC0603FR-071KL Yageo
Schematics, Layout and BOM www.ti.com
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STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

www.ti.com
2
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.