Texas Instruments MSP432E411Y-BGAEVM User manual

1
SLAU780–August 2018
Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
User's Guide
SLAU780–August 2018
MSP432E411Y-BGAEVM User's Guide
This guide provides an overview on how to get started quickly with the MSP432E411Y-BGAEVM,
including power, header pinouts and connections, communication interfaces, and programming interfaces.
Contents
1 Board Overview.............................................................................................................. 2
2 Power the MSP432E411Y-BGAEVM ..................................................................................... 3
2.1 Emulator Power..................................................................................................... 3
2.2 External 3.3-V Source Only ....................................................................................... 3
2.3 External 5-V Source Only.......................................................................................... 3
2.4 External 3.3-V and 5-V Source ................................................................................... 4
2.5 Measure Current Consumption ................................................................................... 4
3 Header Pinouts and Connections ......................................................................................... 5
3.1 J11 – External Power Connector ................................................................................. 5
3.2 J6 – Power Rail Header............................................................................................ 5
3.3 J7 – External Peripheral Interface Header ...................................................................... 6
3.4 LCD Interface Header.............................................................................................. 7
3.5 J1, J2, J3, J4 – BoosterPack Interface Headers ............................................................... 9
3.6 J5 – Additional GPIO Pin Header............................................................................... 10
4 Communication Interfaces ................................................................................................ 11
4.1 Ethernet............................................................................................................. 11
4.2 USB-OTG .......................................................................................................... 11
5 Programming Interfaces................................................................................................... 12
5.1 JTAG................................................................................................................ 12
5.2 ETM Trace ......................................................................................................... 12
5.3 BSL.................................................................................................................. 13
6 Software Development .................................................................................................... 14
6.1 Software Description.............................................................................................. 14
6.2 Source Code....................................................................................................... 14
6.3 Tool Options ....................................................................................................... 14
7 Schematics.................................................................................................................. 15
Trademarks
SimpleLink, BoosterPack, Code Composer Studio are trademarks of Texas Instruments.
Arm, Cortex, Keil are registered trademarks of Arm Limited.
IAR Embedded Workbench is a registered trademark of IAR Systems.
All other trademarks are the property of their respective owners.

Board Overview www.ti.com
2SLAU780–August 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
1 Board Overview
The SimpleLink™ Ethernet MSP432E411Y microcontroller EVM is an evaluation platform for SimpleLink
Arm®Cortex®-M4F-based Ethernet microcontrollers. The MSP432E411Y-BGAEVM demonstrates the
MSP432E411Y microcontroller with its on-chip 10/100 Ethernet MAC and PHY, USB 2.0, LCD controller,
External Peripheral Interface (EPI), hibernation module, motion control pulse-width modulation, and a
multitude of simultaneous serial connectivity. The MSP432E411Y-BGAEVM also features a fully compliant
40-pin BoosterPack™ plug-in module header, a user switch, two user LEDs, and dedicated reset and
wake switches.
The preprogrammed quick start application on the EVM is an application that performs a self-test on the
onboard SDRAM by writing and reading back values in memory using the MSP432E411Y EPI. The self-
test blinks an LED to indicate that the test passes. Figure 1 shows the MSP432E411Y-BGAEVM with key
features highlighted.
Figure 1. SimpleLink Ethernet MSP432E411Y Evaluation Module

www.ti.com Power the MSP432E411Y-BGAEVM
3
SLAU780–August 2018
Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
2 Power the MSP432E411Y-BGAEVM
The MSP432E411Y-BGAEVM requires a 3.3-V power supply, which can be provided in any of several
ways:
• Provide 3.3 V from an external emulator through the 20-pin Arm JTAG interface
• Provide 3.3 V directly to the 3.3V pin on the external power header (J11)
• Provide 5 V to the 5V pin on the external power header (J11) and using the onboard LDO to generate
3.3 V
• Provide 3.3 V and 5 V both to the external power header (J11)
2.1 Emulator Power
To use an external emulator as a power source, use an emulator that supplies 3.3 V to pin 1 on the Arm
20-pin JTAG interface. When 3.3 V is supplied to the board from the emulator, disconnect the output of
the onboard 3.3-V LDO (U5) from the 3.3-V power rail by removing the jumper on JP8. Figure 2 shows the
location of JP8.
Figure 2. Power Selection
If USB host functionality is required from the onboard USB OTG connector, provide 5 V to the board
through the external power header (J11) or the BoosterPack header (J3).
2.2 External 3.3-V Source Only
To use an external 3.3-V source to power the EVM, connect the 3.3-V and GND lines of the supply to the
3.3V and GND pins of the external power header (J11). Disconnect the onboard 3.3-V LDO (U5) from the
3.3-V power rail by removing the jumper on JP8 to prevent back-powering the LDO. Figure 2 shows the
location of JP8. If USB host functionality is required from the onboard USB-OTG connector, also provide
5 V to the board. Use the external 3.3-V and 5-V power option in Section 2.4.
2.3 External 5-V Source Only
To use an external 5-V source to power the EVM, connect the 5-V and GND lines of the supply to the 5V
and GND pins of the external power header (J11) or to the 5V pin on the BoosterPack header (J3).
Connect the onboard 3.3-V LDO (U5) to the 3.3-V power rail by populating the jumper on JP8 to connect
the output of the LDO to the 3.3-V power rail. Figure 2 shows the location for JP8.

Power the MSP432E411Y-BGAEVM www.ti.com
4SLAU780–August 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
2.4 External 3.3-V and 5-V Source
To use external 3.3-V and 5-V supplies to power the EVM, connect the 3.3-V, 5-V, and GND pins of the
supply to the 3.3V, 5V, and GND pins of the external power header (J11) or the BoosterPack headers (J1
for 3.3V and J3 for 5V). Disconnect the onboard 3.3-V LDO (U5) from the 3.3-V power rail by removing
the jumper on JP8 to prevent back-powering the LDO. Figure 2 shows the location for JP8.
2.5 Measure Current Consumption
To measure current consumption, remove the JP1, JP2, or JP3 jumpers and place an ammeter across the
header pins. Connect this jumper when not performing current measurements. Figure 3 shows the location
of JP1, JP2, and JP3. Table 1 lists which power rail to measure on each jumper.
Figure 3. Current Measurement Headers
Table 1. Power Measurement Jumpers
Jumper Power Rail Measured
JP1 Combined VDD and VDDA
JP2 VDD
JP3 VDDA

www.ti.com Header Pinouts and Connections
5
SLAU780–August 2018
Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
3 Header Pinouts and Connections
3.1 J11 – External Power Connector
Header J11 contains connections for 3.3 V, 5 V, and GND signals and is intended to be used to connect
external power supplies to the MSP432E411Y-BGAEVM. Figure 2 shows header J11, and Table 2 lists
the pinout.
Table 2. External Power Connector J11 Pinout
J11 Pin Signal
1 3.3V
2 GND
3 GND
4 5V
3.2 J6 – Power Rail Header
Header J6 contains connections for all the power rails and reference voltages used by the MSP432E411Y
device. Figure 4 shows header J6 and Table 3 lists the pinout.
Figure 4. External Power Connector J6
Table 3. External Power Connector J6 Pinout
J6 Pin Signal Description
1 VREFA+ Reference voltage for ADC positive input
2 VREFA- Reference voltage for ADC negative input
3 VBAT Power source for hibernation module
4 VDD Positive supply for I/O
5 VSS Negative supply for I/O
6 VDDA Positive supply for analog circuits
7 AVSS Negative supply for analog circuits

Header Pinouts and Connections www.ti.com
6SLAU780–August 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
3.3 J7 – External Peripheral Interface Header
Header J7 contains all the signals for the MSP432E411Y’s External Peripheral Interface (EPI). The EPI
can be connected to an onboard IS42S16320F-7TL – 512 megabit SDRAM, U2, buy shorting all the
header pins on J7 horizontally, as shown in Figure 5. Alternatively, the EPI pins can be used to connect to
an external device by removing the headers on J7, and connecting to the outside pins of J7, as shown in
Figure 6.
Figure 5. Header J7 With All Jumpers to Connect Onboard SDRAM
Figure 6. Header J7 With Jumpers Removed to Connect External Device to EPI

www.ti.com Header Pinouts and Connections
7
SLAU780–August 2018
Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
Table 4 lists the pinout of J7.
(1) NC = no connection
Table 4. Header J7 Pinout
MSP432E411Y Signal J7 Pin J7 Pin SDRAM Signal
EP0S35 1 2 NC(1)
EP0S34 3 4 NC
EP0S33 5 6 NC
EP0S32 7 8 NC
EP0S31 9 10 CLK
EP0S30 11 12 CKE
EP0S29 13 14 CS
EP0S28 15 16 WE
EP0S27 17 18 NC
EP0S26 19 20 NC
EP0S25 21 22 NC
EP0S24 23 24 NC
EP0S23 25 26 NC
EP0S22 27 28 NC
EP0S21 29 30 NC
EP0S20 31 32 NC
EP0S19 33 34 RAS
EP0S18 35 36 CAS
EP0S17 37 38 DQMH
EP0S16 39 40 DQML
EP0S15 41 42 DQ15
EP0S14 43 44 BA1, DQ14
EP0S13 45 46 BA0, DQ13
EP0S12 47 48 A12, DQ12
EP0S11 49 50 A11, DQ11
EP0S10 51 52 A10, DQ10
EP0S09 53 54 A9, DQ9
EP0S08 55 56 A8, DQ8
EP0S07 57 58 A7, DQ7
EP0S06 59 60 A6, DQ6
EP0S05 61 62 A5, DQ5
EP0S04 63 64 A4, DQ4
EP0S03 65 66 A3, DQ3
EP0S02 67 68 A2, DQ2
EP0S01 69 70 A1, DQ1
EP0S00 71 72 A0, DQ0
3.4 LCD Interface Header
Header J9 contains all of the signals for the internal LCD controller in the MSP432E411Y to interface with
an external LCD panel, including four additional GPIO pins. The four additional GPIO pins can be used as
analog inputs to interface with a resistive touch screen. Alternatively, two of the pins (PE6 and PE7) can
be configured as I2C pins to interface with controllers that require an I2C interface. Figure 7 shows the
location of J9, and Table 5 lists the pinout of J9.

Header Pinouts and Connections www.ti.com
8SLAU780–August 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
Figure 7. Header J9
(1) n/a = not applicable
Table 5. Header J9 Pinout
GPIO Pin Function J9 Pin J9 Pin Function GPIO Pin
GND GND 40 39 GND GND
PE7 AIN21/I2C9SDA 38 37 AIN20/I2C9SCL PE6
PP6 AIN23 36 35 AIN22 PP7
n/a(1) 5 V 34 33 3.3 V VDD
PS3 LCDDATA23 32 31 GPIO PB4
PS1 LCDDATA21 30 29 LCDDATA20 PS0
PT3 LCDDATA19 28 27 LCDDATA18 PT2
PJ5 LCDDATA17 26 25 LCDDATA16 PJ4
PJ3 LCDDATA15 24 23 LCDDATA14 PJ2
PN6 LCDDATA13 22 21 LCDDATA12 PN7
PT1 LCDDATA11 20 19 LCDDATA10 PT0
PS7 LCDDATA09 18 17 LCDDATA08 PS6
PS5 LCDDATA07 16 15 LCDDATA06 PS4
PR7 LCDDATA05 14 13 LCDDATA04 PR6
PR3 LCDDATA03 12 11 LCDDATA02 PF7
PR5 LCDDATA01 10 9 LCDDATA00 PR4
PJ6 LCDAC 8 7 GND GND
PR2 LCDLP 6 5 LCDCP PR0
PF6 LCDMCLK 4 3 LCDFP PR1
n/a 5 V 2 1 3.3 V VDD
NOTE: On MSP432E411Y-BGAEVM Rev A boards, LCDDATA22 is not available on the J9 header.
If a connection for LCDDATA22 is required, make the connection to J5 pin 19
(MSP432E411Y pin PS2).

www.ti.com Header Pinouts and Connections
9
SLAU780–August 2018
Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
3.5 J1, J2, J3, J4 – BoosterPack Interface Headers
Headers J1, J2, J3, and J4 are aligned correctly and follow the pinout requirements to comply with the
BoosterPack plug-in module pinout standard, as shown on www.ti.com/byob.Figure 8 shows the pinouts
for the J1, J2, J3, and J4 headers.
Figure 8. BoosterPack Plug-in Module Header Pinout

Header Pinouts and Connections www.ti.com
10 SLAU780–August 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
MSP432E411Y-BGAEVM User's Guide
3.6 J5 – Additional GPIO Pin Header
Header J5 contains additional GPIO pins that are available for use. Figure 9 shows the location for J5,
and Table 6 lists the pinout.
Figure 9. Header J5 Location
Table 6. Header J5 Pinout
MSP432E411Y Pin J5 Pin J5 Pin MSP432E411Y Pin
VDD (3.3 V) 40 39 GND
PD6 38 37 PG6
PQ5 36 35 PM5
PG2 34 33 PA1
PA0 32 31 PF3
PF4 30 29 PF2
PF0 28 27 PF1
PC0 26 25 PQ7
PG7 24 23 PQ6
PN2 22 21 PN1
PQ4 20 19 PS2
PB1 18 17 PB0
PL6 16 15 PC2
PL7 14 13 PC3
PC1 12 11 PN0
PF5 10 9 PJ0
PJ1 8 7 PH3
PG3 6 5 PG4
PG5 4 3 PD7
WAKE 2 1 HIB