Texas Instruments AM62-SIP SK Series User manual

EVM User's Guide: SK-AM62-SIP
AM62x-SIP SK Evaluation Module
Description
The SK-AM62-SIP starter kit (SK) evaluation module
(EVM) is a stand-alone test and development platform
built around the AM6254 system-on-a-chip (SoC)
with integrated 512MB LPDDR4 SDRAM in a single
package. AM625SIP processors are comprised of a
quad-core 64-bit Arm®-Cortex®-A53 microprocessor
and single-core Arm Cortex-M4F MCU.
SK-AM62-SIP allows the user to experience a dual-
display feature with 3D GPU through high-definition
multimedia interface (HDMI) over dots per inch (DPI)
and low-voltage differential signaling (LVDS), as well
as industrial communication applications using serial,
Ethernet, USB and other interfaces.
Get Started
1. Order the EVM at SK-AM62-SIP.
2. Download the EVM design files.
3. Download the reference software for many
applications from AM62x Development Portal.
4. The EVM Users Guide is here.
Features
• USB-C powered standalone mode of operation
• Power optimized discrete DC-DC power
management
• Onboard XDS110 JTAG interface with USB
connectivity for code development and debugging
• Onboard 32 GB eMMC memory and 512 Mb OSPI
NOR Flash
• 2x RGMII RJ45 connectors
• 2x USB 2.0 on type A and type C connectors
• Test automation interface through XDS110
• Expansion econnectors to access the interfaces
• M.2 connector for Wi-Fi/BT module
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1 Evaluation Module Overview
1.1 Introduction
This technical User’s Guide describes the hardware architecture of the SK-AM62-SIP EVM, a low cost Starter
Kit built around the AM62x SIP SoC. The AM62x SIP processor comprises of a Quad-Core 64-bit Arm®-Cortex®
A53 microprocessor, Single-core Arm Cortex-R5F MCU and an Arm Cortex-M4F MCU.
SK-AM62-SIP includes high-security field-securable (HS-FS) silicon to optionally customize keys and encryption
for security applications.
SK-AM62-SIP can be used for display applications (for example, human machine interface (HMI) and control
panel) with either an HDMI display and an external LVDS panel, up to 2K 60fps resolution. The powerful Arm
performance of quad-A53 at 1.4 GHz with rich industrial interfaces, offers good control and communication
capabilities for a wide range of applications, such as programmable logic controllers (PLC), automation control,
gateway, EV charging, medical, or building automation systems.
1.2 Kit Contents
• SK-AM62-SIP EVM
• EVM user guide pamphlet
• EVM disclaimer and standard terms
1.3 Specification
The figure below shows the functional block diagram of the AM62x SIP SK EVM.
Figure 1-1. Functional Block Diagram of AM62x SIP SK EVM
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1.4 Device Information
In addition, SK-AM62-SIP can communicate with other processors or systems and act as a communication
gateway. SK-AM62-SIP can directly operate as a standard remote I/O system or simple sensor connected to an
industrial communication network.
The embedded emulation logic allows for emulation and debugging using standard development tools such as
the Code Composer Studio™ integrated development environment (IDE) (CCSTUDIO). Reference software for
many applications can be downloaded from AM62x Development Portal.
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2 Hardware
2.1 Additional Images
This section shows the EVM pictures and the location of various blocks on the board.
Figure 2-1. EVM Top Side
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Figure 2-2. EVM Bottom Side
2.2 Key Features
The AM62x SIP SK EVM is a high performance, standalone development platform that enable users to evaluate
and develop industrial applications for the Texas Instrument's AM62x SIP System-on-Chip (SoC).
The following sections discuss the SK EVM's key features.
2.2.1 Processor
• AM62x SIPSoC, 13 mm x 13 mm, 0.5 mm pitch, 425‐pin VCA FBGA
2.2.2 Power Supply
• Two USB Type-C ports (5 V‐15 V input range)
• Optimized power solution with discrete regulators and LDOs for the processor and peripherals
2.2.3 Memory
• MicroSD Card slot with UHS-1 support
• 512MbitOctal SPI Flash memory
• 512Kbit Inter-Integrated Circuit (I2C) board ID EEPROM
• 32GBeMMC Flash with HS-400 support
2.2.4 JTAG/Emulator
• XDS110 On-Board Emulator
• Supports20-pin JTAG connection from external emulator
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2.2.5 Support Interfaces and Peripherals
• 1xUSB2.0 Type C interface, support DFP and UFP roles
• 1xUSB2.0 Host interface, Type A
• 1xHDMI interface
• Audio line in and mic + headphone out
• M.2 Key E interface support for both Wi-Fi and Bluetooth modules
• 2x Gigabit Ethernet ports supporting 10/100/1000 Mbps data rate on two RJ45 connectors
• Quadport UART to USB circuit over microB USB connector
• Industrial ethernet LEDs
• INA devices for current monitoring
• 1x Temperature sensor near SoC for thermal monitoring
2.2.6 Expansion Connectors/Headers
• CSI Camera Header
• LVDS Display connector
• User Expansion connector
• PRU Header
• MCU Header
2.3 Interface Mapping
Table 2-1. Interface Mapping
Interface Name Port on SoC Device Part Number
Memory – OSPI OSPI0 S28HS512TGABHM010
Memory – Micro SD Socket MMC1 MEM2051-00-195-00-A
Memory – eMMC MMC0 MTFC32GAZAQHD-IT
Memory – Board ID EEPROM SoC_I2C0 AT24C512C-MAHM-T
Ethernet 1 – RGMII SoC_RGMII1 DP83867IRRGZ
Ethernet 2 – RGMII SoC_RGMII2 DP83867IRRGZ
LED Driver – 8 Communication LEDs WKUP_I2C0 TPIC2810D
PRU Header – 2x10 HDR PR0_PRU0_GPO and SoC_I2C0 PREC010DAAN-RC
User Expansion Connector – 2x20 HDR SPI0, SPI2, UART5, SoC_I2C0, SoC_I2C2
and GPIOs
PEC20DAAN
MCU Header – 2x14 HDR MCU_UART0,MCU_MCAN0, MCU_SPI0,
MCU_I2C0 and MCU GPIOs
PREC014DAAN-RC
USB– 2.0 Type C USB0 2012670005
USB– 2.0 Type A USB1 629104151021
LVDS Display Connector OLDI0 FFC2A32-40-T
CSI Interface CSI0 1-1734248-5
HDMI VOUT0 SiI9022ACNU + TPD12S016PWR
[phone]RLF
AudioCodec McASP2and SoC_I2C1 TLV320AIC3106IRGZT+ SJ-43514-SMT
GPIO Port Expander SoC_I2C1 TCA6424ARGJR
UART Terminal (UART-to-USB) SoC_UART[1:0], WKUP_UART0 and
MCU_UART0
FT4232HL+ 629105150521
Test Automation Header SoC_I2C1 FH12A-40S-0.5SH
Temperature Sensor SoC_I2C1 TMP100NA/3K
Current Monitors SoC_I2C1 INA231AIYFDR
Connectivity– M.2 Key E MMC2, McASP1 and SoC_UART1 2199119-4
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2.4 Power ON/OFF Procedure
Power to the EVM is provided through an external power supply providing PD voltage and current to the either of
the two USB Type-C Ports.
Note
The maximum length of the IO cables shall not exceed 3 meters.
2.4.1 Power ON Procedure
1. Place the SK EVM boot switch selectors (SW1, SW2) into selected boot mode. Example boot-modes for
SDcard and no-boot are shown below.
2. Connect your boot media (if applicable).
3. Attach the PD capable USB Type-C cable to the SKEVM Type-C (J11 or J13) Connector.
4. Connect the other end of the Type-C cable to the source, either AC Power Adapter, or Type C source device
(such as a Laptop computer).
5. Visually inspect that either LD10 or LD12 LED are illuminated.
6. XDS110JTAG and UART debug console output are routed to micro-USB ports J16 and J15, respectively.
Figure 2-3. SD Boot Mode Switch Setting Example
2.4.2 Power OFF Procedure
1. Disconnect AC power from AC/DC converter.
2. Remove the USB Type-C cable from the SK EVM.
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2.4.3 Power Test Points
Test points for each power output on the board is mentioned in the table below.
Table 2-2. Power Test Points
S.No Power Supply Test Point Voltage
1 VBUS_TYPEC1 C398.1 5V-15V
2 VBUS_TYPEC2 C415.1 5V-15V
3 VMAIN TP95 5V-15V
4 VCC_5V0 TP70 5 V
5 VCC_3V3_SYS TP51 3.3V
6 VDD_2V5 TP42 2.5V
7 VPP_1V8 TP31 1.8V
8 VDD_1V0 TP33 1.0V
9 VDD_1V2 TP10 1.2V
10 VDDA1V8 TP36 1.8V
11 VCC_1V8 TP41 1.8V
12 VDDSHV_SDIO TP29 1.8V/3.3V
13 VCC1V1_DDR TP40 1.1V
14 VCC_CORE TP45 0.85V
15 VDD_CORE TP46 0.85V
16 VCC3V3_TA TP87 3.3V
17 VCC3V3_XDS TP77 3.3V
18 VCC_3V3_FT4232 C482.1 3.3V
2.5 Clocking
The figure below shows the clocking architecture of the AM62x SIP SK EVM.
Figure 2-4. Clock Architecture
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A clock generator of part number LMK1C1103PWR is used to drive the 25 MHz clock to the SoC and two
Ethernet PHYs. LMK1C1103PWR is a 1:3 LVCMOS clock buffer, which takes the 25 MHz crystal/LVCMOS
reference input and provides three 25 MHz LVCMOS clock outputs. The source for the clock buffer shall be
either the CLKOUT0 pin from the SoC or a 25 MHz oscillator; the selection is made using a set of resistors. By
default, an oscillator is used as input to the clock buffer on the AM62x SIP SKEVM. Output Y2 and Y3 of the
clock buffer are used as reference clock inputs] for two Gigabit Ethernet PHYs.
There is one external crystal attached to the AM62x SIP SoC to provide clock to the WKUP domain of the SoC
(32.768 KHz).
Figure 2-5. SoC WKUP Domain
2.5.1 Peripheral Ref Clock
Clock inputs required for peripherals such as XDS110, FT4232, HDMI Transmitter and Audio Codecare
generated locally using separate crystals or oscillators. Crystals or Oscillators used to provide the reference
clocks to the EVM peripherals are shown in the table below.
Table 2-3. Clock Table
Peripheral Mfr. Part Number Description Frequency
XDS110 Emulator XRCGB16M000FXN01R0 CRY 16.000MHz 8 pF SMD 16.000MHz
FT4232 Bridge ECS-120-18-30B-AGN-TR CRY12.000 MHz 18 pF SMD 12.000MHz
Audio Codec KC2520Z12.2880C1KX00 OSC12.288 MHz CMOS SMD 12.288MHz
HDMI Transmitter KC2520Z12.2880C1KX00 OSC12.288 MHz CMOS SMD 12.288MHz
The clock required by the HDMI Transmitter can be provided by either the on board oscillator or the SoC’s
AUDIO_EXT_REFCLK1, which can be selected through a resistor mux. SoC’s EXT_REFCLK1 is used to
provide clock to the User Expansion Connector on the SKEVM. The 32.768 KHz clock to the M.2 module is
provided by WKUP_CLKOUT0 of AM62x SIP SoC through a voltage translational buffer.
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2.6 Reset
The Reset Architecture of AM62x SIP SK EVM is shown below.
The SoC has following resets:
• RESETSTATz is the Main domain warm reset status output
• PORz_OUT is the Main domain power ON reset status output
• RESET_REQz is the Main domain warm reset input
• MCU_PORz is the MCU domain power ON/ Cold Reset input
• MCU_RESETz is the MCU domain warm reset input
• MCU_RESETSTATz is the MCU domain warm reset status output
Upon Power on Reset, all peripheral devices connected to the main domain get reset by RESETSTATz.
Figure 2-6. Reset Architecture
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