Texas Instruments LM5157EVM-SEPIC User manual

User’s Guide
LM5157 SEPIC Evaluation Module
ABSTRACT
The LM5157EVM-SEPIC Evaluation Module (EVM) is designed to showcase the LM5157 wide input voltage
converter, implementing a SEPIC converter with a coupled inductor. The EVM operates at 2.1 MHz, and it
produces a regulated output of 12 V, 12 W from an input of 4 V to 32 V. When the input voltage is between
4 V to 6 V, the output power is derated down to 6 W. The factory-installed converter is the LM5157-Q1.
However, by replacing the IC, the EVM can also be used to demonstrate the performance of the LM51571-Q1,
LM5157, LM51571, LM51581-Q1, LM5158-Q1, LM51581, and LM5158. The difference between the LM5157-Q1
and LM51571-Q1, or between the LM5157 and LM51571, is that the latter has a lower switch current limit for
applications with less output current need.
Table of Contents
1 Features and Electrical Performance................................................................................................................................... 2
1.1 Electrical Parameters......................................................................................................................................................... 2
1.2 EVM Power Derating Curve............................................................................................................................................... 3
1.3 Terminals and Signal Test Points....................................................................................................................................... 4
2 Application Schematic........................................................................................................................................................... 5
3 EVM Picture.............................................................................................................................................................................5
4 Test Setup and Procedure......................................................................................................................................................6
4.1 Bench Setup.......................................................................................................................................................................6
4.2 Test Equipment.................................................................................................................................................................. 6
4.3 Precautions........................................................................................................................................................................ 6
5 Test Data..................................................................................................................................................................................7
5.1 Efficiency............................................................................................................................................................................7
5.2 Output Regulation.............................................................................................................................................................. 7
5.3 Thermal Performance........................................................................................................................................................ 8
5.4 Typical Power Up............................................................................................................................................................... 8
5.5 Output Ripple Voltage........................................................................................................................................................ 9
5.6 Step Load Response........................................................................................................................................................11
5.7 Bode Plots........................................................................................................................................................................14
6 Schematics............................................................................................................................................................................15
7 Bill of Materials..................................................................................................................................................................... 16
8 Board Layout.........................................................................................................................................................................18
List of Figures
Figure 1-1. Power Derating vs. Input Voltage.............................................................................................................................. 3
Figure 2-1. Typical SEPIC Schematic Employing the LM5157/LM51571 and Coupled Inductor................................................ 5
Figure 3-1. LM5157EVM-SEPIC 3D-Rendered Picture...............................................................................................................5
Figure 4-1. Test Setup................................................................................................................................................................. 6
Figure 5-1. Efficiency vs. Load under Normal VIN, FSW = 2.1 MHz..............................................................................................7
Figure 5-2. Efficiency vs. Load under Low VIN, FSW = 2.1 MHz...................................................................................................7
Figure 5-3. Output Regulation vs Input Voltage, IOUT = 1 A.........................................................................................................7
Figure 5-4. Output Regulation vs Load, vIN = 12 V......................................................................................................................7
Figure 5-5. Thermal Image: VIN = 6 V, IOUT = 1 A, VBIAS = 6 V, No Forced Air Cooling...............................................................8
Figure 5-6. EVM Power Up under IOUT = 1 A.............................................................................................................................. 8
Figure 5-7. Output Ripple Voltage under VIN = 6 V and IOUT = 1 A............................................................................................. 9
Figure 5-8. Output Ripple Voltage under VIN = 18 V and IOUT = 1 A......................................................................................... 10
Figure 5-9. Step Load Response under VIN = 6 V, IOUT = 0.5 to 1 A Step................................................................................. 11
Figure 5-10. Step Load Response under VIN = 12 V, IOUT = 0.5 to 1 A Step.............................................................................12
Figure 5-11. Step Load Response under VIN = 30 V, IOUT = 0.5 to 1 A Step............................................................................. 13
Figure 5-12. EVM Bode Plots, Vin = 12 V, Vout = 12V, Iout = 1 A............................................................................................. 14
www.ti.com Table of Contents
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 1
Copyright © 2022 Texas Instruments Incorporated

Figure 6-1. EVM Schematic.......................................................................................................................................................15
Figure 8-1. EVM Top Layer Silkscreen (view from top)............................................................................................................. 18
Figure 8-2. EVM Middle Layer 1 (view from top)....................................................................................................................... 18
Figure 8-3. EVM Middle Layer 2 (view from top)....................................................................................................................... 18
Figure 8-4. EVM Bottom Layer Silkscreen (view from bottom)..................................................................................................18
List of Tables
Table 1-1. Electrical Performance................................................................................................................................................2
Table 1-2. EVM Terminals and Signal Test Points....................................................................................................................... 4
Table 7-1. LM5157EVM-SEPIC Bill of Materials........................................................................................................................16
Trademarks
All trademarks are the property of their respective owners.
1 Features and Electrical Performance
The LM5157EVM-SEPIC supports the following features and performance capabilities:
• Wide input voltage range from 4 V to 32 V, to cover typical automotive battery voltage ranges
• Tightly regulated output voltage of 12 V with a 1% accurate reference voltage
• Supports 1 A full load when VIN is greater than 6 V
• Supports 0.5 A load current when VIN drops to 4 V
• 2.1 MHz switching frequency
• Peak efficiency > 88 %
• Can be used to evaluate LM51571-Q1, LM5157-Q1, and LM51571 ICs, by replacing the factory installed IC
with the corresponding IC
• Selection capability for several BIAS connections
The electrical performance of the EVM is show in Table 1-1. The EVM terminals and signal test points are listed
in Table 1-2. The typical application circuit is shown in Figure 2-1. The EVM complete schematic is shown in
Figure 6-1.
1.1 Electrical Parameters
Refer to the LM5157 data sheet for the full range of recommended operating specifications and design
guidelines. Section 1.1 provides a summary of the tested LM5157EVM-SEPIC performance specifications.
Table 1-1. Electrical Performance
Parameter Test Conditions MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Input voltage Range VIN
Normal operation, 1 A full load 6 12 32 V
Power derating from 1 A down to 0.5 A 4 6 V
Input voltage turn on VIN(ON) Adjusted by the UVLO/SYNC resistors 3.9 V
Input voltage turn off VIN(OFF) 3.7 V
OUTPUT CHARACTERISTICS
Output Voltage VOUT 12 V
Maximum Output Current IOUT
VIN > 6 V 1 A
4 V < VIN < 6 V 0.5 1 A
SYSTEM CHARACTERISTICS
Switching Frequency 2.1 MHz
Full Load Efficiency VIN = 12 V, IOUT = 1 A 92 %
Ambient Temperature, TA-40 125 °C
Trademarks www.ti.com
2LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

1.2 EVM Power Derating Curve
The LM5157EVM-SEPIC is designed to support a full load of 1 A when the input voltage is higher than 6 V.
When the input voltage is below 6 V, the output power needs to be derated, owing to the peak current limitation
of the selected inductor on the EVM. Figure 1-1 shows the power derating curve.
Vin (V)
Load Current (A)
1 2 3 4 5 6 7 8 9 10 20 3032
0
0.2
0.4
0.6
0.8
1
1.2
Figure 1-1. Power Derating vs. Input Voltage
www.ti.com Features and Electrical Performance
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 3
Copyright © 2022 Texas Instruments Incorporated

1.3 Terminals and Signal Test Points
Table 1-2 summarizes the EVM terminals and signal test points.
Table 1-2. EVM Terminals and Signal Test Points
Termina
lSIGNAL PINS FUNCTION DESCRIPTION
J1 VIN+ Input Connector
J2 VOUT+ Output Connector
J3 GND Input Return Connector
J4 PGND PGND Signal
J5 GND Output Return Connector
J6 VOUT Pin 1 to 2 Connect VOUT to BIAS pin of the LM5157 through D2
Pin 2 to 3 Directly connect VOUT to BIAS pin of the LM5157
J7 VIN Pin 1 to 2 Connect VIN to BIAS pin of the LM5157 through D3
Pin 2 to 3 Directly connect VIN to BIAS pin of the LM5157
J8 VCC Pin 1 to 2 Directly connect VCC to BIAS pin of the LM5157
J9 VAUX Pin 1 to 2 Connect VAUX to BIAS
J10 MODE Pin 1 to 2 MODE pin connected to AGND. Hiccup mode protection is disabled and spread spectrum is disabled
Pin 3 to 4 MODE pin connected to AGND with 34.4 kOhm. Hiccup mode protection is enabled and spread
spectrum is enabled
Pin 5 to 6 MODE pin connected to AGND with 62.0 kOhm. Hiccup mode protection is enabled and spread
spectrum is disabled
Pin 7 to 8 MODE pin connected to AGND with 100 kOhm. Hiccup mode protection is disabled and spread
spectrum is enabled
J11
SS Pin 1 IC SS Pin Signal
COMP Pin 2 IC COMP Pin Signal
AGND Pin 3 IC AGND Pin Signal
UVLO Pin 4 IC UVLO Pin Signal and External Enable Control
PGOOD Pin 5 IC PGOOD Pin Signal
BIAS-IC Pin 6 IC BIAS Pin Signal
VCC Pin 7 IC VCC Pin Signal
TP1 VIN+ Input Voltage Sense Point
TP2 VOUT+ Output Voltage Sense Point
TP3 PGND Input Return Sense Point
TP4 PGND Output Return Sense Point
TP5 VOUT+ Positive terminal for AC injection
TP6 SW Switch node
TP7 VOUT- Negative terminal for AC injection
TP8 VAUX Auxiliary winding
TP9 GND Ground signal for AUX voltage
Features and Electrical Performance www.ti.com
4LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

2 Application Schematic
Figure 2-1 shows a typical LM5157 SEPIC schematic employing a coupled inductor. Note that the same
schematic is applicable to the LM51571, LM5157-Q1, and LM51571-Q1. Refer to Figure 6-1 for the complete
EVM schematic.
SS
SW
COMP
LM5157/LM51571
VCC
PGND
VOUT
BIAS
VIN
RT
UVLO/SYNC
FB
AGND
PGOOD
PGOOD
ENABLE
Figure 2-1. Typical SEPIC Schematic Employing the LM5157/LM51571 and Coupled Inductor
3 EVM Picture
Figure 3-1 shows a 3D-rendered picture of the LM5157EVM-SEPIC. The actual board color may differ.
Figure 3-1. LM5157EVM-SEPIC 3D-Rendered Picture
www.ti.com Application Schematic
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 5
Copyright © 2022 Texas Instruments Incorporated

4 Test Setup and Procedure
4.1 Bench Setup
Figure 4-1 shows the bench setup. The Load can be an electronic load or a resistor load.
Power Supply
- +
Ammeter 1
ACOM
Voltmeter 1
VCOM
Load
-+
Ammeter 2
ACOM
Voltmeter 2
VCOM
Figure 4-1. Test Setup
4.2 Test Equipment
Power Supply: The input voltage source (VIN) should be an adjustable power supply capable of 0 V to 32 V and
source at least 10 A.
Electronic Loads: The E-Load should be capable of at least 20 V and 5 A.
Multimeters:
• Voltmeter 1: Input voltage, connect from VIN to GND
• Voltmeter 2: Output voltage, connect from VOUT to GND
• Ammeter 1: Input current, must be able to handle 10 A. A shunt resistor can be used as needed.
• Ammeter 2: Output current, must be able to handle 5 A. A shunt resistor can be used as needed.
Oscilloscope: An oscilloscope and 10× probes with at least 20-MHz bandwidth is required. Measure the output
voltage ripple directly across an output capacitor with a short ground lead. Do not use a long-lead ground
connection due to the possibility of noise being coupled into the signal. To measure other waveforms, adjust the
oscilloscope as needed.
Input and Output Cables: Cables capable of conducting 10 A current are recommended. Avoid the use of
overly-long cables. Cable impedance, especially the inductances, may affect the circuit operation. To minimize
the cable impedance effects, twist the pair of cables at both input and output ports.
4.3 Precautions
CAUTION
Prolonged operation with low input at full power will cause heating of the MOSFET (Q1).
Board surface is hot. Do not touch. Contact may cause burns.
Test Setup and Procedure www.ti.com
6LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

5 Test Data
Figure 5-1 through Figure 5-12 show the typical performance of the LM5157EVM-SEPIC according to the Bill of
Materials and the configuration described in Section 6. Based on measurement techniques and environmental
variables, measurements might differ slightly from the data presented.
5.1 Efficiency
Iout (A)
Efficiency
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
0.6
0.8
1
VIN 6V
VIN 12V
VIN 18V
VIN 30V
Figure 5-1. Efficiency vs. Load under Normal VIN,
FSW = 2.1 MHz
Iout (A)
Efficiency
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
0.6
0.8
1
VIN 4V
VIN 5V
VIN 6V
Figure 5-2. Efficiency vs. Load under Low VIN, FSW
= 2.1 MHz
5.2 Output Regulation
Vin (V)
Vout (V)
6 9 12 15 18 21 24 27 30
11.85
11.9
11.95
12
12.05
12.1
12.15
Vout (V)
1%margin
-1%margin
Figure 5-3. Output Regulation vs Input Voltage,
IOUT = 1 A
Iout (A)
Vout (V)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
11.85
11.9
11.95
12
12.05
12.1
12.15
Vout (V)
1%margin
-1%margin
Figure 5-4. Output Regulation vs Load, vIN = 12 V
www.ti.com Test Data
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 7
Copyright © 2022 Texas Instruments Incorporated

5.3 Thermal Performance
Figure 5-5. Thermal Image: VIN = 6 V, IOUT = 1 A, VBIAS = 6 V, No Forced Air Cooling
5.4 Typical Power Up
Figure 5-6. EVM Power Up under IOUT = 1 A.
Channel 1 (yellow) : SS pin
Channel 2 (green) : Vout
Channel 3 (orange) : Vin
Channel 4 (blue) : PGOOD pin
Test Data www.ti.com
8LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

5.5 Output Ripple Voltage
Figure 5-7. Output Ripple Voltage under VIN = 6 V and IOUT = 1 A
Channel 1 (yellow) : switch node
Channel 2 (green) : Vout
www.ti.com Test Data
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 9
Copyright © 2022 Texas Instruments Incorporated

Figure 5-8. Output Ripple Voltage under VIN = 18 V and IOUT = 1 A
Channel 1 (yellow) : switch node
Channel 2 (green) : Vout
Test Data www.ti.com
10 LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

5.6 Step Load Response
Figure 5-9. Step Load Response under VIN = 6 V, IOUT = 0.5 to 1 A Step
Channel 1 (yellow) : Iout
Channel 2 (green) : Vout
www.ti.com Test Data
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 11
Copyright © 2022 Texas Instruments Incorporated

Figure 5-10. Step Load Response under VIN = 12 V, IOUT = 0.5 to 1 A Step
Channel 1 (yellow) : Iout
Channel 2 (green) : Vout
Test Data www.ti.com
12 LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

Figure 5-11. Step Load Response under VIN = 30 V, IOUT = 0.5 to 1 A Step
Channel 1 (yellow) : Iout
Channel 2 (green) : Vout
www.ti.com Test Data
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 13
Copyright © 2022 Texas Instruments Incorporated

5.7 Bode Plots
Frequency (Hz)
Gain (dB)
Phase ()
100 200 300 400500 700 1000 2000 3000 5000 7000 10000 20000 30000 50000 100000 200000200000
-60 -180
-40 -120
-20 -60
0 0
20 60
40 120
60 180
Gain (dB)
Phase (Deg)
Figure 5-12. EVM Bode Plots, Vin = 12 V, Vout = 12V, Iout = 1 A
Test Data www.ti.com
14 LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

6 Schematics
Figure 6-1. EVM Schematic
www.ti.com Schematics
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 15
Copyright © 2022 Texas Instruments Incorporated

7 Bill of Materials
Table 7-1. LM5157EVM-SEPIC Bill of Materials
Designator Quantity Description PartNumber Manufacturer
PCB 1 Printed Circuit Board BMC078 Any
C2, C10 2 CAP, CERM, 1000 pF, 50 V, +/- 10%,
X7R, 0603
C0603X102K5RACTU Kemet
C3, C11, C21 3 CAP, CERM, 0.01 uF, 50 V, +/- 10%, X7R,
0603
C0603X103K5RACTU Kemet
C4, C18 2 CAP, CERM, 0.1 uF, 50 V, +/- 10%, X7R,
0603
C1608X7R1H104K080AA TDK
C5, C6, C7, C12, C13, C14,
C15, C16
8 CAP, CERM, 10 uF, 50 V, +/- 10%, X7R,
1210
GRM32ER71H106KA12L MuRata
C8 1 CAP, CERM, 10 µF, 50 V,+/- 10%, X7R,
AEC-Q200 Grade 1, 1206
CGA5L1X7R1H106K160AC TDK
C17 1 CAP, CERM, 1 uF, 50 V, +/- 10%, X7R,
AEC-Q200 Grade 1, 0805
CGA4J3X7R1H105K125AB TDK
C20 1 CAP, CERM, 1 µF, 16 V,+/- 10%, X7R,
AEC-Q200 Grade 1, 0603
CGA3E1X7R1C105K080AC TDK
C23 1 CAP, CERM, 100 pF, 50 V, +/- 5%, C0G/
NP0, 0603
C0603C101J5GACTU Kemet
C24 1 CAP, CERM, 0.047 uF, 50 V, +/- 10%,
X5R, 0603
C1608X5R1H473K080AA TDK
C25 1 CAP, CERM, 0.22 uF, 25 V, +/- 10%, X7R,
AEC-Q200 Grade 1, 0603
GCM188R71E224KA55D MuRata
C26 1 CAP, CERM, 220 pF, 50 V, +/- 5%, C0G/
NP0, 0603
C0603C221J5GACTU Kemet
D1 1 Diode, Schottky, 60 V, 10 A, AEC-Q101,
CFP15
PMEG060V100EPDZ Nexperia
D2, D3 2 Diode, Schottky, 60 V, 1 A, SOD-123F PMEG6010CEH,115 Nexperia
H1, H2, H3, H4 4 Machine Screw, Round, #4-40 x 1/4,
Nylon, Philips panhead
NY PMS 440 0025 PH B&F Fastener Supply
H5, H6, H7, H8 4 Standoff, Hex, 0.5"L #4-40 Nylon 1902C Keystone
J1, J2, J3, J5 4 Standard Banana Jack, Uninsulated,
8.9mm
575-8 Keystone
J4 1 TEST POINT SLOTTED .118", TH 1040 Keystone
J6, J7 2 Header, 2.54 mm, 3x1, Gold, TH 61300311121 Wurth Elektronik
J8, J9 2 Header, 2.54 mm, 2x1, Gold, TH 61300211121 Wurth Elektronik
J10 1 Header, 100mil, 4x2, Gold, TH TSW-104-07-G-D Samtec
J11 1 Header, 100mil, 7x1, Gold, TH TSW-107-07-G-S Samtec
L1 1 Coupled inductor, 4.7 uH, 10.3 A, 0.036
ohm, TH
MSD1260-472ML Coilcraft
LBL1 1 Thermal Transfer Printable Labels, 0.650"
W x 0.200" H - 10,000 per roll
THT-14-423-10 Brady
R2 1 RES, 10.0, 1%, 0.1 W, 0603 RC0603FR-0710RL Yageo
R3, R10 2 RES, 0, 5%, 0.1 W, 0603 RC0603JR-070RL Yageo
R4 1 RES, 4.99, 1%, 0.1 W, 0603 RC0603FR-074R99L Yageo
Bill of Materials www.ti.com
16 LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

Table 7-1. LM5157EVM-SEPIC Bill of Materials (continued)
Designator Quantity Description PartNumber Manufacturer
R5 1 RES, 34.8 k, 1%, 0.1 W, 0603 RC0603FR-0734K8L Yageo
R6 1 RES, 51.1 k, 1%, 0.1 W, 0603 RC0603FR-0751K1L Yageo
R7 1 RES, 24.9 k, 1%, 0.1 W, 0603 RC0603FR-0724K9L Yageo
R8 1 RES, 22.6 k, 1%, 0.1 W, 0603 RC0603FR-0722K6L Yageo
R9 1 RES, 4.64 k, 1%, 0.1 W, 0603 RC0603FR-074K64L Yageo
R11 1 RES, 37.4 k, 1%, 0.1 W, 0603 RC0603FR-0737K4L Yageo
R12 1 RES, 62.0 k, 1%, 0.1 W, 0603 RC0603FR-0762KL Yageo
R13 1 RES, 100 k, 1%, 0.1 W, 0603 RC0603FR-07100KL Yageo
R14 1 RES, 9.53 k, 1%, 0.1 W, 0603 RC0603FR-079K53L Yageo
R15 1 RES, 2.00 k, 0.01%, 0.15 W, 0603 PLTU0603U2001LST5 Vishay-Dale
SH-JP1, SH-JP2 2 Single Operation 2.54mm Pitch Open Top
Jumper Socket
M7582-05 Harwin
TP1, TP2, TP8 3 Test Point, Miniature, Red, TH 5000 Keystone
TP3, TP4, TP9 3 Test Point, Miniature, Black, TH 5001 Keystone
TP6 1 Test Point, Miniature, SMT 5015 Keystone
U1 1 2.2MHz Wide VIN Boost/Sepic/Flyback
Converter with Dual Random Spread
Spectrum, RTE0016K (WQFN-16)
LM5157QRTERQ1 Texas Instruments
C1 0 CAP, CERM, 680 pF, 50 V, +/- 5%, C0G/
NP0, 0603
C0603C681J5GACTU Kemet
C9 0 CAP, Polymer Hybrid, 100 uF, 50 V,+/-
20%, 0.028 ohm, AEC-Q200 Grade 1,
D10xL10.2mm SMD
EEH-ZC1H101P Panasonic
C19 0 CAP, CERM, 10 µF, 50 V,+/- 10%, X7R,
AEC-Q200 Grade 1, 1206
CGA5L1X7R1H106K160AC TDK
C22 0 CAP, CERM, 0.068 uF, 50 V, +/- 10%,
X7R, AEC-Q200 Grade 1, 0603
CGA3E2X7R1H683K080AA TDK
FID1, FID2, FID3, FID4,
FID5, FID6
0 Fiducial mark. There is nothing to buy or
mount.
N/A N/A
R1 0 RES, 10.0, 1%, 0.75 W, AEC-Q200
Grade 0, 1210
CRCW121010R0FKEAHP Vishay-Dale
www.ti.com Bill of Materials
SNVU738 – MARCH 2022
Submit Document Feedback
LM5157 SEPIC Evaluation Module 17
Copyright © 2022 Texas Instruments Incorporated

8 Board Layout
The EVM PC Board consists of two copper layers, and the board includes various headers for flexible
configurations suitable for different applications. Figure 8-1 through Figure 8-4 show the EVM PCB artwork.
Figure 8-1. EVM Top Layer Silkscreen (view from
top)
Figure 8-2. EVM Middle Layer 1 (view from top)
Figure 8-3. EVM Middle Layer 2 (view from top) Figure 8-4. EVM Bottom Layer Silkscreen (view
from bottom)
Board Layout www.ti.com
18 LM5157 SEPIC Evaluation Module SNVU738 – MARCH 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

www.ti.com
2
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.