Texas Instruments TPS54225 User manual

User’s Guide
TPS54225 Step-Down Converter Evaluation Module User's
Guide
Table of Contents
1 Introduction.............................................................................................................................................................................2
1.1 Background........................................................................................................................................................................ 2
1.2 Performance Specification Summary.................................................................................................................................2
1.3 Modifications...................................................................................................................................................................... 2
2 Test Setup and Results.......................................................................................................................................................... 3
2.1 Input / Output Connections................................................................................................................................................ 3
2.2 Start-Up Procedure............................................................................................................................................................ 4
2.3 Efficiency............................................................................................................................................................................4
2.4 Load Regulation................................................................................................................................................................. 5
2.5 Line Regulation.................................................................................................................................................................. 5
2.6 Load Transient Response.................................................................................................................................................. 6
2.7 Output Voltage Ripple........................................................................................................................................................ 6
2.8 Input Voltage Ripple........................................................................................................................................................... 7
2.9 Start Up.............................................................................................................................................................................. 7
2.10 Switching Frequency........................................................................................................................................................8
3 Board Layout...........................................................................................................................................................................9
3.1 Layout................................................................................................................................................................................ 9
4 Schematic, Bill of Materials and Reference....................................................................................................................... 13
4.1 Schematic........................................................................................................................................................................ 13
4.2 Bill of Materials.................................................................................................................................................................13
4.3 Reference.........................................................................................................................................................................13
5 Revision History................................................................................................................................................................... 13
List of Figures
Figure 2-1. TPS54225EVM-538 Efficiency.................................................................................................................................. 4
Figure 2-2. TPS54225EVM-538 Load Regulation....................................................................................................................... 5
Figure 2-3. TPS54225EVM-538 Line Regulation........................................................................................................................ 5
Figure 2-4. TPS54225EVM-538 Load Transient Response........................................................................................................ 6
Figure 2-5. TPS54225EVM-538 Output Voltage Ripple.............................................................................................................. 6
Figure 2-6. TPS54225EVM-538 Input Voltage Ripple................................................................................................................. 7
Figure 2-7. TPS54225EVM-538 Start Up.................................................................................................................................... 7
Figure 2-8. TPS54225EVM-538 Switching Frequency................................................................................................................ 8
Figure 3-1. Top Assembly............................................................................................................................................................ 9
Figure 3-2. Top Layer.................................................................................................................................................................10
Figure 3-3. Internal Layer 1....................................................................................................................................................... 10
Figure 3-4. Internal Layer 2........................................................................................................................................................11
Figure 3-5. Bottom Layer........................................................................................................................................................... 11
Figure 3-6. Bottom Assembly.................................................................................................................................................... 12
Figure 4-1. TPS54225EVM-538 Schematic Diagram................................................................................................................ 13
List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................2
Table 1-2. TPS54225EVM-538 Performance Specifications Summary.......................................................................................2
Table 1-3. Output Voltages.......................................................................................................................................................... 3
Table 2-1. Connection and Test Points........................................................................................................................................ 4
Table 4-1. Bill of Materials..........................................................................................................................................................13
Trademarks
D-CAP2™ is a trademark of Texas Instruments.
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All trademarks are the property of their respective owners.
1 Introduction
This user’s guide contains background information for the TPS54225 as well as support documentation for the
TPS54225EVM-538 evaluation module. Also included are the performance specifications, schematic and the bill
of materials for the TPS54225EVM-538.
1.1 Background
The TPS54225 is a single, adaptive on-time D-CAP2™ mode synchronous buck converter requiring a very
low external component count. The D-CAP2 control circuit is optimized for low-ESR output capacitors such as
POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The
switching frequency is internally set at a nominal 700 kHz. The high-side and low-side switching MOSFETs
are incorporated inside the TPS54225 package along with the gate drive circuitry. The low drain-to-source on
resistance of the MOSFETs allows the TPS54225 to achieve high efficiencies and helps keep the junction
temperature low at high output currents. The TPS54225 DC/DC synchronous converter is designed to provide
up to a 2-A output from an input control voltage source of 4.5 V to 18 V and an input power voltage source of 2
V to 18 V. The output voltage range is from 0.76 V to 5.5 V. Rated input voltage and output current range for the
evaluation module are given in Table 1-1.
The TPS54225EVM-538 evaluation module is a single synchronous buck converter providing 1.05 V at 2 A from
5-V to 17-V input. This user’s guide describes the TPS54225EVM-538 performance.
Table 1-1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54225EVM-538 VIN = 4.5 V to 17 V 0 A to 2 A
1.2 Performance Specification Summary
A summary of the TPS54225EVM-538 performance specifications is provided in Table 1-2. Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 1.05 V, unless otherwise noted. The ambient
temperature is 25°C for all measurement, unless otherwise noted.
Table 1-2. TPS54225EVM-538 Performance Specifications Summary
SPECIFICATIONS TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range (VIN) 4.5 12 17 V
CH1
Output voltage 1.05 V
Operating frequency VIN = 12 V, IO = 1 A 700 kHz
Output current range 0 2 A
Over current limit VIN = 12 V 3.1 A
Output ripple voltage VIN = 12 V, IO = 2 A 7 mVPP
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54225. Some modifications
can be made to this module.
1.3.1 Output Voltage Set Point
To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing the
value of R1 can change the output voltage above 0.765 V. The value of R1 for a specific output voltage can be
calculated using Equation 1 and Equation 2.
For output voltage from 0.76 V to 2.5 V:
R1
VO = 0.765 1+
R 2
æ ö
´ç ÷
è ø
(1)
For output voltage over 2.5 V:
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R1
VO = (0.763 + 0.0017 VO) 1+ R2
æ ö
´ ´ ç ÷
è ø
(2)
Table 1-3 lists the R1 values for some common output voltages. For higher output voltages, a feedforward
capacitor may be required. Pads for this component (C2) are provided on the printed circuit board. C2 is used
for faster load transient response and is normally not used. Note that the values given in Table 1-3 are standard
values, and not the exact value calculated using Table 1-3.
Table 1-3. Output Voltages
OUTPUT VOLTAGE (V) R1 (kΩ) R2 (kΩ) C2 (pF) L1 (µH)
1.0 6.81 22.1 2.2
1.05 8.25 22.1 2.2
1.2 12.7 22.1 2.2
1.8 30.1 22.1 3.3
2.5 49.9 22.1 3.3
3.3 73.2 22.1 680 3.3
5.0 121 22.1 220 4.7
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54225EVM-538. The section also
includes test results typical for the evaluation modules and the following:
• Efficiency
• Output load regulation
• Output line regulation
• Load transient response
• Output voltage ripple
• Input voltage ripple
• Start up
• Switching frequency
2.1 Input / Output Connections
The TPS54225EVM-538 is provided with input/output connectors and test points as shown in Table 2-1. A power
supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The load must be
connected to J2 through a pair of 20 AWG wires. The maximum load current capability is 2 A. Wire lengths must
be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input voltages
with TP2 providing a convenient ground reference. TP8 is used to monitor the output voltage with TP9 as the
ground reference.
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Table 2-1. Connection and Test Points
Reference Designator Function
J1 VIN (see Table 1-1 for VIN range)
J2 VOUT, 1.05 V at 2 A maximum
JP1 EN control. Connect EN to OFF to disable, connect EN to ON to enable.
TP1 VIN test point at VIN connector
TP2 GND test point at VIN
TP3 EN test point
TP4 VCC test point
TP5 Analog ground test point
TP6 Switch node test point
TP7 Power good test point
TP8 Output voltage test point
TP9 Ground test point at output connector
2.2 Start-Up Procedure
1. Make sure the jumper at JP1 (Enable control) is set from EN to OFF.
2. Apply appropriate VIN voltage to VIN and PGND terminals at J1.
3. Move the jumper at JP1 (Enable control) to cover EN and ON. The EVM will enable the output voltage.
2.3 Efficiency
Figure 2-1 shows the efficiency for the TPS54225EVM-538 at an ambient temperature of 25°C.
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
5 V
12 V
Efficiency - %
V = 1.05 V
O
I - Output Current - A
O
Figure 2-1. TPS54225EVM-538 Efficiency
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2.4 Load Regulation
The load regulation for the TPS54225EVM-538 is shown in Figure 2-2.
-0.2
-0.15
-0.1
-0.05
0
0.05
0.1
0.15
0.2
0 0.5 1 1.5 2 2.5
V - Output Voltage - V
O
I - Output Current - A
O
V = 12 V
I
V = 5 V
I
Figure 2-2. TPS54225EVM-538 Load Regulation
2.5 Line Regulation
The line regulation for the TPS54225EVM-538 is shown Figure 2-3.
1.04
1.045
1.05
1.055
1.06
4 8 12 16 20
V - Input Voltage - V
I
V - Output Voltage - V
O
I = 2 A
O
I = 1 A
O
I = 0.001 A
O
Figure 2-3. TPS54225EVM-538 Line Regulation
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2.6 Load Transient Response
The TPS54225EVM-538 response to load transient is shown in Figure 2-4. The current step is from 0.5 A to 2 A.
Total peak to peak voltage variation is as shown.
V = 50 mV/div(AC coupled)
O
I = 500 mA/div
0.5 to 2 A Load Step
O
Time - 200 /divms
Figure 2-4. TPS54225EVM-538 Load Transient Response
2.7 Output Voltage Ripple
The TPS54225EVM-538 output voltage ripple is shown in Figure 2-5. The output current is the rated full load of
2A.
V = 20 mV/div(AC coupled)
O
Switching Node = 5 V/div
Time - 1 /divms
Figure 2-5. TPS54225EVM-538 Output Voltage Ripple
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2.8 Input Voltage Ripple
The TPS54225EVM-538 input voltage ripple is shown in Figure 2-6. The output current is the rated full load of
2A.
Time - 1 /divms
V = 20 mV/div(AC coupled)
I
Switching Node = 5 V/div
Figure 2-6. TPS54225EVM-538 Input Voltage Ripple
2.9 Start Up
The TPS54225EVM-538 start up waveform is shown in Figure 2-7.
Time - 500 /divms
PG = 5 V/div
V = 500 mV/div
O
EN = 10 V/div
Figure 2-7. TPS54225EVM-538 Start Up
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2.10 Switching Frequency
The TPS54225EVM-538 switching frequency is shown in Figure 2-8.
500
600
700
800
900
0 5 10 15 20
V - Input Voltage - V
I
f - Switching Frequency - kHz
sw
V = 1.8 V
O
V = 3.3 V
O
I = 1 A
O
Figure 2-8. TPS54225EVM-538 Switching Frequency
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3 Board Layout
This section provides description of the TPS54225EVM-538, board layout, and layer illustrations.
3.1 Layout
The board layout for the TPS54225EVM-538 and is shown in Figure 3-1 through Figure 3-6. The top layer
contains the main power traces for VIN, VO and ground. Also on the top layer are connections for the pins of
the TPS54225 and a large area filled with ground. Many of the signal traces are also located on the top side.
The input decoupling capacitor are located as close to the IC as possible. The input and output connectors, test
points and most of the components are located on the top side. R3, the 0-Ω resistor that connects VIN to VCC
and R4, the power good pull up, are located on the back side. Analog ground and power ground are connected
at a single point on the top layer near pin 5 of the TPS54225. The internal layer 1 is a split plane containing
analog and power grounds. The internal layer 2 is primarily power ground. There are also a fill area of VIN and a
trace routing VCC to the enable control jumper JP1. The bottom layer is primarily analog ground. There are also
traces to connect VIN to VCC through R3, traces for the power good signal and the feedback trace from VOUT
to the voltage setpoint divider network.
Figure 3-1. Top Assembly
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Figure 3-2. Top Layer
Figure 3-3. Internal Layer 1
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