Texas Instruments ADS7066EVM-PDK User manual

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ADS7066EVM-PDK Evaluation Module
User's Guide
SBAU342A–February 2020–Revised June 2020
ADS7066EVM-PDK Evaluation Module
The ADS7066 Evaluation Module (EVM) Performance Demonstration Kit (PDK) allows users to evaluate
the functionality of Texas Instruments' ADS7066 16-bit, eight-channel programmable successive
approximation register (SAR) analog-to-digital converter (ADC). The ADS7066 device showcases eight
inputs, each configurable to an analog input, digital output, or digital input. The device supports an internal
reference as well as operation with an external reference. This user’s guide describes both the hardware
platform showcasing the ADS7066 device and the graphical user interface (GUI) software used to
configure the various modes of operation of this device. It includes complete circuit descriptions,
schematic diagrams, and a bill of materials. The EVM-PDK eases the evaluation of the ADS7066 device
with hardware, software, and computer connectivity through the universal serial bus (USB) interface.
Figure 1. ADS7066EVM-PDK Assembled
The following related documents are available through the Texas Instruments website at www.ti.com.
Table 1. Related Documentation
Device Literature Number
ADS7066 SBAS928
REF6025 SBOS708B
OPA325 SBOS637D
TPS78001 SBVS083E

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Contents
1 Introduction ................................................................................................................... 3
2 ADS7066EVM Overview.................................................................................................... 4
3 ADS7066 EVM Initial Setup ................................................................................................ 6
4 Input Signal-Conditioning Block on the ADS7066EVM ............................................................... 19
5 Bill of Materials, Printed Circuit Board Layout, and Schematics..................................................... 20
List of Figures
1 ADS7066EVM-PDK Assembled ........................................................................................... 1
2 Channel 1 to Channel 6 Hardware Block Diagram...................................................................... 3
3 ADS7066 EVM Board....................................................................................................... 4
4 ADS7066EVM Lined up With PAMBoard (Left View)................................................................... 6
5 Browser Extension and TI Cloud Agent Installation..................................................................... 7
6 Hardware Connected Successfully to GUI ............................................................................... 7
7 ADS7066 GUI Landing Page............................................................................................... 8
8 ADS7066 Device Configuration Tab Displaying Mode Configuration ................................................ 9
9 Digital Input or Output Configurations................................................................................... 10
10 Averaging Page ............................................................................................................ 11
11 CRC Function Polynomial................................................................................................. 11
12 ADS7066 Data Capture Tab.............................................................................................. 12
13 Analog IP Data Capture Tab Options ................................................................................... 13
14 Time Domain Display...................................................................................................... 14
15 FFT Display................................................................................................................. 15
16 Histogram Graph Display ................................................................................................. 16
17 Digital Input Page Display................................................................................................. 17
18 ADS7066 Register Map Page ............................................................................................ 18
19 Channel 0 Input Signal Conditioning Block............................................................................. 19
20 ADS7066 EVM PCB Top Layer ......................................................................................... 21
21 ADS7066 EVM PCB Ground Layer...................................................................................... 21
22 ADS7066 EVM PCB Power Plane Layer ............................................................................... 21
23 ADS7066 EVM PCB Bottom Layer ...................................................................................... 21
24 ADS7066 EVM Schematic Diagram ..................................................................................... 22
List of Tables
1 Related Documentation..................................................................................................... 1
2 Channel Connections ....................................................................................................... 5
3 Bill of Materials ............................................................................................................. 20
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ADS7066
CS
SCLK
SDI
SDO
Host MCU
AVDD
5.0 V
DVDD
3.3 V
330 pF
GND
AINx/GPIOx
1 k
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1 Introduction
The ADS7066 EVM is a fully-assembled evaluation platform designed to highlight the ADS7066 features
and various modes of operation that make this device suitable for ultra-low-power, small-size sensor
monitor applications.
The accompanying Precision ADC Motherboard (PAMBoard) development kit is used as a USB-to-PC
GUI communication bridge. This kit also serves as an example implementation of a master microcontroller
(MCU) to communicate with the ADS7066 device through a serial-peripheral interface (SPI).
NOTE: The ADS7066 EVM requires an external master controller to evaluate the ADS7066 device.
The PAMBoard is controlled by commands received from the ADS7066 GUI, and returns data to the GUI
for display and analysis. If the PAMBoard is not used, the EVM plug-in module format allows for an
alternative external host to communicate with the ADS7066 by easily connecting through a pin header.
The ADS7066 device incorporates all required circuitry and components with the following features:
• ADS7066 small WCSP footprint, eight-channel ADC
• Analog input driving a circuit available on channel 0
• Onboard reference, REF6025, to provide low-noise 2.5-V voltage and set the full scale range
• External power-supply connection available to provide DVDD power supply instead of the USB power
• Adjustable linear regulator, TPS78001, to generate stable output voltage to AVDD from the 5-V USB
power from the PAMBoard
• SPI for communication and configuration of modes
Figure 2 shows the ADS7066EVM architecture, identifying the key components and blocks previously
listed.
Figure 2. Channel 1 to Channel 6 Hardware Block Diagram

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2 ADS7066EVM Overview
This section describes various onboard components that are used to interface the analog input, general-
purpose inputs/outputs (GPIOs), digital interface, and provide power supply to the ADS7066 device.
Figure 3 shows an ADS7066 board overview.
Figure 3. ADS7066 EVM Board

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2.1 Connector for Channels
The ADS7066 device is designed for easy interface to an external, analog single-ended source, or to
GPIOs through a 100-mil header. Connector J5 provides a connection to the device channels. Table 2
lists the channel connections. The ADS7066 channel AIN0 has a buffered operational amplifier, TLV9061,
to drive the analog input. This is further explained in Section 4. Channels AIN1 through AIN6 have a
resistor and capacitor filter circuit to condition the analog input, as Figure 2 shows. Channel 7 is hardware-
configured to demonstrate GPIO functionality. GPIO7 has a resistor and light-emitting diode (LED) to
visibly demonstrate and monitor digital output channel state.
Table 2. Channel Connections
J5 Connector Pin Description
J5:1 Single-ended analog input with buffer
J5:2 Single-ended analog input or GPIO for channel 1 of the ADC
J5:5 Single-ended analog input or GPIO for channel 2 of the ADC
J5:6 Single-ended analog input or GPIO for channel 3 of the ADC
J5:7 Single-ended analog input or GPIO for channel 4 of the ADC
J5:8 Single-ended analog input or GPIO for channel 5 of the ADC
J5:11 Single-ended analog input or GPIO for channel 6 of the ADC
J5:12 LED GPO for channel 7 of the ADC
J5:3 and J5:4; J5:9 and J5:10 EVM ground
2.2 Digital Interface
As noted in Section 1, the ADS7066 interfaces with the PAMBoard, which in turn communicates with the
computer over the USB. The two devices on the EVM that communicate over SPI are the ADS7066 ADC
(U3) and the electrically erasable programmable read-only memory (EEPROM) (U4). The EEPROM is
preprogrammed with the information required to configure and initialize the ADS7066 platform. Once the
hardware is initialized, the EEPROM is no longer used.
2.3 ADS7066 PAMBoard Interface
The ADS7066 supports the digital SPI and functional modes as detailed in the ADS7066 Small, 8-
Channel, 16-Bit SAR ADC With GPIOs Data Sheet. The PAMBoard is capable of operating at a 3.3-V
logic level and is directly connected to the digital I/O lines of the ADC.
2.4 Power Supplies
The device supports a wide range of operation on its analog supply. The AVDD can operate from 3 V to
5.5 V. The DVDD operates from 1.65 V to 5.5 V, independent of the AVDD supply. A voltage regulator
available on the PAMBoard is used to supply 5V to AVDD, the DVDD is also provided by the PAMBoard
at 3.3V. There is an unpopulated option to use a low-dropout (LDO) regulator, for the TPS78001 for
AVDD. There is an onboard option to use an external power supply for DVDD through J2.

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3 ADS7066 EVM Initial Setup
The instructions to set up the ADS7066 for evaluation follow:
3.1 EVM Plug-In Hardware Setup Instructions
The EVM and PAMboard come packaged separately. For correct functionality, the boards need to be
installed properly.
To install the EVM to the PAMboard, stack the ADS7066EVM-PDK board on the PAMBoard. Make sure
the 20-pin connector (J1, J3) on the ADS7066 is mapped to left connector on the PAMBoard, and the
EVM connector (J4, J2) is mapped to right connector on the PAMBoard. The silk screen on the ADS7066
must match with the PAMBoard. Figure 4 shows the correct installation. The board headers must be flush.
Make sure the USB is not plugged in during this installation.
Connect the PAMBoard micro USB data port to an available USB port on the PC.
Figure 4. ADS7066EVM Lined up With PAMBoard (Left View)

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3.2 The ADS7066 GUI Online and TI Cloud Agent Application Installation
The following steps describe the ADS7066 GUI software installation:
1. Plug in the included micro USB to USB cable to the PAMBoard and a USB port on the computer,
respectively.
2. On the ADS7066EVM-PDK landing page, the software is available through a web-based GUI.
Connecting to the GUI may require login to a user account for access.
3. First-time users may be prompted to download and install the browser extension for Firefox™ or
Chrome™ and the TI Cloud Agent Application as Figure 5 shows. Do so if need be, this is a one time
download.
4. Refresh the GUI, if need be, and the GUI should connect to the hardware. A green signal will be
displayed, and at the left bottom, Hardware Connected shows.
Figure 5. Browser Extension and TI Cloud Agent Installation
Figure 6. Hardware Connected Successfully to GUI

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3.3 ADS7066 GUI Description
3.3.1 GUI Description
Figure 7 shows the GUI landing. This page provides a high-level overview of the ADS7066 device. The left
corner (highlighted by the green rectangle) shows the tabs to navigate through the GUI: home, function
configurations, data capture, and register map. When the ADS7066 is stacked on the PAMBoard and
connected to the PC via the micro USB cable, the GUI detects the EVM module by reading the onboard
EEPROM. When detected and connected, the GUI indicates this status as Connected. At the bottom left
corner of the GUI, there is an option to connect and disconnect the hardware from the GUI.
Figure 7. ADS7066 GUI Landing Page

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3.3.2 Functional Configuration Tab
As Figure 8 shows, the ADS7066 device configuration tab has two sections. The left-most section lists the
multiple functions the user can configure. These options enable the user to navigate through the various
functions of the ADS7066 in a structure and clear manner. The main section displays the configuration
options for each function.
The Device Configurations available are: Mode Configuration, Channel Selection, Averager, and Cyclic
Redundancy Check (CRC)
3.3.2.1 Mode Configuration
The ADS7066 can operate in three sampling modes. The mode configuration tab (Figure 8) allows the
user to select the device mode of operation.
The ADS7066 device has the following sampling modes:
•Manual Mode: Allows the external host processor to directly request and control when data is
sampled. The host provides SPI frames to control conversions and the captured data are returned over
the SPI bus after each conversion.
•Auto-Sequence Mode: The host can configure the device to scan through the enabled analog input
channels. The host must provide continuous clocks (SCLK) to the device to scan through the channels
and to read the data from the device. The MUX automatically switches through the predetermined
channel sequence, and the data conversion results are sent through the data bus.
•On-the-Fly Mode: The first 5 bits of SDI select the first channel to be sampled before the CS rising
edge. There is no latency between channel selection and ADC output data since the ADC samples the
next channel on the rising edge of CS.
The device powers up in manual mode and can be configured into any of the functional modes by writing
the configuration registers for the desired mode.
Figure 8. ADS7066 Device Configuration Tab Displaying Mode Configuration

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3.3.2.2 Channel Selection
The channel selection configuration option allows the user to configure each of the 8 channels. The
default configuration is analog input, but through the drop-down options, each channel can be configured
as a digital input or output. If using Auto Sequence mode, individual channels can be selected to be
included in the sequence, by checking Select for Auto-Seq. The EVM hardware has channel 7 hardwired
as a digital output with an LED connected to channel 7 to visually display a high or low digital output state.
To configure for a digital pin, change the Pin-Config drop down and select Digital. A second drop down
option will appear in line with the channel, I/O Config. This drop down option allows to select Input or
Output functionality. If output functionality is selected, as shown for channel 7 in Figure 9, configuration
options will appear in line with the channel. User will be able to select the Pin Value as high or low, and
the Pin Type as open drain or push pull. The EVM has an LED connected to channel 7 to display this
functionality; changing the Pin Value on channel 7 will turn on or off the LED (D2)
Through this document, as an example, channel 0 to 5 will be selected as analog inputs, channel 6 as a
digital input, and channel 7 as a digital output.
Figure 9. Digital Input or Output Configurations