Texas Instruments TPS563211 User manual

User’s Guide
TPS563211 18-V Input, 3-A Output, 600-kHz,
Synchronous Buck Converter SOT583 Evaluation
Module
ABSTRACT
This user's guide contains information for the TPS563211 as well as support documentation for the
TPS563211EVM evaluation module. Included are the performance specifications, board layout, schematic, and
the list of materials of the TPS563211EVM.
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 Performance Specification Summary................................................................................................................................... 2
3 Modifications...........................................................................................................................................................................2
3.1 MODE Pin Configuration....................................................................................................................................................2
3.2 Output Voltage Setpoint..................................................................................................................................................... 3
4 Test Setup................................................................................................................................................................................3
4.1 Input/Output Connections.................................................................................................................................................. 3
4.2 Start-Up Procedure............................................................................................................................................................ 4
5 Board Layout...........................................................................................................................................................................5
5.1 Layout................................................................................................................................................................................ 5
5.2 EVM Picture....................................................................................................................................................................... 7
6 Schematic, List of Materials, and Reference........................................................................................................................8
6.1 Schematic.......................................................................................................................................................................... 8
6.2 List of Materials.................................................................................................................................................................. 9
7 Reference................................................................................................................................................................................ 9
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1 Introduction
The TPS563211 is a single, Advanced Emulated Current Mode (AECM) control, synchronous Buck converter,
being able to deliver 3-A continuous output current, providing selectable Eco-mode operation or FCCM operation
and selectable Power-Good indicator or external Soft-Start by the configuration of the MODE pin. Power
sequencing is possible by correctly configuring the Enable, Power-Good indicator or external Soft-Start. The
device implements an AECM control which can get fast transient response with fixed frequency. The fast
transient response results in low voltage drop and the fixed frequency brings a better jitter permanence and
predictable frequency for EMI design. The optimized internal compensation network minimizes the external
component counts and simplifies the control loop design over a wide voltage output range. Rated input voltage
and output current ranges for the evaluation module are given in Table 1-1.
The TPS563211EVM is a single, synchronous buck converter providing 3.3 V at 3 A from 4.2-V to 18-V input.
This user’s guide describes the TPS563211EVM performance.
Table 1-1. Input Voltage and Output Current Summary
EVM Input Voltage Range Output Current Range
TPS563211EVM VIN = 4.2 V to 18 V 0 A to 3 A
2 Performance Specification Summary
A summary of the TPS563211EVM performance specifications is provided in Table 2-1. Test Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 3.3 V, unless otherwise noted. The ambient
temperature is 25°C for all measurement, unless otherwise noted.
Table 2-1. Performance Specifications Summary
SPECIFICATIONS TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 4.2 12 18 V
Output voltage set point 3.3 V
Operating frequency VIN = 12 V, IO = 3 A 600 kHz
Output current range 0 3 A
Output ripple voltage VIN = 12 V, IO = 3 A 20 mVPP
3 Modifications
This evaluation module is designed to provide access to the features of the TPS563211. Some modifications can
be made to this module.
3.1 MODE Pin Configuration
The TPS563211 has a MODE pin that can offer two different states of operation under light load conditions, and
offer two options for the function of Pin 1.
Table 3-1. MODE Pin Settings
MODE RESISTOR
RANGE
RECOMMENDED
MODE RESISTOR
VALUE
OPERATION MODE in
LIGHT LOAD
FUNCTION of PG/SS
PIN
[0, 12] kΩ 0 Eco-mode Power-Good(1)
[30, 50] kΩ 47 kΩ Eco-mode Soft-Start
[83, 120] kΩ 100 kΩ FCCM Soft-Start
[180, ∞] kΩ Float FCCM Power-Good
(1) Connect pin 1 to GND to get a better thermal performance if the PG was not used when PG
function was selected.
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3.2 Output Voltage Setpoint
The output voltage is set with a resistor divider from the output node to the FB pin. TI recommends using 1%
tolerance or better divider resistors. Referring to the application schematic of Figure 6-1, start with a 10 kΩ or 20
kΩ for R9 and use Equation 1 to calculate R8. To improve efficiency at light loads, consider using larger value
resistors. If the values are too high, the regulator is more susceptible to noise and voltage errors from the FB
input current are noticeable.
8 9
OUT REF
REF
V V
R R
V

˜
(1)
Table 3-2 lists the R8 and R9 values for some common output voltages. Note that the values given in Table 3-2
are standard values and not the exact value calculated using above equation.
Table 3-2. Recommended Component Values
OUTPUT VOLTAGE(1) (V) R8(2) (kΩ) R9 (kΩ) L1(3) (µH) COUT (4) (µF) RANGE of L1·COUT_E
(5) (μH × μF)
0.76 5.36 20.0 1 3 × 22 60 to 160
1.05 15.0 20.0 1.5 2 × 22 60 to 160
1.8 40.0 20.0 2.2 2 × 22 50 to 200
2.5 31.6 10.0 3.3 2 × 22 50 to 200
3.3 45.3 10.0 3.3 2 × 22 50 to 200
5 73.2 10.0 4.7 2 × 22 50 to 200
(1) Please use the recommended L1 and COUT combination of the higher and closest output rail for the unlisted output rails.
(2) R8 = 10 kΩ and R9 = Float for VOUT = 0.6 V.
(3) Inductance values are calculated based on VIN=18 V, but they can also be used for other input voltages. Users can calculate their
preferred inductance value per TPS563211 datasheet.
(4) The COUT is the sum of nominal output capacitance. 22-uF, 0805, 10-V or higher specficications capacitors are are recommended .
(5) The COUT_E is the effective value after derating, the value of L1·COUT_E should be within in the range.
4 Test Setup
This section describes how to properly connect, set up, and use the TPS563211EVM.
4.1 Input/Output Connections
The TPS563211EVM is provided with input/output connectors and test points as shown in Table 4-1. Figure 4-1
shows connectors and jumpers placement on TPS563211EVM board.
A power supply capable of supplying 3 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J2 through a pair of 20-AWG wires. The maximum load current capability is 3 A. Wire
lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input
voltages with TP2 providing a convenient ground reference. TP3 is used to monitor the output voltage with TP4
as the ground reference.
www.ti.com Modifications
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Figure 4-1. Connectors and Jumpers Placement
Table 4-1. Connection and Test Points
REFERENCE DESIGNATOR FUNCTION
J1 VIN (see Table 1-1 for VIN range)
J2 VOUT, 3.3 V at 3 A maximum
J3 EN control. Shunt EN to GND to disable.
J4 Source selection for PGOOD
TP1 VIN positive power point
TP3 VOUT positive monitor point
TP2, TP4, TP7 GND monitor point
TP5 Test point for PG/SS measurment
TP6 Switch node test point
4.2 Start-Up Procedure
1. Ensure that the jumper at J3 (Enable control) pin 1 and 2 are covered to shunt EN to GND, disabling the
output.
2. Apply appropriate VIN voltage to VI (J1-2) and GND (J1-1).
3. Move the jumper at J3 (Enable control) pin 1 and 2 (EN and GND) to enable the output.
Test Setup www.ti.com
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5 Board Layout
This section provides a description of the TPS563211EVM, board layout, and layer illustrations.
5.1 Layout
The board layout for the TPS563211EVM is shown in Figure 5-1, Figure 5-2, and Figure 5-3. The top layer
contains the main power traces for VIN, VOUT, and ground. Also on the top layer are connections for the pins of
the TPS563211 and a large area filled with ground. Most of the signal traces are also located on the top side.
The input decoupling capacitors, C1, C2, and C3 are located as close to the IC as possible. The input and output
connectors, test points, and all of the components are located on the top side. The bottom layer is a ground
plane along with the switching node copper fill, signal ground copper fill and the feed back trace from the point of
regulation to the top of the resistor divider network. Both the top layer and bottom layer use 2-oz copper
thickness.
Figure 5-1. TPS563211EVM Top Assembly
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Figure 5-2. TPS563211EVM Top Layer
Figure 5-3. TPS563211EVM Bottom Layer
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5.2 EVM Picture
Figure 5-4 and Figure 5-5 are the TPS563211EVM board top view and bottom view, respectively.
Figure 5-4. TPS563211EVM Board Top View
Figure 5-5. TPS563211EVM Board Bottom View
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6 Schematic, List of Materials, and Reference
6.1 Schematic
Figure 6-1 is the schematic for the TPS563211EVM.
VIN= 4.2V to 18V VOUT = 3.3V, 3A Max
C7
10pF
DNP
0.1uF
C6
0.1uF
C3
6.8nF
C5
DNP
49.9
R7
10.0k
R9
45.3k
R8
36.5k
R2
174k
R1
25V
22uF
C1
DNP
25V
22uF
C2
16V
22uF
C8
16V
22uF
C9
1 2 3
J3
1 2 3
J4
VOUTVCC
1
2
J2
GND
1
TP6
1
TP5
10.0k
R3
1
2
J1
1
TP1
1
TP2
1
TP3
1
TP4
VOUT
1
TP7
VIN
2BST 5
EN
6
FB 8
MODE
7
PG/SS
1
SW 3
GND 4
TPS563211DRLR
U1
3.3uH
L1
0
R5
0
R4
SH-J1 SH-J2
0
R6
DNP
C4
10pF
Figure 6-1. TPS563211EVM Schematic Diagram
Schematic, List of Materials, and Reference www.ti.com
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6.2 List of Materials
Table 6-1 details the EVM list of materials.
Table 6-1. List of Materials
DES QTY DESCRIPTION PART NUMBER MANUFACTURER
!PCB1 1 Printed Circuit Board BSR100 Any
C2 1 CAP, CERM, 22 uF, 25 V, ±20%, X5R, 0805 GRM21BR61E226ME44L MuRata
C3, C6 2 CAP, CERM, 0.1 uF, 50 V, ±10%, X7R, 0603 885012206095 Wurth Elektronik
C4 1 CAP, CERM, 10 pF, 100 V, ±5%, C0G/NP0,
0603
GRM1885C2A100JA01D MuRata
C8, C9 2 CAP, CERM, 22 uF, 16 V, ±20%, X5R, 0805 GRM21BR61C226ME44L MuRata
J1, J2 2 Terminal Block, 5.08 mm, 2x1, Brass, TH ED120/2DS On-Shore Technology
J3, J4 2 Header, 100mil, 3x1, Tin, TH PEC03SAAN Sullins Connector
Solutions
L1 1 Inductor, Shielded Drum Core, Powdered Iron,
3.3 uH, 6 A, 0.019 ohm, SMD
74437349033 Wurth Elektronik
LBL1 1 THT-14-423-10 Brady
R1 1 RES, 174 k, 1%, 0.1 W, 0603 RC0603FR-07174KL Yageo
R2 1 RES, 36.5 k, 1%, 0.1 W, 0603 RC0603FR-0736K5L Yageo
R3, R9 2 RES, 10.0 k, 1%, 0.1 W, 0603 RC0603FR-0710KL Yageo
R4, R5 2 RES, 0, 5%, 0.1 W, 0603 RC0603JR-070RL Yageo
R7 1 RES, 49.9, 1%, 0.1 W, 0603 RC0603FR-0749R9L Yageo
R8 1 RES, 45.3 k, 1%, 0.1 W, 0603 RC0603FR-0745K3L Yageo
SH-J1, SH-
J2
2 Shunt, 100mil, Flash Gold, Black SPC02SYAN Sullins Connector
Solutions
TP1, TP2,
TP3, TP4,
TP5, TP6,
TP7
7 Header, 2.54 mm, 1x1, Gold, TH 61300111121 Wurth Elektronik
U1 1 4.2-V to 17-V Input, 3-A Synchronous Buck
Converter in SOT583 Package
TPS563211DRLR Texas Instruments
C1 0 CAP, CERM, 22 uF, 25 V, ±20%, X5R, 0805 GRM21BR61E226ME44L MuRata
C5 0 CAP, CERM, 6800 pF, 50 V, 10%, X7R, 0603 GRM188R71H682KA01D MuRata
C7 0 CAP, CERM, 10 pF, 100 V, ±5%, C0G/NP0,
0603
GRM1885C2A100JA01D MuRata
FID1, FID2,
FID3
0 Fiducial mark. There is nothing to buy or mount. N/A N/A
R6 0 RES, 0, 5%, 0.1 W, 0603 RC0603JR-070RL Yageo
7 Reference
1. Texas Instruments, TPS563211 4.2-V to 18-V Input, 3-A Synchronous Buck Converter in SOT583 Package
www.ti.com Schematic, List of Materials, and Reference
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STANDARD TERMS FOR EVALUATION MODULES
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documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
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evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
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clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
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2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
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been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
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warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.