Texas Instruments TPS65313-Q1 User manual

Warning Warning Hot surface.
Contact may cause burns.
Do not touch!
1
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
User's Guide
SLDU028A–January 2018–Revised March 2020
TPS65313-EVM User’s Guide
The TPS65313-Q1 device is a power management integrated circuit (PMIC) for safety-relevant automotive
applications. This device integrates a wide-input voltage off-battery buck regulator (BUCK1), a low-voltage
buck regulator (BUCK2), and a 5-V boost converter (BOOST). The TPS65313-Q1 device integrates
protection features such as independent voltage monitors, overtemperature protection, watchdog function,
and built-in analog and digital diagnostic tests. The features of the device target safety-relevant
applications with system-safety requirements up to ASIL-C level.
This user's guide provides instructions to power up and evaluate the TPS65313-Q1 device using the
TPS65313-EVM evaluation module (EVM) and software user interface (TPS65313 GUI).
Contents
1 TPS65313-EVM Top View With Basic External Connections ......................................................... 3
2 TPS65313-EVM Input, Output Voltages, and Load Current Requirements.......................................... 3
3 TPS65313-EVM Jumper Settings ......................................................................................... 4
4 TPS65313-EVM GUI Installing and Opening the GUI .................................................................. 5
5 TPS65313-EVM Power-Up and Power-Down Procedure ............................................................. 6
6 TPS65313 GUI............................................................................................................... 6
7 TPS65313-EVM Typical Plots ............................................................................................ 12
8 TPS65313-EVM Schematic Diagram.................................................................................... 18
9 TPS65313-EVM Part List ................................................................................................. 21
10 PCB Layer Diagram........................................................................................................ 28
11 Description of the Watchdog Algorithm Implemented on EVM....................................................... 34
List of Figures
1 EVM Top-View Diagram With Basic Connections ...................................................................... 3
2 TPS65313-EVM GUI Installation Sequence ............................................................................. 5
3 TPS65313-EVM GUI LabVIEW RTE Installation Selection............................................................ 5
4 TPS65313 GUI Device Controls Page.................................................................................... 7
5 Watchdog Window Timing Diagram....................................................................................... 9
6 Updated Figure 6. TPS65313 GUI Register Map Page TPS65313 GUI Register Map Page.................... 10
7 TPS65313 GUI EEPROM Programming Page......................................................................... 11
8 Jumper Settings for EEPROM Update .................................................................................. 12
9 BUCK1 Efficiency Plot for VIN = 13 V.................................................................................... 12
10 BUCK2 Efficiency Plot..................................................................................................... 12
11 BOOST Efficiency Plot .................................................................................................... 12
12 Power Up Showing Regulator Outputs and VREG .................................................................... 13
13 Power Up Showing Regulator Outputs and WAKE.................................................................... 13
14 Regulators Start-Up showing NRES with short NRES extension delay ............................................ 13
15 Regulators Start-Up showing NRES with long NRES extension delay ............................................. 13
16 Power Down Showing Regulator Outputs and VREG................................................................. 14

www.ti.com
2SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
17 Power Down Showing Regulator Outputs and VIN.................................................................... 14
18 BUCK1 Ripple Voltage With 3-A Load Current for 3.3-V Output Voltage .......................................... 14
19 BUCK1 Ripple Voltage With 3-A Load Current for 3.6-V Output Voltage .......................................... 14
20 BUCK2 Ripple Voltage With 2-A Load Current for 1.2-V Output Voltage .......................................... 14
21 BUCK2 Ripple Voltage With 2-A Load Current for 1.8-V Output Voltage .......................................... 14
22 BUCK2 Ripple Voltage With 2-A Load Current for 2.3-V Output Voltage .......................................... 14
23 BOOST Ripple Voltage With 0.6-A Load Current ..................................................................... 14
24 BUCK1 Load Transient With Maximum Load Current for 3.3-V Output Voltage .................................. 15
25 BUCK1 Load Transient With Maximum Load Current for 3.6-V Output Voltage .................................. 15
26 BUCK2 Load Transient With Maximum Load Current for 1.2-V Output Voltage .................................. 15
27 BUCK2 Load Transient With Maximum Load Current for 1.8-V Output Voltage .................................. 15
28 BUCK2 Load Transient With Maximum Load Current for 2.3-V Output Voltage .................................. 15
29 BOOST Load Transient With Maximum Load Current................................................................ 15
30 BUCK1 Gain and Phase Plot With 1-A Load Current for VIN = 13 V (Phase Margin ≈50 Degree,
Bandwidth > 100 kHz) .................................................................................................... 16
31 BUCK2 Gain and Phase Plot With 1-A Load Current for VIN = 3.3 V (Phase Margin >50 Degree,
Bandwidth ≈75 kHz) ....................................................................................................... 17
32 BOOST Gain and Phase Plot With 0.3-A Load Current for VIN = 3.3 V (Phase Margin >80 Degree,
Bandwidth ≈20 kHz) ....................................................................................................... 17
33 TPS65313-EVM: TPS65313-Q1 Device External Circuit Schematic................................................ 18
34 TPS65313-EVM: MSP430™ USB2ANY MCU Circuit Schematic ................................................... 19
35 TPS65313-EVM: USB2ANY Power and Control Circuit Schematic................................................. 20
36 PCB Top Layer ............................................................................................................ 28
37 PCB Inner Layer-1 ........................................................................................................ 29
38 PCB Inner Layer-2 ........................................................................................................ 30
39 PCB Inner Layer-3 ........................................................................................................ 31
40 PCB Inner Layer-4 ........................................................................................................ 32
41 PCB Bottom Layer ........................................................................................................ 33
List of Tables
1 Input and Output Voltages and Load-Current Requirements.......................................................... 3
2 TPS65313-EVM Jumper Settings ......................................................................................... 4
3 Bill of Materials ............................................................................................................. 21
Trademarks
MSP430 is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

www.ti.com TPS65313-EVM Top View With Basic External Connections
3
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
1 TPS65313-EVM Top View With Basic External Connections
Figure 1 shows the top-view diagram of the EVM along with basic connections. The BUCK1 input supply
and an optional USB cable (for SPI communication) are the only two external connections required for this
EVM. The BUCK2 regulator and BOOST converter are supplied through onboard jumper connections from
the BUCK1 output and therefore no external supply voltage is required for the BUCK2 regulator and
BOOST converter.
Figure 1. EVM Top-View Diagram With Basic Connections
2 TPS65313-EVM Input, Output Voltages, and Load Current Requirements
Table 1 lists the input and output voltage for each regulator and their maximum load-current requirements.
(1) To supply the BUCK2 regulator and BOOST converter, use the onboard VBUCK1 supply (jumper J5, VSUP).
(2) The input voltage range on VIN, AVIN, and VIN_SAFE pins at which full device functionality and performance is assured.
Operation outside this input voltage range is possible and for detailed recommended operating conditions, refer to TPS65313-Q1
Wide-VIN Power-Management IC for Automotive Applications datasheet.
Table 1. Input and Output Voltages and Load-Current Requirements
Regulator Name Input Voltage Output Voltage(1) Maximum Load Current
BUCK1 6 V to 18 V (VBAT)(2) 3.3 V or 3.6 V (VBUCK1) 3.1 A
BUCK2 3.3 V or 3.6 V (VBUCK1)1.2 V or 1.25 V or 1.8 V or 2.3
V (VBUCK2)2 A
BOOST 3.3 V or 3.6 V (VBUCK1) 5 V (VBOOST) 0.6 A

TPS65313-EVM Jumper Settings www.ti.com
4SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
3 TPS65313-EVM Jumper Settings
The TPS65313-EVM has many jumpers to make the EVM more flexible. Setting these jumpers correctly
for the correct function of the EVM is important. Table 2 lists the jumpers and their functionality. The EVM
is preconfigured with default jumper settings and users can power up the regulators without any jumper
modifications. To understand more about the jumper functionality, see the schematic diagrams in
Section 8.
Table 2. TPS65313-EVM Jumper Settings
Jumper
Number Jumper Name Jumper Description Default Jumper Settings
J1 VBUCK1_EXT Filtered BUCK1 output connector Not applicable
J2 VBUCK2_EXT Filtered BUCK2 output connector Not applicable
J3 VBOOST_EXT Filtered BOOST output connector Not applicable
J4 VBAT VBAT supply and PGND connector Not applicable
J5 VSUP Input supply for BUCK2 and BOOST coming
from VBUCK1
Jumpers between J5_1_2 and J5_3_4 for the
BUCK2 supply
Jumpers between J5_7_8 and J5_9_10 for the
BOOST supply
J6 VIO IO supply for SPI Jumper between J6_7_8 (+5V_EXT) from the
USB interface
J7 NRES System reset output Jumper between J7_1_2
J8 ENDRV Enable drive output Jumper between J8_1_2
J9 DIAGOUT Diagnostic output Jumper between J9_2_3
J10 SYNC_IN PLL input clock. The onboard 2.3-MHz clock generated using the LMC555 timer can be used
to sync the device this external clock Jumper between J10_2_3
J11 MCUERR MCU error pin monitor Jumper between J11_2_3
J12 CSN SPI: Chip select input Use jumper between J10_1_2
J13 EXT_SENSE1 External general-purpose voltage monitor input
1Jumper between J13_1_2
J14 EXT_SENSE2 External general-purpose voltage monitor input
2Jumper between J14_1_2
J15 EXTSUP External supply for VREG Jumper between J13_1_2 for connecting the
BOOST pin to the EXTSUP pin
J16 SCLK SPI: Clock input Jumper between J14_1_2
J17 SDO SPI: SPI Slave data output (push-pull output) Jumper between J15_1_2
J18 SDI SPI: SPI Slave data input Jumper between J16_1_2
J19 J17 Not applicable Not applicable
J20 J20 Wake input options: J20_1_2: WAKE from VBAT through S2 switch
J20_2_3: WAKE from USB Jumper between J20_1_2: WAKE from VBAT
through S2
J21 VBAT_INT Supply for WAKE from USB circuit Jumper between J21_1_2
J22 J22 Supply for external clock generator circuit Jumper between J22_1_2
J23 CLK_WD External clock generator circuit frequency
setting Not applicable
J24 J24 Not applicable Not applicable
J25 PUR VUSB Not applicable No jumper, keep this pin open
J26 J26 USB port Connect this port to USB port of the PC
J27 J27 Device configuration change control signal 1 Jumper between J27_1_2. This jumper is
needed only for changing device configuration.
J28 J28 Device configuration change control signal 2 Jumper between J28_1_2. This jumper is
needed only for changing device configuration.
J29 J29 Not applicable Not applicable

1 2
1
3
2
4
www.ti.com TPS65313-EVM GUI Installing and Opening the GUI
5
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
4 TPS65313-EVM GUI Installing and Opening the GUI
This section provides the step-by-step instructions to install the TPS65313-EVM GUI on a computer.
Step 1. Unzip the TPS65313GUI.zip file and double click on the Setup_TPS65313_EVM.exe
executable file.
Step 2. Figure 2 shows the GUI installer window in a sequence (1, 2, 3, and 4). When the installer
window opens, click the Next button. Select the I accept the agreement radio button and then
click the Next button.
Figure 2. TPS65313-EVM GUI Installation Sequence
Step 3. In the next window select the LabVIEW RTE checkbox if it is not installed already on the
computer. The user must have LabVIEW 2014 runtime. Make sure the computer is connected
to the internet because free online registration may be required.
Figure 3. TPS65313-EVM GUI LabVIEW RTE Installation Selection
Step 4. After the LabVIEW RTE is installed, click the Next button to install the EVM GUI. Click the
Finish button to complete the installation.
Step 5. When installation is complete, click the Windows Start button and select All Programs.
Navigate to the Texas Instruments folder and click TPS65313-EVM to open the GUI.

TPS65313-EVM Power-Up and Power-Down Procedure www.ti.com
6SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
5 TPS65313-EVM Power-Up and Power-Down Procedure
The EVM is preconfigured with the default jumper settings listed in Table 2. Follow these steps to power
up the device:
Step 1. Connect the input supply voltage between the VBAT and PGND connectors to supply the
TPS65313-Q1 device.
Step 2. Press the S2 switch to apply a wake-up pulse which starts the device power up.
Step 3. It is possible to power up the device using the WAKE button on the GUI, when the J20
jumper is connected between pins 2 and 3, and the EVM is connected to the computer.
Before activating the WAKE button on the GUI, click the Re-Initialize USB2ANY button on the
GUI to establish communication between the EVM and the GUI. For more information
regarding GUI functionality, see Section 6.
The TPS65313-EVM does not require any special power-down sequence. The EVM can be powered
down by turning off the VBAT supply or clicking the CLR_WAKE_LATCH button on the GUI.
6 TPS65313 GUI
The TPS65313 GUI provides many features to help evaluate the TPS65313-Q1 device. The GUI has
three pages, or sections which are described as follows:
Device Controls page — This page, which is part of the High Level Configuration page, provides options
such as synchronizing the GUI with the EVM, wake-up control, watchdog configuration, MCU error
signal monitor (ESM), state transition control, NRES and ENDRV monitor, cyclical redundancy
check (CRC) enable, SPI status bit indicator, and device state indicator.
Register Map page — This page contains all the SPI registers and provides options to read or write the
TPS65313-Q1 device registers.
EEPROM Programming page — The TPS65313-Q1 device has many factory programmable device
options with unique orderable part numbers. By default, the TPS65313-EVM has a device with the
O31310QRWGRQ1 orderable part number. If users want to evaluate different device options (or
orderable part numbers), the EEPROM configuration can be updated using this page, which is part
of the High Level Configuration page.

www.ti.com TPS65313 GUI
7
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
6.1 Device Controls Page
This section describes the different options on the Device Controls page.
Figure 4. TPS65313 GUI Device Controls Page
6.1.1 Re-Initialize USB2ANY Button
After connecting the USB cable to the EVM and launching the GUI, click the Re-Initialize USB2ANY button
to sync the GUI with the EVM. If the GUI is successfully synchronized with the EVM, the GUI connection
status field on the bottom right of the GUI turns green and HARDWARE CONNECTED is displayed (see
Figure 4). The GUI is now connected to the EVM. If the GUI is not synchronized correctly, DEMO MODE
is displayed with a grey background.
6.1.2 WAKE Button
If the J20 jumper is set between pins 2 and 3, clicking the WAKE button turns on the high-side transistor
on the VBAT input supply line and this supply voltage is applied on the WAKE pin which starts device
start-up. When the device is successfully powered on, disabling the WAKE button has no impact and the
device continues to operate normally. If the WAKE button is still enabled and the device enters the OFF
state because of some errors, the device automatically starts to wake up again. If the WAKE button is
disabled and the device enters the OFF state because of some errors, the device stays in the OFF state,
and the WAKE button must be clicked again to start the new power-up cycle.
6.1.3 Power Off Button
The Power off button makes the WAKE signal low and clears the wake latch using a SPI register write
(CLR_WAKE_LATCH bit) to put the device in the OFF state. The WAKE signal must be applied again to
start the new power-up cycle.
6.1.4 Device Status Update
When the Auto-update Status button is enabled, the current state of the device (SAFE, DIAGNOSTIC, or
ACTIVE) is updated automatically. The WD Fail Count field shows the current value of the device
watchdog (WD) fail counter.

TPS65313 GUI www.ti.com
8SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
6.1.5 State Transitions
Clicking the SAFE to DIAGNOSTIC button makes the device go from the SAFE state to the DIAGNOSTIC
state. This transition is done by writing the SAFE_EXIT register with 0x55 and the MASK_DIAG_EXIT
register with 0x55.
Clicking the DIAGNOSTIC to ACTIVE button makes the device go from the DIAGNOSTIC state to the
ACTIVE state. This transition is done by writing the CLR_CTRL_LOCK register with 0xAA and setting the
DIAG_EXIT bit to 1b (writing the SAFETY_CHECK_CTRL register with 0x1).
Before the device goes from the SAFE state to the DIAGNOSTIC or from the DIAGNOSTIC state to the
ACTIVE state, the watchdog must be configured correctly. Without configuring the watchdog, the WD Fail
Count field increases to 15 which puts the device back in the SAFE state.
6.1.6 Enable Q&A Watchdog
To enable the device transition to the DIAGNOSTIC or ACTIVE state, the question and answer (Q&A)
watchdog must be enabled and configured correctly. The device has two options for watchdog Q&A
configurations: mode 0 and mode 1. The TPS65313-Q1 device exchanges questions and answers with
the USB2ANY MCU within the timing specified in the timing fields on the GUI.
The default timing configurations are set when GUI is opened. When the device is in the SAFE state,
enable the Enable Q&A Watchdog button to start the watchdog and sync it with MCU. When the watchdog
is successfully synced, the WD fail counter starts to decrease and reaches 0.
When the watchdog is synced when the device is in the SAFE state, the SAFE to DIAGNOSTIC button
can be clicked to make the device to go to the DIAGNOSTIC state. When the device is in the
DIAGNOSTIC state, the DIAGNOSTIC to ACTIVE button can be clicked to put the device in the ACTIVE
state.
If users want to try the different watchdog timing settings, adjust the watchdog timing settings only when
the device is in the DIAGNOSTIC.
Figure 5 shows the timing diagram for the watchdog windows. Each setting or field in the GUI is defined
as follows:
Answer0 to Question (ms) — This field is the time at which the WD question is received by the MCU
(the GUI default is 30 ms).
Question to Answer3 (ms) — This field is the time at which Answer3 is sent from the MCU (the GUI
default is 30 ms).
Answer2 to Answer1 (ms) — This field is the time at which Answer1 is sent from the MCU (the GUI
default is 30 ms).
Reset MCU Timings — This button resets the MCU timing to the default GUI settings.
Answer3 to Answer2 (ms) — This field is the time at which Answer2 is sent from the MCU (the GUI
default is 30 ms).
Answer1 to Answer0 (ms) — This field is the time at which Answer0 is sent from the MCU (the GUI
default is 25 ms).
Window1 Duration (ms) — This field is the WD response WINDOW 1 duration set in the
WDT_WIN1_CFG register (the GUI default is 140.8 ms).
Window2 Duration (ms) — This field is the WD response WINDOW 2 duration set in the
WDT_WIN2_CFG register (the GUI default is 17.6 ms).
Set Watchdog Settings — Whenever the watchdog timing is changed, click this button to update the
WD_WIN1_CFG and WD_WIN2_CFG registers with the set timing values and to also sync the
MCU timings again.
Read Window Durations — Click this button to read back the values of the WD_WIN1_CFG and
WD_WIN2_CFG registers and update the timing values in the Window1 Duration (ms) and
Window2 Duration (ms) fields.

WD Response WINDOW 1
Programmed through the WDT_WIN1_CFG register
(0.55 ms to 140.8 ms in 0.55-ms steps)
WD Response WINDOW 2
Programmed through the WDT_WIN2_CFG register
(0.55 ms to 17.6 ms in 0.55-ms steps)
Three correct SPI WD question responses must be scheduled in this interval, in the correct
order:
After the tWD_RESP_WIN1 time elapses, the WD response WINDOW 2 begins.
Responses (answers) are written to the WDT_ANSWER register.
The SPI WD question- response sequence order is important.
The final correct SPI-WD question response
(WD_ANSWER_RESP_0) must be scheduled in this time
interval.
After the last correct SPI-WD answer response, the next
WD question is generated within 1 system clock cycle
(typically 125 ns), after which the next WD response
WINDOW 1 (Q&A+1) starts
WD_ANSWER_
RESP_3
WD_ANSWER_
RESP_2
WD_ANSWER_
RESP_1
WD_ANSWER_
RESP_0
SPI WD Question Sequence Responses(2)
WD Question Response Sequence
WD Question
Request
RD_WD_
QUESTION
SPI Question
Required(1)
SPI
Commands
NCS pin
1 internal system clock cycle (125 ns)
to generate a new WD question for Q&A+1
Q&A [n] Q&A [n + 1]
tWD_RESP_WIN1 + tWD_RESP_WIN2
x WD_ANSWER_RESP_3
x WD_ANSWER_RESP_2
x WD_ANSWER_RESP_1
Answer0 to
Question
Question to
Answer3
Answer3 to
Answer2
Answer2 to
Answer1
Answer1 to
Answer0
WINDOW 1 Duration WINDOW 2 Duration
www.ti.com TPS65313 GUI
9
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 5. Watchdog Window Timing Diagram
Section 11 describes the watchdog implementation on the MSP430™ MCU on the EVM.
6.1.7 MCU Error Signal Monitor (ESM)
The MCU error monitoring function is implemented in the GUI to check the functionality of MCU_ERR pin.
Both PWM mode and TMS570 mode of error monitoring is implemented on the GUI. Each setting is
described as follows:
TMS570 Mode button — This option reads the register values and populates the corresponding text field
with the corresponding low and high periods.
Write MCU Error Window Registers button — When enabled, the timing thresholds set in the text field
are written to the corresponding device timing registers (PWM_LMAX, PWM_LMIN, PWM_HMAX,
PWM_HMIN).
Enable PWM Output button — The Low Duration,High Duration, and the Enable PWM Output options
turn on the clock with those periods on the MCU GPIO connected to the MCU_ERR pin. Jumper
J11 must be set between pin 2 and pin 3 for this signal to be applied to the device pin.
MCU Error Window Register Values fields — This option reads the timing register values and
populates the corresponding text field with the corresponding low and high periods.
The ESM is disabled by default, and can be activated by setting the MCU_ESM_EN bit to 1b in the
SAFETY_CHECK_CTRL SPI register.
6.1.8 SPI Status Bits
The SPI status flag response byte of the device is displayed in this section of the Device Controls page.
For more information, refer to the TPS65313-Q1 Wide-VIN Power-Management IC for Automotive
Applications datasheet.

TPS65313 GUI www.ti.com
10 SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
6.1.9 Moniter ENDRV and NRES Button
If this button is turned on, the color of the ENDRV and NRES indicator on the GUI indicates the status of
these pins if jumpers are installed between J7_1_2 and J8_1_2. A dark green color indicates a low on
these pins and a light green color indicates a high on these two pins. The ENDRV and NRES pins are the
device safety pins. To activate these pins, refer to theTPS65313-Q1 Wide-VIN Power-Management IC for
Automotive Applications datasheet.
6.2 Register Map Page
All SPI registers can be read or written on the Register Map page. Figure 6 shows a snapshot of GUI
Register Map page.
1. Update Mode drop-down menu — With the Immediate option, changes are immediately written to the
device. With the Deferred option, changes are made only when the write register button is clicked. This
option is the preferred option to have better control on the writes that are performed.
2. Write selected — This option writes only the selected register.
3. Write modified — This option writes all registers that have been changed since the last write.
4. Read selected — This option reads only the selected register and updates the contents with the
register value.
5. Read all — This option reads all the SPI registers and updates the contents with the register value.
6. Field view section — This section provides the individual register description.
Figure 6. Updated Figure 6. TPS65313 GUI Register Map Page TPS65313 GUI Register Map Page

www.ti.com TPS65313 GUI
11
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
6.3 EEPROM Programming Page
The TPS65313-Q1 device has many factory programmable device options with unique orderable part
numbers. By default, the TPS65313-EVM has a device with the O31310QRWGRQ1 orderable part
number. If users want to evaluate different device options (or orderable part numbers), the EEPROM
configuration can be updated using this page as shown in Figure 7. Not all the device options samples are
readily available or it may be possible to have a device configuration which is not listed here. Contact TI
local sales team for sample availability and feasibility.
Keep the VBAT supply voltage between 10 V and 18 V while updating the device options or orderable part
number. All the jumpers should be set according to Figure 8. For a list of orderable part numbers, refer to
the TPS65313-Q1 Wide-VIN Power-Management IC for Automotive Applications datasheet.To select an
orderable part number in the GUI, click the Device Selection drop-down menu. Then click the Program
EEPROM button. If the orderable part number is successfully updated, a message is displayed to power
off and power on the device to make the changes effective. Once EEPROM Programming is completed
successfully, bring the jumper settings back to its original settings specified in Table 2TPS65313-EVM
Jumper Settings as in EEPROM Programming mode, device may get damaged if VBAT voltage is more
than 18 V.
Device output voltages are accurately trimmed at the factory for the O31310QRWGRQ1 orderable part
number only. Output voltage accuracy can be affected slightly for other device options generated using
the GUI EEPROM programming method. However, if the user orders device samples according to the
device options table in the data sheet, these devices will be correctly trimmed at the factory to have best
output voltage accuracy.
Figure 7. TPS65313 GUI EEPROM Programming Page

Output Current (A)
Efficiency (%)
0.1 0.6 1.1 1.6 2.1 2.6 3.1
30
35
40
45
50
55
60
65
70
75
80
85
D001
VBUCK1 = 3.3 V
VBUCK1 = 3.6 V
Output Current (A)
Efficiency (%)
0 0.5 1 1.5 2
74
76
78
80
82
84
86
88
90
92
94
96
D002
VBUCK2 = 1.2V_3.3VIN
VBUCK2 = 1.8V_3.3VIN
VBUCK2 = 2.3V_3.3VIN
VBUCK2 = 1.2V_3.6VIN
VBUCK2 = 1.8V_3.6VIN
VBUCK2 = 2.3V_3.6VIN
TPS65313-EVM Typical Plots www.ti.com
12 SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 8. Jumper Settings for EEPROM Update
7 TPS65313-EVM Typical Plots
This section provides plots for efficiency, start up, power down, ripple voltage, load transient response,
and stability. All the plots were taken with 13-V at the VIN pin, one EVM, room temperature, with the
BUCK1 output connected as the supply for the BUCK2 regulator and BOOST converter.
7.1 Efficiency Plots
The total current in to the VIN, AVIN, and VIN_SAFE pins was
considered for this plot with the EXTSUP supply connected to the
BOOST converter.
Figure 9. BUCK1 Efficiency Plot for VIN = 13 V Figure 10. BUCK2 Efficiency Plot

Output Current
Efficiency (%)
0.1 0.2 0.3 0.4 0.5 0.6
88
89
90
91
92
93
94
95
D003
VIN_BOOST = 3.3 V
VIN_BOOST = 3.6 V
www.ti.com TPS65313-EVM Typical Plots
13
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 11. BOOST Efficiency Plot
7.2 Power-Up Plots
Figure 12. Power Up Showing Regulator Outputs and
VREG Figure 13. Power Up Showing Regulator Outputs and
WAKE
Figure 14. Regulators Start-Up showing NRES with short
NRES extension delay Figure 15. Regulators Start-Up showing NRES with long NRES extension delay

TPS65313-EVM Typical Plots www.ti.com
14 SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
7.3 Power-Down Plots
Figure 16. Power Down Showing Regulator Outputs and
VREG Figure 17. Power Down Showing Regulator Outputs and VIN
7.4 Ripple Voltage Plots
All the ripple measurements were done with a 20-MHz bandwidth differential active probe. The ripple was
measured directly across the output capacitor.
Figure 18. BUCK1 Ripple Voltage With 3-A Load Current
for 3.3-V Output Voltage Figure 19. BUCK1 Ripple Voltage With 3-A Load Current
for 3.6-V Output Voltage

www.ti.com TPS65313-EVM Typical Plots
15
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 20. BUCK2 Ripple Voltage With 2-A Load Current
for 1.2-V Output Voltage Figure 21. BUCK2 Ripple Voltage With 2-A Load Current for 1.8-V Output Voltage
Figure 22. BUCK2 Ripple Voltage With 2-A Load Current
for 2.3-V Output Voltage Figure 23. BOOST Ripple Voltage With 0.6-A Load Current
7.5 Load Transient Plots
Figure 24. BUCK1 Load Transient With Maximum Load
Current for 3.3-V Output Voltage Figure 25. BUCK1 Load Transient With Maximum Load Current for 3.6-V Output Voltage

TPS65313-EVM Typical Plots www.ti.com
16 SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 26. BUCK2 Load Transient With Maximum Load
Current for 1.2-V Output Voltage Figure 27. BUCK2 Load Transient With Maximum Load Current for 1.8-V Output Voltage
Figure 28. BUCK2 Load Transient With Maximum Load
Current for 2.3-V Output Voltage Figure 29. BOOST Load Transient With Maximum Load Current
7.6 Stability Measurements
Figure 30. BUCK1 Gain and Phase Plot With 1-A Load Current for VIN = 13 V
(Phase Margin ≈50 Degree, Bandwidth > 100 kHz)

www.ti.com TPS65313-EVM Typical Plots
17
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 31. BUCK2 Gain and Phase Plot With 1-A Load Current for VIN = 3.3 V
(Phase Margin >50 Degree, Bandwidth ≈75 kHz)
Figure 32. BOOST Gain and Phase Plot With 0.3-A Load Current for VIN = 3.3 V
(Phase Margin >80 Degree, Bandwidth ≈20 kHz)

1
2
3
J15
VBOOST
EXT_SUP
1
2
3
4
S2
1.00k
R5
VBAT_INT
1
2
3
J20
WAKE
1
2
3
J10
1 2
3 4
5 6
7 8
9 10
J6
VIO
VBUCK1
VBUCK2
VBOOST
+5V_EXT
GPIO2/SPI(SCLK)
SPI(SCLK) 1
2
3
J16
GPIO4/SPI(SIMO)/UART(TXD)
SPI(SDI) 1
2
3
J18
GPIO5/SPI(SOMI)/UART(RXD)
SPI(SDO) 1
2
3
J17
DIAG_OUT(GPIO9)
GPIO6/PWM1/SPI(CS)
SPI(CSN)
DIAG_OUT
1
2
3
J12
1
2
3
J9
GPIO10(ENDRV)
1
2
3
J8
GPIO03(NRES)
1
2
3
J7
10.0k
R20
DNP
NRES
10.0k
R19
10.0k DNP
R18
10.0k DNP
R17
DNP
VIO
SYNC_IN
1
2
3
J11
MCU_ERR
GPIO7(MCU_ERR)
ENDRV/IRQ
SYNC_IN(GPIO12)
NT3
Net-Tie
GND
NT5
Net-Tie
1 2
3 4
5 6
7 8
9 10
J5
VBUCK1
VSUP2
VSUP2
VSUP3
VSUP3
NT1
Net-Tie
PGND
AGND1 AGND1
WAKE_USB
GND
GND
GND
0.1uF
C46
GND
PGND
NT2
Net-Tie
GND
NT4
Net-Tie
PGND
604k
R21
604k
DNP R22
604k
DNP R23 DNP
VBAT
PGND
PGND
PGND
TP10
TP9
VBAT_INT
PGND
PGND
60V
D2
VBAT
GND
PGND PGND
NRES 100
R6 NRES_1
TP11
1.00k
R7
0.1uF
C44 39.0k
R10
PGND
WAKE
SPI(CSN) 100
R65 NCS
SPI(SCLK) 100
R63 SCK
SPI(SDO) 100
R66 SDO
SPI(SDI) 100
R64 SDI
100
R8 ENDRV
ENDRV/IRQ
DIAG_OUT 100
R9 DIAG_OUT_1
SYNC_IN 100
R11 SYNC_IN_1
MCU_ERR 100
R12 MCU_ERROR
PGNDPGND
EXT_SUP
AGND1
0.1uF
C40
2.2uF
C43 AGND1
VREG
VIN
VBUCK1
VBUCK2
0.1uF
C17
0.1uF
C13
0.01uF
C68
DNP
2.2uH
L3
VSUP2
10
R58
10
DNP
R55
DNP
PGND
VBUCK1
PGND
VBUCK2
PGND
PGND
PGND
47uF
C1
47uF
C6
PGND
PGND
PGND
TP6
TP8
TP7
TP1
BOOT1
PH1
VSENSE1
BOOT2
PH2
VSENSE2
49.9
R53
49.9
R54
0.01uF
C69
DNP
PGND
VSUP3
VBOOST
0.1uF
C38
0.01uF
C75
DNP
0.1uF
C37
10
R61
DNP
BOOST
PGND
PGND
PGND
PGND
TP16
TP15
BOOT3
PH3
VSENSE3
1.5uH
L8
49.9
R62
47uF
C45
PGND
AGND1
PGND
PGND
VBAT_INT
0.1uF
C72
AGND1
0
R59 VIN_SAFE
VIN_SAFE
0
R3
2.2uF
C35
AGND1
AVIN
VBAT_INT AVIN
1
2
3
J13
1
2
3
J14
VIO
EXT_SENSE1 EXT_SENSE2
PGND
PGND
40V
D7
DNP
CLK_555
CLK_555
1uH
L4
4.7uH
L5
PGND
PGND
PGND
VIO
0.1uF
C41
PGND
VIO
TP12
PGND
100 ohm
L6
100 ohm
L7
4.7uF
C22
4.7uF
C32
22uF
C2
22uF
C7
10uF
C11
22uF
C10
10uF
C16
22uF
C12
22uF
C42
22uF
C39
100 ohm
L1
10uF
C3
PGND
PGND
VBUCK1
PGND
PGND
PGND
VBUCK1
PGND
100 ohm
L2
10uF
C4
VBUCK2
PGND
10uF
C5
PGND
VBOOST
VBUCK1_EXT
VBUCK2_EXT
VBOOST_EXT
1
2
J1
1
2
J3
1
2
J2
10uF
C36
40V
D8
DNP
PGND
0.1uF
C48
0.1uF
C47
0.1uF
C73
1
2
J4
0.1uF
C27
4700pF
C28
0.1uF
C20
4700pF
C29
4700pF
C30
0
R1
0.1uF
C34
0.1uF
C33
0.1uF
C26
4700pF
C14
4700pF
C8
4700pF
C15
4700pF
C9
1uF
C25
4.7uF
C21
PGND
PGND
0
R56
0
R57
0
R60
0
R4
68uF
C18
4.7uF
C23
0.1uF
C81
1000pF
C82
1000pF
C83
PGND
4.7uF
C24
4.7uF
C31
0
R67
0
R68
PGND
AGND1
AGND1
0
R2
4.7uF
C19
68.1k
R13
13.0k
R15
13.0k
R14
68.1k
R16
28V
D1
DNP
1uF C80
1.2nF
C74
1.2nF
C71
1.2nF
C70
1uF C79
PGND
6V to 18V
AGND 6
VIN
2
BOOT1 39
BOOT2 31
BOOT3 25
PBKG 1
DGND 27
DIAG_OUT
9
ENDRV/IRQ
8
EP 41
EXTSUP 18
EXT_VSENSE1
19
EXT_VSENSE2
20
MCU_ERR
11
NRES
7PGND1 35
PGND1A 36
PGND2 32
PGND3 26
PH1 37
PH1A 38
PH2 29
PH3 24
SCK
15
SDI
14
SDO
16
SYNC_IN
10 VBOOST 23
AVIN
3
VIN_SAFE
4
VIO
12
VREG 17
VSENSE1 34
VSENSE2 33
VSENSE3 21
VSUP2 28
WAKE
5
PBKG 22
PBKG 30
PBKG 40
NCS
13
O31310QRWGRQ1
U1
TPS65313-EVM Schematic Diagram www.ti.com
18 SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
8 TPS65313-EVM Schematic Diagram
Figure 33. TPS65313-EVM: TPS65313-Q1 Device External Circuit Schematic

+3.3V
GPIO11
GPIO10(ENDRV)
GND
+3.3V
GND
DP
PUR
DM
VBUS
VUSB
V18
GPIO1
GPIO0
SDABRD
SCLBRD
+3.3V
EXT_SENSE1(GPIO13)
I2CPU
EXT5V_EN
EXT5V_FAULT
EXT3.3V_EN
EXT3.3V_FAULT
AIN_B_0
AIN_B_1
DIAG_OUT(GPIO9)
WAKE(GPIO8)
30pF
C52
30pF
C51
2200pF
C59
GND
33k
R34
0.1uF
C77
0.1uF
C62
GND
0.1uF
C78
GND
GND
GND
GND
200
R40
12
34
56
78
910
1112
1314
J24
0.47uF
C63
50V
1
23
Q2
MOSFET_N_D3G1S2
GND
Reserved (p2.6)
Reserved (p2.5)
Reserved (p2.3)
GPIO2/SPI(SCLK)
GPIO4/SPI(SIMO)/UART(TXD)
GPIO5/SPI(SOMI)/UART(RXD)
GPIO6/PWM1/SPI(CS)
GPIO7(MCU_ERR)
GPIO03(NRES)
SYNC_IN(GPIO12)
EXT_SENSE2(GPIO14/PWM5)
+3V3
12
Y1
XT2OUT
XT2IN
P6.4/CB4/A4
1P6.5/CB5/A5
2P6.6/CB6/A6
3P6.7/CB7/A7
4
P7.0/CB8/A12 5
P7.1/CB9/A13 6
P7.2/CB10/A14 7
P7.3/CB11/A15 8
P5.0/A8/VREF+/VEREF+ 9
P5.1/A9/VREF-/VEREF- 10
AVCC1 11
P5.4/XIN 12
P5.5/XOUT 13
AVSS1
14
P8.0
15 P8.1
16 P8.2
17
DVCC1 18 DVSS1
19
VCORE 20
P1.0/TA0CLK/ACLK 21
P1.1/TA0.0 22
P1.2/TA0.1 23
P1.3/TA0.2 24
P1.4/TA0.3 25
P1.5/TA0.4 26
P1.6/TA1CLK/CBOUT 27
P1.7/TA1.0 28
P2.0/TA1.1
29 P2.1/TA1.2
30 P2.2/TA2CLK/SMCLK
31 P2.3/TA2.0
32 P2.4/TA2.1
33 P2.5/TA2.2
34 P2.6/RTCCLK/DMAE0
35 P2.7/UCB0STE/UCA0CLK
36
P3.0/UCB0SIMO/UCB0SDA 37
P3.1/UCB0SOMI/UCB0SCL 38
P3.2/UCB0CLK/UCA0STE 39
P3.3/UCA0TXD/UCA0SIMO 40
P3.4/UCA0RXD/UCA0SOMI 41
P3.5/TB0.5 42
P3.6/TB0.6 43
P3.7/TB0OUTH/SVMOUT 44
P4.0/PM_UCB1STE/PM_UCA1CLK
45 P4.1/PM_UCB1SIMO/PM_UCB1SDA
46 P4.2/PM_UCB1SOMI/PM_UCB1SCL
47 P4.3/PM_UCB1CLK/PM_UCA1STE
48
DVSS2
49 DVCC2 50
P4.4/PM_UCA1TXD/PM_UCA1SIMO
51 P4.5/PM_UCA1RXD/PM_UCA1SOMI
52 P4.6/PM_NONE
53 P4.7/PM_NONE
54
P5.6/TB0.0 55
P5.7/TB0.1 56
P7.4/TB0.2 57
P7.5/TB0.3 58
P7.6/TB0.4 59
P7.7/TB0CLK/MCLK 60
VSSU
61
PU.0/DP
62
PUR
63
PU.1/DM
64
VBUS 65
VUSB 66
V18 67
AVSS2
68
P5.2/XT2IN 69
P5.3/XT2OUT 70
TEST/SBWTCK
71
PJ.0/TDO
72 PJ.1/TDI/TCLK
73 PJ.2/TMS
74 PJ.3/TCK
75
RST/NMI/SBWTDIO
76
P6.0/CB0/A0
77 P6.1/CB1/A1
78 P6.2/CB2/A2
79 P6.3/CB3/A3
80
U5
TI-MSP430F552X_A-PN80
Green
2V
1
2
D6
1
2
J29
GND
VCORE
www.ti.com TPS65313-EVM Schematic Diagram
19
SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 34. TPS65313-EVM: MSP430™ USB2ANY MCU Circuit Schematic

GND
GND
GND
GND
GND
GND
GND GND
GND
GND
+3.3V
GND GND
GND
EXT5V_FAULT
EXT3.3V_FAULT
EXT5V_EN
EXT3.3V_EN
VBUS
V18
GND
GND
220pF
C76
GND
1uF
C53
1uF
C49
130k
R33
100k
R35
TP19
+5V_EXT
+3.3V_EXT
TP20 TP18
7.5V
D3
90 ohm
90 ohm
FB1
0.01uF
C54
2.2uF
C55
TP17
100k
R31
160k
R29
Alternate Functions for GPIO pins:
--------------------------------------------------------------
GPIO0 - I2C:SDA
GPIO1 - I2C:SCL
GPIO2 - SPI:SCLK, EasyScale:DOUT, uWire:SCLK
GPIO3 - PWM2, INT0
GPIO4 - SPI:MOSI, UART:TXD, uWIRE:MOSI
GPIO5 - SPI:MISO, UART:RXD,uWIRE:MISO
GPIO6 - PWM1, OW1, SPI:CS
GPIO7 - PWM0, OW2, INT2
GPIO8 - ADC3
GPIO9 - ADC2, EasyScale:AIN
GPIO10 - VEREF-
GPIO11 - VEREF+
GPIO12 - FEC, CLOCK, INT3
GPIO13 - PWM3
+5V_EXT
GPIO14/PWM5
1
2
3
J19
GPIO13
+3V3
IN
1
GND 2 EN
3
FAULT
4ILIM 5
OUT 6
U4
TPS2553DBV-Q1
IN
1
GND 2 EN
3
FAULT
4ILIM 5
OUT 6
U2
TPS2553DBV-Q1
OUT 1
NC
2
NR 3
GND 4
EN
5
NC
6
NC
7
IN
8
PAD 9
U3
TPS735xxDRB
1
2
J21
VBAT_INT
100k
R24
100k
R25
10k
R26
3
5
4
Q1A
BC 846PN H6327
6
2
1
Q1B
BC 846PN H6327
GND
WAKE(GPIO8) WAKE_USB
VBUS_IN
GND GND
VBUS_IN
3.3V
1
2
J27
VBAT_INT
100k
R43
100k
R47
10k
R44
3
5
4
Q3A
BC 846PN H6327
6
2
1
Q3B
BC 846PN H6327
GND
EXT_SENSE1(GPIO13) EXT_SENSE1
1
2
J28
VBAT_INT
100k
R45
100k
R48
10k
R46
3
5
4
Q4A
BC 846PN H6327
6
2
1
Q4B
BC 846PN H6327
GND
EXT_SENSE2(GPIO14/PWM5)
EXT_SENSE2
10k
R49
220pF
C66
220pF
C67
10k
R51
9.1V
D4
9.1V
D5
100k
R28
VBUS
DM
DP
PUR
VUSB
GND
GND
GND
GND
GND
8 9
VBUS 1
GND 5
6 7
D- 2
D+ 3
ID 4
J26
33k
R42
33
R37
33
R38
10uF
C64
1.5k
R39
220pF
C65
41
32
S1
DNP
1 2
J25
1uF
C60
0.1uF
C58
GND
VIO
1
2
3
J22
+5V_EXT
0.1uF
C50
100 ohm
L9
CLK_555
10.0k
R36
1.00k
R30
1.00k
R32
1
2
J23
CLK_WD
GND
1.00k
R27
1.00k
R50
1.00k
R52
GND
GND
68pF
C56
150nF
C57
22uF
C61
IO1 1
IO2 2
GND
3
IO3
4IO4
5
VCC 6
U6
TI-TPD4E004-SON_DRY-6
GND
1TRIG 2
OUT
3
RESET 4
CVOLT
5THRESH 6
DISCH 7
V+ 8
LMC555IM/NOPB
U7
1.0M
R41
TPS65313-EVM Schematic Diagram www.ti.com
20 SLDU028A–January 2018–Revised March 2020
Submit Documentation Feedback
Copyright © 2018–2020, Texas Instruments Incorporated
TPS65313-EVM User’s Guide
Figure 35. TPS65313-EVM: USB2ANY Power and Control Circuit Schematic