Texas Instruments TPS769 Series User manual

TPS769xx
SOT-23 LDO Linear Regulator
Evaluation Module
February 2000 Mixed-Signal Products
User’s Guide
SLVU024

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Copyright 2000, Texas Instruments Incorporated

iii
Chapter Title—Attribute Reference
Preface
Related Documentation From Texas Instruments
J TPS76901, TPS76912, TPS76915, TPS76918, TPS76925,
TPS76927, TPS76928, TPS76930, TPS76933, TPS76950 Ultra
Low-Power 100-mA Low-Dropout Linear Regulators (TI
Literature Number SLVS203) provides detailed information on the
TPS769xx family of devices.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
testedforcompliancewiththelimitsofcomputingdevicespursuanttosubpart
Jofpart 15ofFCCrules,which aredesignedtoprovidereasonableprotection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.

iv

Running Title—Attribute Reference
v
Contents
Contents
1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Introduction 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Output Voltages Greater Than VREF 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Output Voltages Less Than VREF 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Fixed Voltage Options 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Board Layers and Assembly Drawings 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Board Layers 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Assembly Drawings 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Testing 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Testing 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Test Setup 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures
1–1 Schematic Diagram (TPS76901EVM-127, VO= 1 V) 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 Fixed Voltage Version of the TPS769xxEVM–127 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 Top Layer 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 Top Silk Screen 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 Bottom Layer (Top View) 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–4 Bottom Silk Screen (Top View) 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–5 Drill Drawing and Drill Table 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–6 Top Assembly 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–7 Bottom Assembly (Bottom View) 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Load Regulation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 Quiescent Current vs Output Current 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 Line Regulation 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–4 Quiescent Current vs Output Current 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–5 Line Regulation from 2.7 V 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1–1 Resistor Values 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Bill Of Materials 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

vi

1-1
Introduction
Introduction
The TPS76901EVM–127, the TPS76918EVM-127, and the
TPS76933EVM-127 LDO regulator modules provide the user with cost-effec-
tivesolutionsforprovidingpowertovariouslow-voltageoptions.TheseEVMs
arepin-compatiblewithstandard3-terminaltyperegulators.TheEVMsareset
up as 1-V, 1.8-V, and 3.3-V output at 100 mA. Various options can be imple-
mented with the board to give a range of output voltages from 0 to 5.5 V.
Topic Page
1.1 Introduction 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Output Voltages Greater Than VREF 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Output Voltages Less Than VREF 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Fixed Voltage Options 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Introduction
1-2
Introduction
1.1 Introduction
Low cost and simplicity of design make LDO regulators popular solutions in
low-power step-down applications where lack of isolation from the input
source is not a concern.
Applications of the EVM include single DSP C5400 device, digital camera,
medical test equipment, cell phones, consumer audio equipment, and battery
backup electronics.
Figure 1–1 shows the schematic of the TPS76901EVM-127 configured for a
1-V output. The TPS76933EVM–127 (3.3 V) schematic is shown in
Figure1–2.TheLDOutilizesaPMOSpasselement,whichreducesthedevice
quiescientcurrent to 28 µA (max). Otherfeatures of the PMOSLDO is the low
dropoutvoltageof71mV(typ),thermalprotection,overcurrentlimit,and 2 µA
shutdown quiescient current.
Figure 1–1.Schematic Diagram (TPS76901EVM-127, V
O
= 1 V)
J2
GND
R2/C2
0
C1
TL431CPK
U2
R1
Open
R5
J1
IN
(3 – 6 V)
C4
C3
+
Vfb
R6
R3
J3 OUT
Back-side
Components
R4
Open
4
5
EN
GND
IN
1
2
3
OUT
NC/FB
U1
TPS76901
1.3 kΩ
0.001 µF
VREF = 2.495 V
IREF
130 kΩ
1 µF4.7 µF
19.1 kΩ
The basic functionality of the EVM is to provide output voltages of 0 V to
5.5 V.
By means of external resistors and a voltage reference (R1–R6 and U1), the
output voltage is adjusted to provide an output voltage that is either above or
below the TPS76901 nominal, internal reference voltage of 1.224 V (VFB).

Output Voltages Greater Than V
REF
1-3
Introduction
1.2 Output Voltages Greater Than VREF
Forapplicationsrequiringanoutputvoltagegreaterthantheinternalreference
voltage (VFB) of 1.224 V, a standard linear regulator circuit with an external
voltage divider is all that is necessary. The lower section of Figure 1 shows a
generic linear regulator circuit with an input capacitor (C1), output capacitor
(C3), external voltage divider (R3/R4), and the enable circuit with either a
pullupresistor(R1)orpulldownresistor(R2)asrequired.Noneofthebackside
components are required for this application. If a delayed enabled is desired,
theR1andR2/C2 componentpadscanbeusedfor anRCcircuit.Whenusing
the TPS76918EVM–127 or the TPS76933EVM–127, the external divider is
notrequiredandR3isa0-ΩresistorusedtoconnectthesenseterminaltoVO.
When using the TPS76901EVM–127 (adjustable output voltage), it is recom-
mended that the divider current (IREF) be set to 7 µA. Choosing R4 to be
169 kΩand calculating R3 for VOaccomplishes this.
R3 +ǒ
VO
VFB
* 1
Ǔ
R4 (1)
Where:
VFB = 1.224 V
R4 = 169 kΩ
Then R3
+ǒ
138.07 VO
Ǔ*
169 kΩ
Lowervalueresistors can be usedbutarenot as power efficient. Higher value
resistors should be avoided due to leakage currents at FB increasing the out-
putvoltage error. Table 1–1 showsvarious voltage optionsand the suggested
resistor values.
Table 1–1.Resistor Values
OUTPUT VOLTAGE
(V)
DIVIDER RESISTANCE
(kΩ)
(V)
R3 R4
2.5 174 169
3.3 287 169
3.6 324 169
4.0 383 169
5.0 523 169

Output Voltages Less Than V
REF
1-4
Introduction
1.3 Output Voltages Less Than VREF
Applications requiring a lower output voltage than the internal reference volt-
age needs additional circuitry. The backside components shown in the upper
sectionof figure 1along with the deletion of R4 willimplement this option.The
backsidecomponents function asa second (butfixed) voltage sourceto artifi-
cially increase the voltage at the feedback terminal, thus requiring less output
voltage to satisfy the error amplifier. The two voltage sources are summed at
the error amplifier input node and compared to the internal reference voltage
of 1.224 V. The contribution of the TL431 reference is:
VA +
R3
R3 ) R6
VREF +
R3
R3 ) R6
2.495 V
The contribution of the output voltage is:
VB +
R6
R3 ) R6
VO
The total feedback voltage at VFB then is the sum of the two previous equa-
tions:
VFB + VA ) VB +ǒ
R3
R3 ) R6
2.495
Ǔ)ǒ
R6
R3 ) R6
VO
Ǔ
Selecting R6 = 130 kΩand solving for R3 yields:
R3 +ǒ
VFB * VO
Ǔ
ǒ
VREF * VFB
Ǔ
R6 + 125.19 *ǒ 102.28 VO
Ǔ
kΩ
Thiscircuitcanonlyworkdownto0Vdueto the lack of a negative supplyvolt-
age.Theaccuracyofthe output voltage is determined bytheaccuracyof both
regulators, but since the load for the TL431 portion of the circuit is constant,
only its line regulation and drift are important to the output voltage accuracy.
Additionalfeaturesinclude adelayedenablebyplacinga capacitorforC2and
calculating R1 and C2 for an RC circuit. If no delayed enable is needed, then
place a zero ohm resistor for R2 since the enable pin is active low. (note that
C2 and R2 share the same component location).

Fixed Voltage Options
1-5
Introduction
1.4 Fixed Voltage Options
The TPS76918EVM–127 (Vout = 1.8 V) and the TPS76933EVM–127 (Vout = 3.3 V)
fixed voltage options are also available. Both of these EVMs use only 4 components
(see Figure 1–2) and can be used as a three terminal regulator.
Figure 1–2.Fixed Voltage Version of the TPS769xxEVM–127
J2
GND
R2/C2
0
C1
1.0 F
R1
Open
J1
IN
(3 – 6 V)
C3
4.7 F
+
Vfb
R3
0
J3 OUT
R4
Open
4
5
EN
GND
IN
1
2
3
OUT
NC/FB
U1
TPS769XX
µµ
IREF
Refer to SLVA071 application brief and TPS76901 datasheet for additional
information.

1-6
Introduction

2-1
Board Layers and Assembly Drawings
Board Layers and Assembly Drawings
Thischaptershows theboardlayersandassemblydrawingsoftheTPS769xx
EVM.
Topic Page
2.1 Board Layers 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Assembly Drawings 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

Board Layers
2-2
Board Layers and Assembly Drawings
2.1 Board Layers
Figure 2–1.Top Layer
Figure 2–2.Top Silk Screen

Board Layers
2-3
Board Layers and Assembly Drawings
Figure 2–3.Bottom Layer (Top View)
Figure 2–4.Bottom Silk Screen (Top View)

Board Layers
2-4
Board Layers and Assembly Drawings
Figure 2–5.Drill Drawing and Drill Table

Assembly Drawings
2-5
Board Layers and Assembly Drawings
2.2 Assembly Drawings
Figure 2–6.Top Assembly
Figure 2–7.Bottom Assembly (Bottom View)

2-6
Board Layers and Assembly Drawings

3-1
Testing
Testing
This chapter provides details on testing the TPS76901–EVM–127
Topic Page
3.1 Testing 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3

Testing
3-2
Testing
3.1 Testing
+
–
Power Supply
5-V, 150-mA Supply Load
0 – 100 mA
3.2 Test Setup
Test Procedure (for TPS76901EVM-127, VO= 1 V)
1) Connect test setup as shown in the previous illustration. Set load to zero
current. Set input voltage to 5 V and apply.
2) Verify output voltage is 1.00 V ±50 mV.
3) Adjust load for 100 mA and again verify output voltage is
1.00 V ±50 mV.