Texas Instruments TPS7H4002EVM-CVAL User manual

User’s Guide
TPS7H4002EVM-CVAL Evaluation Module
ABSTRACT
The TPS7H4002EVM-CVAL is the evaluation module (EVM) for the TPS7H4002-SP and provides a platform to
electrically evaluate its features. This user's guide provides details about the EVM, its configuration, schematics,
and BOM.
Figure 1-1. TPS7H4002EVM-CVAL
Table of Contents
1 TPS7H4002EVM-CVAL Overview...........................................................................................................................................3
2 TPS7H4002EVM-CVAL Default Configuration...................................................................................................................... 3
3 TPS7H4002EVM-CVAL Initial Setup...................................................................................................................................... 4
4 TPS7H4002EVM-CVAL Testing.............................................................................................................................................. 5
5 TPS7H4002EVM-CVAL EVM Schematic..............................................................................................................................15
6 TPS7H4002EVM-CVAL Bill of Materials (BOM).................................................................................................................. 16
7 Board Layout.........................................................................................................................................................................18
List of Figures
Figure 1-1. TPS7H4002EVM-CVAL.............................................................................................................................................1
Figure 4-1. Output Voltage Regulation........................................................................................................................................ 5
Figure 4-2. Output Voltage Ripple VIN = 5 V, VOUT = 2.5 V, IOUT = 3 A................................................................................... 6
Figure 4-3. Output Soft Start Voltage, VIN = 5 V, VOUT = 2.5 V, IOUT = 3 A............................................................................. 7
Figure 4-4. Transient Response to Load Step 0 A to 3 A at 1 A/µs.............................................................................................8
Figure 4-5. Transient Response to Load Step 3 A to 0 A at 1 A/µs.............................................................................................9
Figure 4-6. Input Voltage Ripple, VIN = 5 V, VOUT = 2.5 V, IOUT = 3 A...................................................................................10
Figure 4-7. EVM Modification to Measure Frequency Response...............................................................................................11
Figure 4-8. Frequency Response Test Setup............................................................................................................................ 12
Figure 4-9. Frequency Response IOUT = 3 A........................................................................................................................... 12
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Figure 4-10. Frequency Response IOUT = 0 A......................................................................................................................... 13
Figure 4-11. High-Side Current Limiting.....................................................................................................................................14
Figure 5-1. TPS7H4002EVM-CVAL EVM Schematic................................................................................................................ 15
Figure 7-1. Top Overlay............................................................................................................................................................. 18
Figure 7-2. Top Solder............................................................................................................................................................... 18
Figure 7-3. Layer 1 -Top Layer.................................................................................................................................................. 19
Figure 7-4. Layer 2- GND.......................................................................................................................................................... 19
Figure 7-5. Layer Three - Signal................................................................................................................................................20
Figure 7-6. Layer Four -Bottom Layer....................................................................................................................................... 20
Figure 7-7. Bottom Solder..........................................................................................................................................................21
Figure 7-8. Bottom Overlay........................................................................................................................................................21
Figure 7-9. Drill Drawing............................................................................................................................................................ 22
Figure 7-10. Drill Table...............................................................................................................................................................22
Figure 7-11. Board Dimensions................................................................................................................................................. 23
List of Tables
Table 2-1. Default EVM Configuration......................................................................................................................................... 3
Table 3-1. Summary of Connections............................................................................................................................................4
Table 6-1. TPS7H4002EVM-CVAL Bill of Materials (BOM)....................................................................................................... 16
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1 TPS7H4002EVM-CVAL Overview
The TPS7H4002-SP is a radiation hardened, 3-V to 5.5-V, 3-A synchronous step-down converter with integrated
high-side and low-side MOSFETs. High efficiency and efficient usage of space are achieved through low
resistance MOSFETs and a current mode control implementation.
The EVM is configured in a default state to accept a 5-V input but can be modified to disable or change the
undervoltage lock out (UVLO) protection, allowing for any input voltage from 3 V to 5.5 V. The EVM is also
configured for a 2.5-V output at a maximum peak output current of 3 A. Again, the regulated output voltage can
be modified by changing one resistor on the board. The TSP7H4002-SP has a dedicated soft start, enable, and
power good pins providing design flexibility to meet specific application requirements.
1.1 Features
• 0.807-V ±1.5% voltage reference overtemperature, radiation, and line and load regulation
• Adjustable soft start
• Adjustable input enable and undervoltage lockout (UVLO)
• Power good indicator pin
• Maximum output current of 3 A
1.2 Applications
• Point of load regulation
• Supports harsh environment applications
• Space satellite point of load supply for FPGAs, microcontrollers, data converters, and ASICs
• Space satellite payloads
• Radiation hardened applications
2 TPS7H4002EVM-CVAL Default Configuration
Table 2-1 describes the default configuration of the TPS7H4002EVM-CVAL listing the external components that
define the converter design.
Table 2-1. Default EVM Configuration
Parameter Specifications Description
Input power supply 5 V Bound by UVLO enable circuit (R13, R15)
Regulated output voltage 2.5 V R7 (RTOP) = 10 kΩ, R5 (RBOTTOM) = 4.7 kΩ
LOUT 2.2 µH Chosen to meet inductor ripple current of 40% (Kind = 0.4)
COUT 330 µF
Chosen for (1) ESR = 6 mΩ to set output voltage ripple;
(2) value used during single event effects testing ensuring regulation maintained
with single event upset to switching
Output current 0 to 3 A By design
Switching frequency 500 kHz Set by R10 (RT) = 95.3 kΩ
Soft start time constant ≈ 3.2 ms Set by C1 (Css) = 10 nF
UVLO enable rising ≈ 4.432 V Set by R13 = 10 kΩ and R15 = 3.4 kΩ
UVLO enable falling ≈ 4.284 V Set by R13 = 10 kΩ and R15 = 3.4 kΩ
Loop bandwidth ≈ 30 kHz
Set by operational transconductance amplifier (OTA) compensation circuit: R14
(RCOMP) = 11.8 kΩ, C14 (CCOMP) = 22 nF, C6 (CHF) = 22 pF
Loop phase margin ≈ 60°
Gain margin ≈ –25 dB
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3 TPS7H4002EVM-CVAL Initial Setup
This section provides the test instruments required and the connections to the EVM.
1. Input DC power supply
a. Set for 5-V DC, 3-A current limit.
b. Connect the positive output of the DC supply to connector J2 (PVIN) and the negative terminal of the
supply to connector J5 for ground.
Note
For more precise measurements, eliminating the IR voltage drop in the input cables is
achieved by using a power supply source with sensing ports and connecting between TP6
to PVIN and TP23 to GND.
2. DC electronic load
a. Connect the positive DC input to connector J8 (VOUT) using a 16-AWG wire.
Note
Wire to the e-load should include at least some part in which the wire gauge can be strapped
by the oscilloscope current probe. This will eliminate the need for a setup change to when
making transient measurements.
b. Connect the negative DC input of e-load to connector J7 (GND) using a 16-AWG wire.
c. Connect voltage monitoring sensing ports of e-load across test points TP17 (VOUT) and TP26 (GND). A
voltage meter can be used to monitor this voltage also.
3. Oscilloscope
a. CH1 - Connect the voltage scope probe to scope probe test point J4 (PH) to monitor the phase node.
DC coupled, Full BW, 2 V/div, Rising Edge Trigger at 0.5 V.
b. CH2 - Connect voltage scope probe to scope probe test point J9 (VOUT) to monitor the output voltage.
AC coupled, BW = 20 MHz, 10 mV/div.
c. CH3 - Connect current scope probe to monitor current through wire connecting J8 (VOUT) and e-load. 5
A/div
Note
Only required for transient load testing
Table 3-1. Summary of Connections
Reference
Designator Silkscreen Function
J2,
J5 PVIN Input power: J2 = 5 V, J5 = GND (Vsupply)
J8,
J7 VOUT Output current: J8 = VOUT J7 = GND, pin 2 = VOUT ≈ 1 V (e-load)
J6 PH4 Phase switching node scope probe test point (Scope CH-1)
J9 VOUT VOUT scope probe test point (Scope CH-2)
TP17 VOUT VOUT test point (e-load monitor)
TP6 PVIN PVIN test point (Vsupply_sense)
TP18, TP23 GND GND test points ( e-load monitor, Vsupply_sense)
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4 TPS7H4002EVM-CVAL Testing
The following tests are described in subsequent sections:
1. Output voltage regulation
2. Output voltage ripple
3. Soft start-up
4. Transient response to positive/negative load step (0 A to 3 A to 0 A)
5. Input voltage ripple
6. Loop frequency response
7. Current limiting
4.1 Output Voltage Regulation
• Turn on the input DC source (5 V)
• Turn on the e-load and sweep the load current from 0 A to 3 A, or higher to observe the margin the device
has to the recommended operating condition of 3-A maximum. The monitored output voltage at TP17 (VOUT)
is at or near 2.5 V across the entire current load sweep as shown in Figure 4-1.
Figure 4-1. Output Voltage Regulation
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4.2 Output Voltage Ripple
Display CH1 (PH1) and CH2 (VOUT1) [AC coupled, BW = 20 MHz] on the oscilloscope to monitor the switching
phase node and the output voltage ripple as shown in Figure 4-2.
Figure 4-2. Output Voltage Ripple VIN = 5 V, VOUT = 2.5 V, IOUT = 3 A
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4.3 Soft Start-up
Display CH1 (PH1) and CH2 (VOUT1) [DC coupled, 500 mV/div] on the oscilloscope to monitor the switching
phase and the soft start profile of the output voltage as shown in Figure 4-3.
Figure 4-3. Output Soft Start Voltage, VIN = 5 V, VOUT = 2.5 V, IOUT = 3 A
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4.4 Transient Response to Positive/Negative Load Step (0 A to 3A to 0A)
• Configure e-load to switch between 0 A and 3 A at a rate of 1 A/µs.
• On the oscilloscope, display CH2 (VOUT) [AC coupled, 50 mV/div] and CH3 (Output Current Probe) [1 A/div,
trigger rising edge ≈ 120 mA] with 20 µs/div.
Figure 4-4 shows the response to this load step to be about 50mV, or 2%.
Figure 4-4. Transient Response to Load Step 0 A to 3 A at 1 A/µs
• Change the trigger on CH3 to falling edge to capture the transient response of VOUT to negative current step
from 3 A to 0 A as shown in Figure 4-5.
Again, transient deviation is approximately 50 mV, ignoring peak envelope, or 2%.
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Figure 4-5. Transient Response to Load Step 3 A to 0 A at 1 A/µs
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4.5 Input Voltage Ripple
• Trigger CH1 of the oscilloscope on Phase Node and put the CH2 scope probe between test point TP6 (PVIN)
and TP23 (GND).
As shown in Figure 4-6, the voltage ripple (ignoring the switching coupling to the input) is approximately 50 mV.
Figure 4-6. Input Voltage Ripple, VIN = 5 V, VOUT = 2.5 V, IOUT = 3 A
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4.6 Loop Frequency Response
Measuring the frequency response of the feedback loop requires a unique test setup as well as physical
changes to the EVM. The 0-Ω resistor jumper R9, just above the output inductor, L1, must be lifted to break the
loop. Both test points TP20 (BODE) and TP15 (VOUT) are used for connections to the Bode100 instruments.
Figure 4-7. EVM Modification to Measure Frequency Response
The test setup which includes several connections to Picotest Bode100 test instruments is shown in Figure 4-8.
Measurement results are shown in Figure 4-9 and in Figure 4-10. The CHF, high frequency pole, component of
the compensation circuit is optional. Omitting it results in slightly increased phase margin. However, the benefit
of including it is that the gain curve is set in a downward trajectory as frequency increases, making a monotonic
gain curve more likely to be achieved.
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Figure 4-8. Frequency Response Test Setup
Figure 4-9. Frequency Response IOUT = 3 A
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Figure 4-10. Frequency Response IOUT = 0 A
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4.7 Current Limiting
Finally, it is worth mentioning the behavior of the device with regards to current limiting. Although, the
recommended operating condition (ROC) of the device is to never exceed 3-A peak current, the design is robust
enough to handle output currents up to the limiting mechanism of the device, which is typically 5–8 A, without
damage to the DUT. This does not mean that external components cannot be damaged so it is imperative that
the ratings of these components be in line with intended and, potential, unintended operational conditions.
Figure 4-11 shows what happens when the high-side current limit threshold is exceeded where channel 4 is
measuring the output current after the LC output filter. As the output current exceeds the limit threshold, the soft
start pin (Channel 3) is pulled low causing the switching node to slow significantly. As soft start voltage drops,
the charge on the LC filter is discharged until the steady state threshold current limit is maintained until the fault
is removed. Once the fault is removed, and, only after the soft start pin re-establishes a voltage level equal to the
VSENSE pin (VOUT), does the device start switching again.
Figure 4-11. High-Side Current Limiting
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5 TPS7H4002EVM-CVAL EVM Schematic
Figure 5-1 shows the EVM schematic.
Figure 5-1. TPS7H4002EVM-CVAL EVM Schematic
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6 TPS7H4002EVM-CVAL Bill of Materials (BOM)
Table 6-1 displays the EVM BOM.
Table 6-1. TPS7H4002EVM-CVAL Bill of Materials (BOM)
Designator QTY Value Description Package Reference Part Number Manufacturer
!PCB1 1 Printed Circuit Board LP043 Any
C1 1 0.01uF CAP, CERM, 0.01 uF, 50 V, ±10%, X7R, 0805 0805 C0805C103K5RACTU Kemet
C3 1 4.7uF CAP, CERM, 4.7 uF, 10 V, ±10%, X7R, 1210 1210 C1210C475K8RACTU Kemet
C4, C5 2 0.1uF CAP, CERM, 0.1 uF, 50 V, ±5%, X7R, 0805 0805 08055C104JAT2A AVX
C6 1 22pF CAP, CERM, 22 pF, 50 V, ±5%, C0G/NP0, 0805 0805 C0805C220J5GACTU Kemet
C7, C21 2 330uF CAP, Tantalum Polymer, 330 uF, 10 V, ±20%, 0.006 ohm,
7343-43 SMD
7343-43 T530X337M010ATE006 Kemet
C8 1 22uF CAP, CERM, 22 uF, 16 V, ±10%, X7R, 1210 1210 C3225X7R1C226K250AC TDK
C14 1 0.022uF CAP, CERM, 0.022 uF, 100 V, ±10%, X7R, 0805 0805 08051C223KAT2A AVX
C15 1 0.47uF CAP, CERM, 0.47 uF, 50 V, ±10%, X7R, 0805 0805 C2012X7R1H474K125AB TDK
C20 1 0.1uF CAP, CERM, 0.1 uF, 50 V, ±5%, X7R, 1206 1206 C1206C104J5RACTU Kemet
D1 1 5.1V Diode, Zener, 5.1 V, 300 mW, AEC-Q101, SOT-23 SOT-23 DZ23C5V1-E3-18 Vishay-Semiconductor
D2 1 Orange LED, Orange, SMD LED_0805 LTST-C170KFKT Lite-On
D3 1 30V Diode, Schottky, 30 V, 2 A, SMB SMB B230-13-F Diodes Inc.
H1, H2, H3, H4 4 Machine Screw, Round, #4-40 x 1/4, Nylon, Philips panhead Screw NY PMS 440 0025 PH B&F Fastener Supply
H5, H6, H7, H8 4 Standoff, Hex, 0.5"L #4-40 Nylon Standoff 1902C Keystone
J1, J6 2 Terminal Block, 4x1, 5.08mm, TH 4x1 Terminal Block 39544-3004 Molex
J2, J5, J7, J8 4 Standard Banana Jack, Uninsulated, 5.5mm Keystone_575-4 575-4 Keystone
J3 1 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec
J4, J9 2 Compact Probe Tip Circuit Board Test Points, TH, 25 per TH Scope Probe 131-5031-00 Tektronix
L1 1 Shielded Power Inductor 2.2µH 12.1A 12.43mOhm Max 2SMD SMD2 XEL5050-222MEC Coilcraft
LBL1 1 Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000
per roll
PCB Label 0.650 x 0.200 inch THT-14-423-10 Brady
R1, R8, R9 3 0 RES, 0, 5%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 CRCW08050000Z0EA Vishay-Dale
R2 1 1.00k RES, 1.00 k, 1%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 ERJ-6ENF1001V Panasonic
R3 1 2.00k RES, 2.00 k, 1%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 ERJ-6ENF2001V Panasonic
R5 1 4.70k RES, 4.70 k, 0.1%, 0.125 W, 0805 0805 RG2012P-472-B-T5 Susumu Co Ltd
R7 1 10.0k RES, 10.0 k, 0.1%, 0.125 W, 0805 0805 RG2012P-103-B-T5 Susumu Co Ltd
R10 1 95.3k RES, 95.3 k, 1%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 CRCW080595K3FKEA Vishay-Dale
R11 1 910 RES, 910, 5%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 CRCW0805910RJNEA Vishay-Dale
R13 1 10.0k RES, 10.0 k, 1%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 CRCW080510K0FKEA Vishay-Dale
R14 1 11.8k RES, 11.8 k, 1%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 ERJ-6ENF1182V Panasonic
R15 1 3.40k RES, 3.40 k, 1%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 CRCW08053K40FKEA Vishay-Dale
TP1, TP4, TP6, TP8,
TP17, TP18, TP19
7 Test Point, Miniature, Red, TH Red Miniature Testpoint 5000 Keystone
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Table 6-1. TPS7H4002EVM-CVAL Bill of Materials (BOM) (continued)
Designator QTY Value Description Package Reference Part Number Manufacturer
TP2, TP3, TP5, TP7,
TP9, TP22, TP27
7 Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone
TP10, TP11, TP12,
TP13, TP14, TP15,
TP16, TP23, TP24,
TP25, TP26
11 Test Point, Miniature, Black, TH Black Miniature Testpoint 5001 Keystone
TP20, TP21 2 Test Point, Miniature, Yellow, TH Yellow Miniature Testpoint 5004 Keystone
U1 1 Radiation Hardness Assured (RHA) 3-V to 7-V Input, 3-A
Synchronous Step Down Converter
CFP20 TPS7H4002HKH/EM Texas Instruments
C2 0 0.1uF CAP, CERM, 0.1 uF, 50 V, ±5%, X7R, 0805 0805 08055C104JAT2A AVX
C9, C10, C11, C12, C13 0 22uF CAP, CERM, 22 uF, 16 V, ±10%, X7R, 1210 1210 C3225X7R1C226K250AC TDK
C16, C18, C19 0 330uF CAP, Tantalum Polymer, 330 uF, 10 V, ±20%, 0.006 ohm,
7343-43 SMD
7343-43 T530X337M010ATE006 Kemet
C17, C22 0 0.1uF CAP, CERM, 0.1 uF, 50 V, ±5%, X7R, 1206 1206 C1206C104J5RACTU Kemet
C23 0 0.47uF CAP, CERM, 0.47 uF, 50 V, ±10%, X7R, 0805 0805 C2012X7R1H474K125AB TDK
FID1, FID2, FID3 0 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A
R4, R6 0 0 RES, 0, 5%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 CRCW08050000Z0EA Vishay-Dale
R12 0 499k RES, 499 k, 0.1%, 0.125 W, 0805 0805 RG2012P-4993-B-T5 Susumu Co Ltd
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7 Board Layout
Figure 7-1 through Figure 7-11 illustrate the layer stack of the TPS7H4002EVM-CVAL board.
Figure 7-1. Top Overlay
Figure 7-2. Top Solder
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Figure 7-3. Layer 1 -Top Layer
Figure 7-4. Layer 2- GND
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Figure 7-5. Layer Three - Signal
Figure 7-6. Layer Four -Bottom Layer
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