Toshiba TB9051FTG User manual

TB9051FTG
©2016-2019
Toshiba Electronic Devices & Storage Corporation Ver.1.1 2019-03-14
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Toshiba Bi-CMOS Linear Integrated Circuit Silicon Monolithic
TB9051FTG
PWM type single channel H-Bridge DC brushed motor driver for automotive use
1. Outline
This product is a motor driver IC which incorporates the output driver
for the direct drive of a DC brushed motor intended for the automotive
use.
The motor drive output can be highly efficient operation by the PWM
control which realizes low-on resistance.
Forward / Reverse / brake mode can be selected according to PWM1 signal and PWM2 signal, and the
motor operation mode and stop mode can be selected by ENABLE pin.
Moreover, the output current capacity is 5A (max), it is suitable for various automotive applications
such as a throttle and valve control, various engine bulbs, storing of door mirrors, and a seat
positioning.
2. Application
Automotive applications such as a throttle and valve control, various engine bulbs, and storing of door
mirrors
3. Feature
●Motordriverblock: Single channel H-Bridge driver
(Ron(Pch+Nch))<0.45Ω(Max @Tj = 150°C, VBAT = 8 V)
●Abnormality detection function: Over-current detection, over-temperature detection, VBAT
undervoltage detection, VCC undervoltage detection, and
VCC high voltage detection
●Built-in initial diagnosis function: Power supply abnormality detection circuit (VBAT
undervoltage, VCC undervoltage and VCC high voltage.)
●Output type: PWM control output
●Motor operation: Forward /Reverse/ Brake
●Current limitation control: Current limiter with chopper type
●Output high-side current monitoring function (OCM pin)
●DIAG output
●Built-in the through current prevention circuit
●Operating voltage range: VBAT = 4.5 to 28 V (Maximum ratings of power supply
voltage 40V (max): 0.5 sec.)
●Operating temperature range: Ta = -40°C to 125°C
●Compact type flat package: P-QFN28-0606-0.65-001
●AEC-Q100 Qualified
・If the label of shipping box is indicated to be “[[G]]/RoHS COMPATIBLE2”, “[[G]]/RoHS [[Chemical
symbol(s) of controlled substance(s)”, and “RoHS COMPATIBLE” or “RoHS COMPATIBLE, [[Chemical
symbol(s) of controlled substance(s)]]>MCV”, this product is compliant with the EU RoHS Directive
(2011 / 65 / EU) in the meaning of the statement.
P-QFN28-0606-0.65-001

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4. Block Diagram
Figure 4.1 Block diagram
Note: Some of the functional blocks, circuits in the block diagram may be omitted or simplified for
explanatory purposes.
The signal which is performed the logical operation of the EN and ENB pin input, is not connected
to each driver output circuit. However, each EN and ENB signal is connected independently to the
output circuit of each driver.
Control
・Over current detection
・POR
・Low voltage detection
・High voltage detection
・Thermal detection Pre-Driver
Over-temperature
detection
Over current
detection
Hi-side current
monitoring
VBAT
OUT1
OUT2
PGND
AGND
PWM2
PWM1
EN
ENB
M
Battery
Microcontroller
5V ECU
VCC
DIAG
OSC circuit
OCC
OCM
EN circuit
5.1kΩ
Low voltage
detection
Initial
diagnosis
Low voltage
detection, and high
voltage detection
Initial
diagnosis
POR

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5. Pin Assignment
Pin assignment (Top View)
Figure 5.1 Pin assignment

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6. Pin Description
Pin description
Table 6 Pin description
Pin
No. Pin name Pin description
1 OCC
Motor drive output control pin at the time of the over-current detection (This
pin is used for the judgement of whether the motor control output is ON or
OFF by this IC or by the MCU.)
2 VCC 5V power supply pin. This pin is used for internal logic and analog circuit.
3 ENB Inverted input pin of driver operation permission
4 AGND Ground pin for analog and digital circuit
5 EN Input pin of driver operation permission
7 OCM Current monitoring pin at High-side. This pin can monitor the current which
flows from the voltage generated to an external resistor into the H-side.
8 PWM1 Driver control signal input pin 1
9 PWM2 Driver control signal input pin 2
11, 12,
24, 25 VBAT Battery power supply
13, 14 OUT1 H-bridge driver output pin 1
15, 16, 17,
19, 20, 21 PGND Power ground pin (used as the ground of H-bridge)
18 DIAG Diagnostic signal output pin
Open drain type of output pin
22, 23 OUT2 H-bridge driver output pin 2
27 TEST1 Test pin This pin should be used connecting to GND.
28 TEST2 Test pin This pin should be used connecting to GND.
6, 10, 26 NC This pin should be used open.
C1 CORNER1
These pins are connected to E-Pad.
C2 CORNER2
C3 CORNER3
C4 CORNER4
- E-Pad This pin is used for a heat dissipation.
* The CORNER1 to 4, and E-Pad pins should be used connecting to GND. In addition, these pins are not
tested for a shipment.

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6.1. Protection Element Arrangement
Table 6.1 Protection element arrangement
Pin Name
Pull down
I/O
Max
rating Protection element Protection element
connection destination
/Pull up [V]
Power
supply
side
GND side
Power
supply
side
GND side
OCC Pull down I 6 - B - AGND
ENB Pull up I 6 - B - AGND
EN Pull down I 6 - B - AGND
PWM1 Pull down I 6 - B - AGND
PWM2 Pull down I 6 - B - AGND
OUT1 - O 40 - - - -
OUT2 - O 40 - - - -
DIAG - O 6 - - - -
OCM - O 6 C B VCC AGND
TEST1 Pull down I 6 - B - AGND
TEST2 Pull down I 6 - B - AGND
VBAT -
Power
supply 40 - A - AGND/PGND
VCC -
Power
supply 6 - B - AGND/PGND
NC - - - - - - -
PGND - GND - - D - AGND
AGND - GND - - D - PGND
Figure 6.1 Protection element type
40V PDMOS Vdss
NMOS保護 PMOS保護 PN Diode(5V)
ABCD
NMOS protection PMOS protection

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7. Functional Description
7.1. Motor Driver Output Circuit
The output circuit operates according to the following function (Table 7.1-1). In the Table 7.1-1 to 7.1-3,
each letter means; X: Don’t care, H: High, L: Low, and Z: High impedance.
Table 7.1-1 Motor function
PWM1 PWM2 EN ENB DIAG pin OUT1 OUT2
Forward H L H L H H L
Short brake L L H L H L L
Reverse L H H L H L H
Short brake H H H L H L L
EN Disable X X L X L Z Z
ENB Disable X X X H L Z Z
EN Disconnected X X Z X L Z Z
ENB Disconnected X X X Z L Z Z
PWM1 Disconnected Z L/H H L H L L/H
PWM2 Disconnected L/H Z H L H L/H L
Note 1: When the motor is set to the reverse from the forward, or to the forward from the reverse, be sure
to perform after setting the brake between them. Otherwise the IC may be broken.
Note 2: In the current limitation control, the operation is different from the above table of the motor
function. For details, refer to current limitation control (Section 7.3).
Table 7.1-2 Function operation at abnormality detection
PWM1 PWM2 EN ENB DIAG pin OUT1 OUT2
Over-temperature detection
(Note)
Output is OFF regardless of input signals.
L Z Z
Over-current detection (Note) L Z Z
VBAT undervoltage detection L Z Z
VCC undervoltage detection L Z Z
VCC high voltage detection L Z Z
Note: When the voltage is dropping less than the VBAT undervoltage, the over-temperature detection
circuit holds the state before detecting VBAT. When the voltage is dropping less than the VBAT
undervoltage, the Over-current detection circuit is forced to be undetected state.
Table 7.1-3 Output state
OUT High-side Driver Low-Side Driver
H ON OFF
L OFF ON
High-Z OFF OFF

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(1) PWM function (in the case of Forward) (EN:H, ENB:L)
* The mark of a circle shows DMOS Tr which is ON.
Figure 7.1-1 Current flow at the time of PWM function (Forward)
Note: Some of the functional blocks and circuits in the block diagram may be omitted or simplified for
explanatory purposes.
●PWM function (Forward) timing chart (in the case of short brake operation, PWM1 = PWM2 = L)
*D.T (Dead Time): In order to prevent the through current by simultaneous ON of Hi-side Pch Tr and
Lo-side Nch Tr, Pch Tr off and Nch Tr off time (4 μs (typ.)) are prepared.
Figure 7.1-2 (1) Timing chart at the time of PWM function (Forward)
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.

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●PWM function (Foward) timing chart (in the case of short brake operation, PWM1 = PWM2 = H)
*D.T (Dead Time): In order to prevent the through current by simultaneous ON of Hi-side Pch Tr and
Lo-side Nch Tr, Pch Tr off and Nch Tr off time (4 μs (typ.)) are prepared.
Figure 7.1-2 (2) Timing chart at the time of PWM function (Forward)
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.

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(2) PWM function (in the case of Reverse) (EN:H, ENB:L)
* The mark of a circle shows DMOS Tr which is ON.
Figure 7.1-3 Current flow at the time of PWM function (Reverese)
Note: Some of the functional blocks and circuits in the block diagram may be omitted or simplified for
explanatory purposes.
●PWM function (Reverse) timing chart (in the case of short brake operation, PWM1 = PWM2 = L)
*D.T (Dead Time): In order to prevent the through current by simultaneous ON of Hi-side Pch Tr and
Lo-side Nch Tr, Pch Tr off and Nch Tr off time (4 μs (typ.)) are prepared.
Figure 7.1-4 (1) Timing chart at the time of PWM function (Reverse)
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes
.
H
L
PWM2
H
L
Pch
ON
OFF
Nch
ON
OFF
Pch
ON
OFF
Nch
ON
OFF
Reverse D.T Short brake D.T Reverse
Dead
Time
Dead
Time
O
U
T
1
O
U
T
2
PWM1

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●PWM function (Reverse) timing chart (in the case of short brake function, PWM1 = PWM2 = H)
*D.T (Dead Time): In order to prevent the through current by simultaneous ON of Hi-side Pch Tr and
Lo-side Nch Tr, Pch Tr off and Nch Tr off time (4 μs (typ.)) are prepared.
Figure 7.1-4 (2) Timing chart at the time of PWM function (Reverse)
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes

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7.2. DIAG Output
This pin is an open drain type output pin and should be used connecting to a MCU power supply
through a pull-up resistor. When the following errors occur, this pin outputs “L.”
Table 7.2 DIAG function
Function EN ENB
DIAG Motor drive output
Pin OUT1 OUT2
Normal operation
Forward H L H H L
Reverse H L H L H
Short brake H L H L L
EN Disable L X L High-Z High-Z
ENB Disable X H L High-Z High-Z
Error detection
At the time of VBAT undervoltage
detection X X L High-Z High-Z
At the time of VCC undervoltage
detection X X L High-Z High-Z
At the time of VCC high voltage
detection X X L High-Z High-Z
Error detection
(DIAG output latch available) *1
At the time of over-temperature
detection (TSD) X X L High-Z High-Z
At the time of over-current detection
(Iovc) X X L High-Z High-Z
Diagnosis operation
(DIAG output latch available) *2
At the time of initial diagnosis, and
restart diagnosis abnormality X X L *3 *3
During initial diagnosis, and diagnosis
restart operation X X L High-Z High-Z
POR operation At the time of VCC undervoltage POR
detection X X L High-Z High-Z
*1: For the clearing condition of the DIAG output latch, refer to Section 7.7.1 “DIAG function release
operation after the over-temperature detection” at the time of the over-temperature detection. At the
time of the over-current detection, refer to the Section 7.8.3 “Timing chart of restart from the motor
output OFF state at the time of over-current detection.”
*2: The clearing conditions of DIAG output latch are as follows: VCC undervoltage POR detection, EN
Disable , and ENB Disable.
*3: In the case of initial diagnosis abnormality, or diagnosis restart abnormal value
In the diagnosis abnormality, when the abnormal state is fixed to VBAT undervoltage detection state,
VCC undervoltage detection state, and VCC high voltage detection state, the motor drive output is in
the abnormal state, and OUT1 and OUT2 output High-Z.
In the diagnosis abnormality, when the abnormal state is fixed to VBAT undervoltage undetection
state, VCC undervoltage undetection state, and VCC high voltage undetection state, the motor drive
output, OUT1 and OUT2 output according to Table 7.1-1 “Motor function.”
*4: Each letter in Table 7.2 means; X: Don’t care, H: High, L: Low, and High-Z: High impedance.

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Figure 7.2-1 Example of DIAG output circuit configuration
Note: Some of the functional blocks and circuits in the block diagram may be omitted or simplified for
explanatory purposes.
In the case of the over-current detection and over-temperature detection, DIAG output is latched (*1) (the
motor drive output becomes an OFF operation).
The “L” output latch (*1) of the DIAG pin is cleared with the rising edge of EN pin or the falling edge of
ENB pin.
Moreover, for the VBAT and VCC voltage abnormality, they are returned automatically after returning
normal voltage.
In the automatic returning operation, the DIAG output returns the normal operation in the response to
the release voltage of each power supply monitoring function.
If the VCC voltage is dropping still in the abnormal state, “L” holding circuit holds the DIAG output = L.
DIAG=”L”(*2) is latched when set to fail situation in initial diagnosis and diagnostic restart
operation. This latch (* 2) is cleared at VCC low voltage POR detection, EN Disable, or ENB Disable.

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7.3. Current Limitation Control
This IC uses a chopper type control as a current limitation control. The current limitation control
makes it operate in the large current flowing at the time of locking a motor when the motor shaft
operation cannot be performed. Then the actuator is protected and the dissipation of this IC is reduced.
(An additional over-current protection circuit is prepared in other block at the time of the power
supply short or GND short.)
The current limitation comparator is arranged to the low side, and higher threshold is defined as
Ilim-H, and lower one is defined as Ilim-L.
Moreover blanking time is prepared inside, and if exceeding the time, it will be considered that the
current limitation is operated.
The value of Ilim-H is set to 6.5 A (typ.), and Ilim-L = Ilim-H - 0.25 A (typ.).
7.3.1. Chopper type current limitation control
The basic operation of chopper type current limitation is as follows.
Figure 7.3-1 Chopper type current limitation control
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes
<Basic operaton>
(1) Current is detected with Ilim-H(6.5A).
(2) The Blanking counter starts counting after the detection. The Current Limit signal rises at the falling
edge of tBLANK1 because the current flows more than Ilim-H(6.5 A) after passing the time
(tBLANK1:11.5 μs).
(3) After Blanking, the motor drive output is set to the short brake mode (lower simultaneous ON)
automatically. Then the current is regained.
At the same time, Toff_min also rises to “H” and starts counting.
The PWM1 signal of Note1 is ignored in this case. (Toff_min is given the priority.)
(4) After passing the time of Toff_min (20.5 μs) the normal mode (Forward) returns if the value is lower
than Ilim-L.
(5) The motor drive current is increasing because PWM1 becomes “H.”
<When a PWM signal is input at the time of Forward>
(6) It is detected that the current flows more than Ilim-H (6.5 A) after restarting the motor operation at
Toff_min falling edge.
tBLANK1(11.5 μs) counter starts.
(7) If PWM1 becomes “L” during Blanking, the motor output is set to the short brake (lower similtaneous
ON), and the current is regained.
(8) The short brake is held because the current value after Toff_min (20.5 μs) is more than Ilm-L.
(9) The current Limit becomes “L” since the Ilim-L is detected, and the normal mode returns.
(10) Since the PWM holds “H”, the motor drive current is increasing.
ｔ
Ｉlim-H: 6.5A
Ｉlim-L: Ilim-H - 0.25A
PWM1
(PWM2 is fixed to L.)
tBLANk1：11.5μs
Current Limit
Note1: This area is
ignored.
11.5μs
Toff_min
(20.5μs)
(1)
(2)
20.5μs
(3) (4)
(5)
(6)
(7)
(8) (9)
(10)
(11)
(12)
(13)
(14)
20.5μs

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(11) Shift to the short brake mode at the PWM1 falling edge.
(12) The normal operation returns by PWM1 = H signal.
(13) Since PWM1 hold “H”, the motor drive current is increasing.
(14) Then the operation becomes the short brake mode operation, and the motor drive current is reduced
by PWM1 = L signal.
7.3.2. Thermal Adjustment Function of Current Limitation Control
When the junction temperature Tj rises in the operation of the current limitation control circuit, the
current limitation threshold falls to 2.5A (typ.) after detecting Twar temperature (150°C to 170°C).
The Ilim-L may be also lowered by falling of the threshold of Ilim-H.
Figure 7.3-2 Thermal adjustment function of current limitation control

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7.3.3. Current monitoring block at the time of current limitation control
It is detected at Low-side driver of the motor drive output.
Figure 7.3-3 Current monitoring block at the time of current limitation control
Note: Some of the functional blocks of circuits in the block diagram may be omitted or simplified for
explanatory purposes.
7.3.4. Operating flow
Figure 7.3-4 Operation flow of current limitation control circuit
Note: Some of the functional blocks or circuits in the block diagram may be omitted or simplified for
explanatory purposes.

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7.4. High-side current monitor: OCM pin
The current which flows to high side Tr (Pch) in H-bridge of motor-driven output (0A-6A) is monitored
in real time. Then a current value of 0.223% (0 to 13.38mA) of its current value is output in aOCM pin.
The current can be monitored by inserting an external resistance (220Ω*1) between OCM pin and GND.
Additionally this voltage is input to MCU, and the motor state (such as motor lock, the load OPEN
when operating, and angle detection of a throttle) can be monitored.
Figure 7.4-1 Block diagram of high-side current monitoring
Note: Some of the functional blocks or circuits in the block diagram may be omitted or simplified for
explanatory purposes.
* This resistance (220Ω*1) assumes in the case that the power supply of MCU (ADC) is 5V.
When the power supply of MCU is less than 5V, use adjusting of ressistance value.
Be careful for the external resistance (220Ω). Sufficient evaluation is required since not only the
resistance value fluctuates but also the output voltage also fluctuates.
* The external capacitor (*2) should select whether it connects according to the purpose of system use.
For example, the operation in the case of flowing a current of 3A is as follows. However, repeating from
forward to reverse is inhibited, and it assumes that the short brake is inserted between them and
operated .
Figure 7.4-2 Timing chart of high-side current monitoring
Monitoring in
MCU
Current
monitor
２2０Ω
In the case of 3A
6.7mA(typ)＊220Ω＝1.47V
In the case of 6A
13.38mA(typ)*220Ω=2.94V
VBAT
GND
OUT1
OUT2
Current
monitor
Current
monitoring circuit
OCM
1μF
(*1) (*2)

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Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.
Figure 7.4-3 Current characteristics of OCM pin (0 to 6A)
Figure 7.4-4 Current characteristics of OCM pin (0 to 1.5A)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 5.50 6.00 6.50
OCM電流（mA）
出⼒電流（A)
TB9051FTG OCM 電流特性 (0〜6A）
仕様MIN
仕様TYP.
仕様MAX
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
1.60
1.80
2.00
2.20
2.40
2.60
2.80
3.00
3.20
3.40
3.60
3.80
4.00
4.20
4.40
0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 1.50
OCM電流（mA）
出⼒電流（A)
TB9051FTG OCM 電流特性 (0〜1.5A）
仕様MIN
仕様TYP.
仕様MAX
TB9051FTG OCM current characteristics (0 to 6A)
TB9051FTG OCM current characteristics (0 to 1.5A)
Out
p
ut current (A)
Out
p
ut current (A)
OCM current (mA)
OCM current (mA)
Spec. MIN
Spec. TYP.
Spec. MAX
Spec. MIN
Spec. TYP.
Spec. MAX

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7.5. OSC circuit (oscillation circuit)
An OSC circuit consists of CR oscillators of internal resistance and an internal capacitor, and performs a
5 MHz (typ.) oscillation.
Without a trigger of oscillation starting, a oscillation starts automatically according to the rise of supply
voltage(VCC).
Fibure 7.5-1 Operation at the time of OSC circuit starting
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.

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7.6. Power supply monitoring function
This IC incorporates the power supply monitoring function.
7.6.1. VBAT undervoltage detection circuit
・When the VBAT voltage falls and becomes less than the low detection voltage, OUT1/2 becomes
“OFF”(High-Z state).
Moreover, in order to prevent chattering, a filter (TVBAT_uv:2μs (typ.)) is built in. If the VCC voltage is
more than the POR detecting voltage value of VCC undervoltage even when output is in the "OFF"
(High-Z) state by undervoltage detection of VBAT, a Logic circuit is able to operate.
Figure 7.6.1-1 Threshold characteristics of VBAT undervoltage detection
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.
Figure 7.6.1-2 Timing chart of VBAT undervoltage detection
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.

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7.6.2. VCC undervoltage detection circuit
When the VCC voltage falls and becomes less than the low detection voltage, OUT1/2 becomes
“OFF”(High-Z state).Moreover, in order to prevent chattering, a filter (TVCC_uv:2.5ms (typ.)) is built in.
For a logic circuit, it is reset in the case of VCCRHL (3.07V (typ.)) or less. Moreover, in order to prevent
chattering, a filter (TVCC_por:13.0μs (typ.)) is built in.
Figure 7.6.2-1 VCC undervoltage detection and POR threshold characteristics
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.
Figure 7.6.2-2 Timing chart of VCC undervoltage detection
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.
Figure 7.6.2-3 POR timing chart of VCC undervoltage
Note: Some of timing charts in this document may be omitted or simplified for explanatory purposes.
T<TVCC_uv T>TVCC_uv
VCC
VCCHL=3.5V (typ.)
ON-STATE OFF(High-z) ON-STATE
Motor drive
output
TVCC_uv2
2.5ms (typ.)