TYAN TEMPEST II User manual

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1. Introduction
1.1 Preface
S1462 is a Dual Intel Pentium based PC/AT mainboard. With 75MHz thru
166MHz CPU, PCI local bus, EISA bus, it can be used with the fastest PC/
AT systems.
1.2 Key Features
* Single or Dual Pentium based PC/AT compatible mainboard with Intel
Neptune chipset
* 4 Master/Slave PCI Bus slots, 5 EISA Bus slots (4 master).
* Supports Single or Dual Pentium Processors (75MHz thru 166MHz).
* Supports true 64 bits CACHE and DRAM access mode.
* Supports WHITE ZIF Socket 5 socket.
* Supports 256/512 KB 2nd level cache memory, either synchronous or
standard SRAM.
* CPU WRITE-BACK cache operation.
* Supports up to 512 MB DRAM memory on board.
* Supports shadow RAM for BIOS & VIDEO BIOS.
* Shadow RAM cachable function to improve performance.
* Licensed AWARD BIOS or AMI BIOS.
* Flash BIOS support
* On-board NCR SCSI (NC810) BIOS firmware
* RTC and 8KB EISA configuration memory
* BABY AT form factor, 6 layers PCB.

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C=Control
D=Data
A=Address
1.3. S1462 Block Diagram
Clock Chip
50/66/60 MHz
Clock Driver
PCICLKA
VESA Slot
LBX
PCI SLot
#1 #2 #3 #4
C D A
DRAM
A
PCICLKB
PCICLKC
PCICLKE
A
D
PCEB
82375EB/SB
ESC
82374EB/SB
LBX
82433NX
EISA Slot
8042
BIOS
#1 #2 #3 #4 #5
Cache
SRAM
256/512 KB
synchronous or
standard SRAM
PCM
82434NX
CPU
Pentium
75-166MHz
C
D
CPU
Pentium
75-166MHz

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1.4 Hardware Specifications
* CPU -Single or Dual 3.3V Pentium 75/90/100 MHz
Processor.
-Single Pentium 120 or 133 MHz Processor
-Two 320 pin SPGA Pentium Overdrive Proces-
sor (Socket 5) White ZIF Sockets on board.
* Coprocessor -Included in Pentium CPU.
* Speed -50/60/66 MHz System Bus and 25/30/33 MHz
PCI Bus speed.
-7.5/8.33 MHz EISA/ISA Bus speed.
-H/W and S/W speed switchable function (Cache
or non Cache).
* DRAM Memory -4 double banks of 72 pins SIMM Module DRAM.
-2MB to 512 MB DRAM size.
-Supports Fast Page DRAM access mode.
* Cache Memory -16 KB cache memory included in Pentium.
-256/512 KB on board 2nd level cache memory.
-Support Pentium BURST read/write mode on
2nd level cache memory access.
-Supports either synchronous or standard
SRAM.
* Shadow RAM -Main BIOS function.
-Video BIOS shadow function programmable.
-Shadow RAM cachable function programmable.
* I/O Bus Slots -4 Master/Slave PCI-Bus.
-5 EISA Bus (4 Masters).
* Dimension -Baby AT size.
1.5. Software Specifications
* BIOS -Licensed AWARD BIOS or AMI BIOS.
-AT CMOS Setup, BIOS/CHIPSET Setup, and
hard disk utility included.
* O.S. -Operates with MS-DOS, Windows, Windows
NT, OS/2, Novell, and SCO Unix.
* Utilities -Licenced AMI EISA configuration utility
-Flash EPROM utility

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1.6 Environment
Ambient Temperature 0 to +50 C (operating)
Relative Humidity 0 to +85% (operating)
Altitude 0 to 10,000 feet (operating)
Vibration 0 to 1,000 Hz
Voltage 4.9 to 5.2 V

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2. Board Installation.
2.1 Unpacking
The mainboard package should contain the following
* The S1462 Mainboard
* User's Manual
* ECU User's Manual
* EISA CFG. Utility Diskette
The mainboard contains sensitive electric components which can be easily
damaged by static electricity, so the mainboard should be left in its original
packing until it is installed.
Unpacking and installation should be done in a grounded anti-static mat.
The operator should be wearing an anti-static wristband, grounded at the
same point as the anti-static mat.
Inspect the main board carton for obvious damages. Shipping and handling
may cause damages to your board. Be sure there are no shipping and
handling damages on the board before proceeding.
After opening the mainboard carton, extract the system board and place it
only on a grounded anti-static surface component side up. Again inspect the
board for damages. Press down on all of the socket IC's to make sure that
they are properly seated. Do this only with the board placed on an anti-
static mat.
DO NOT APPLY POWER TO THE BOARD IF IT HAS BEEN
DAMAGED!
MAKE SURE THAT THE POWER SUPPLY IS CONNECTED
TO THE PROPER 5V CONNECTOR!

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2.2 Installation
You are now ready to install your mainboard. The mounting hole pattern on
the mainboard matches the IBM-AT system board. It is assumed that the
chassis is designed for a standard IBM XT/AT mainboard mounting.
Place the chassis of the anti-static mat and remove the cover. Remove the
plastic clips, Nylon stand-off and screws for mounting the system board,
and keep them separately.

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3. S1462 On Board Resource Setting and Upgrade Guide
3.1 Quick Reference For Jumpers & Connectors (refer Fig. 3.1)
* J21/22: 5V Power Connector
1Power Good Signal
2,10,11,12 VCC (+5V)
3+12V
4-12V
5,6,7,8 GND
9-5V
* J24/J25: 3.3V Power Connector
1,2,3,10,11,12 GND
4,5,6,7,8,9, 3.3V
( J29 needs to be "OFF", if using J24/J25)
* J20: Reset Connector
"Open" for normal operation
"Close" for hardware reset
* J7: Second Level Cache Size Selection (J6 always "on" 1-2)
"Close" pins 1-2 for 512KB cache size
"Close" pins 2-3 for 256KB cache size
* J13: Power LED and Keylock Connector
1LED anode (+)
2NC
3LED cathode (-)
4Keylock
5GND
* J8: Standard or Synchronized SRAM
1-2 Synchronized SRAM
2-3 Standard

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* J19: Speaker Connector
1Data
2NC
3GND
* J16: Turbo Switch Connector
"Open" for high speed
"Close" for low speed (non-cache)
* J17: Turbo LED Connector
1LED cathode (-)
2LED anode (+)
* J9, J10,J2 and J43: System Speed Selection
J9 J10 J2 J43 CPU Speed
off off off off 75MHz
off on off off 90MHz
on on off off 100MHz
off on on off 120MHz
on on on off 133MHz
off on on on 150MHz
on on on on 166MHz
* J41 Single or Dual Processor
1-2 Single Processor
2-3 Dual Processor
In Dual Processor mode
Socket 5 "A" as master
Socket 5 "B" as slave
In Single Processor mode
Use either "A" or "B" Socket 5
*J8 Synchronized or STD SRAM
1-2 Synchronized SRAM
2-3 STD SRAM
.

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EISA Slot 5 EISA Slot 4 EISA Slot 3
EISA Slot 2 EISA Slot 1
PCI Slot 4 PCI Slot 1
Bank 0 Bank 0 Bank 1 Bank 1
Figure 3.1
* All other Jumpers are reserved
PWR CON. 3.3V
RTC
Bank 3 Bank 3 Bank 4 Bank 4
ICChip
82434
NX
ICChip
82433
NX
82433
NX
82374
EB/SB
82375
EB/SB
Synchronized SRAM
Keyboard
CON
Heat
Sink
Socket 5 A Socket 5 B
Clock
Chip
P54C
or
P54CM
P54C
J41
J4
Pin1
PWR CON. 5V
Pin1
BIOS
AMI/AWARD
J18
PCI Slot 3 PCI Slot2
J9
J6
J7
J8
Single or
Dual CPU
J41
Single
Dual 1
Flash
EPROM
J18
12V
5V 1
256 KB
512 KB
1
1
Cache Size
J6
J6
J7
J7
1
1
J10
J43
J11
J2

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3.2 DRAM Installation
The mainboard can be installed with 1/2/4/8/16/32/64 MB 72 pins/70 ns
DRAM SIMM module. The DRAM memory system consists of 4 banks
(0-3). Each bank requires 2 SIMM modules to achieve 64 bit bus transfer
and proper operation. The total memory size can be from 2MB to 512MB.
Various DRAM configurations are shown on the table following this page.
0 0,1 0-2 0-3
2MB*2 (1MB*2) (1MB*2)1MB*2)4MB6MB8MB10MB
2MB*2 (2MB*2) (2MB*2) (2MB*2)4MB8MB12MB16MB
2MB*2 (4MB*2) (4MB*2) (4MB*2)4MB12MB20MB28MB
2MB*2 (8MB*2) (8MB*2) (8MB*2)4MB20MB36MB52MB
2MB*2 (16MB*B) (16MB*2) (16MB*2)4MB36MB68MB100MB
2MB*2 (32MB*2) (32MB*2) (32MB*2)4MB68MB132MB196MB
2MB*2 (64MB*2) (64MB*2) (64MB*2)4MB132MB260MB388MB
1MB*2 (1MB*2) (1MB*2) (1MB*2)2MB4MB6MB8MB
1MB*2 (2MB*2) (2MB*2 (2MB*2)2MB6MB10MB14MB
1MB*2 (4MB*2) (4MB*2)4MB*2)2MB10MB18MB26MB
1MB*2 (8MB*2) (8MB*2) (8MB*2)2MB18MB34MB50MB
1MB*2 (16MB*2) (16MB*2) (16MB*2)2MB34MB66MB98MB
1MB*2 (32MB*2) (32MB*2) (32MB*2)2MB66MB130MB194MB
1MB*2 (64MB*2) (64MB*2) (64MB*2)2MB130MB258MB386MB
BNK0 BNK1 BNK2 BNK3 BK0 BNK BNK BNK
SIMM SIMM SIMM SIMM SIZE SIZE SIZE SIZE

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8MB*2 (1MB*2) (1MB*2) (1MB*2) 16MB 18MB 20MB 22MB
8MB*2 (2MB*2) (2MB*2) (2MB*2) 16MB 20MB 24MB 28MB
8MB*2 (4MB*2) (4MB*2) (4MB*2) 16MB 24MB 32MB 40MB
8MB*2 (8MB*2) (8MB*2) (8MB*2) 16MB 32MB 48MB 64MB
8MB*2 (16MB*2) (16MB*2) (16MB*2) 16MB 48MB 80MB 112MB
8MB*2 (32MB*2) (32MB*2) (32MB*2) 16MB 80MB 144MB 208MB
8MB*2 (64MB*2) (64MB*2) (64MB*2) 16MB 144MB 272MB 400MB
4MB*2 (1MB*2) (1MB*2) (1MB*2) 8MB 10MB 12MB 14MB
4MB*2 (2MB*2) (2MB*2) (2MB*2) 8MB 12MB 16MB 20MB
4MB*2 (4MB*2) (4MB*2) (4MB*2) 8MB 16MB 24MB 32MB
4MB*2 (8MB*2) (8MB*2) (8MB*2) 8MB 24MB 40MB 56MB
4MB*2 (16MB*2) (16MB*2) (16MB*2) 8MB 40MB 72MB 104MB
4MB*2 (32MB*2) (32MB*2) (32MB*2) 8MB 72MB 136MB 200MB
4MB*2 (64MB*2) (64MB*2) (64MB*2) 8MB 136MB 264MB 392MB
0 0,1 0-2 0-3
BNK0 BNK1 BNK2 BNK3 BK0 BNK BNK BNK
SIMM SIMM SIMM SIMM SIZE SIZE SIZE SIZE
16MB*2 (1MB*2) (1MB*2) (1MB*2) 32MB 34MB 36MB 38MB
16MB*2 (2MB*2) (2MB*2) (2MB*2) 32MB 36MB 40MB 44MB
16MB*2 (4MB*2) (4MB*2) (4MB*2) 32MB 40MB 48MB 56MB
16MB*2 (8MB*2) (8MB*2) (8MB*2) 32MB 48MB 64MB 80MB
16MB*2 (16MB*2) (16MB*2) (16MB*2) 32MB 64MB 96MB 128MB
16MB*2 (32MB*2) (32MB*2) (32MB*2) 32MB 96MB 160MB 224MB
16MB*2 (64MB*2) (64MB*2) (64MB*2) 32MB 160MB 288MB 416MB

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32MB*2 (1MB*2) (1MB*2) (1MB*2) 64MB 66MB 68MB 70MB
32MB*2 (2MB*2) (2MB*2) (2MB*2) 64MB 68MB 72MB 76MB
32MB*2 (4MB*2) (4MB*2) (4MB*2) 64MB 72MB 80MB 88MB
32MB*2 (8MB*2) (8MB*2) (8MB*2) 64MB 80MB 96MB 112MB
32MB*2 (16MB*2) (16MB*2) (16MB*2) 64MB 96MB 128MB 160MB
32MB*2 (32MB*2) (32MB*2) (32MB*2) 64MB 128MB 192MB 256MB
32MB*2 (64MB*2) (64MB*2) (64MB*2) 64MB 192MB 320MB 448MB
Each bank may use either 1-sided or 2-sided SIMMs.
All SIMMs must be Fast Page Mode DRAM with speeds less
than or equal to 70ns.
SIMM modules installed must be in pairs.
SIMM modules in parentheses ( ) are optional.
Refer to Fig. 3.1 for DRAM installation location. Pin-1 of the SIMM
module must match the Pin-1 of SIMM socket.
Insert the DRAM SIMM module into the socket at a 45 degree angle. If
the SIMM module is inserted on the wrong side, it can not be completly
plugged into the socket. After insertion, press the SIMM module in a
vertical direction until both left and right metal holders latch.
64MB*2 (1MB*2) (1MB*2) (1MB*2) 128MB 130MB 132MB 134MB
64MB*2 (2MB*2) (2MB*2) (2MB*2) 128MB 132MB 136MB 140MB
64MB*2 (4MB*2) (4MB*2) (4MB*2) 128MB 136MB 144MB 152MB
64MB*2 (8MB*2) (8MB*2) (8MB*2) 128MB 144MB 160MB 176MB
64MB*2 (16MB*2) (16MB*2) (16MB*2) 128MB 160MB 192MB 224MB
64MB*2 (32MB*2) (32MB*2) (32MB*2) 128MB 192MB 256MB 320MB
64MB*2 (64MB*2) (64MB*2) (64MB*2) 128MB 256MB 384MB 512MB
0 0,1 0-2 0-3
BNK0 BNK1 BNK2 BNK3 BK0 BNK BNK BNK
SIMM SIMM SIMM SIMM SIZE SIZE SIZE SIZE

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3.3. Single CPU Installation
Seven types of CPU (75-166 MHz) can be used on S1462. The J9,
J10, J2 and J43 jumper will set up the system frequency generator for the
CPU on board. The following table and procedures tell how to install the
CPU.
J9 J10 J2 J43 CPU Speed
off off off off 75MHz
off on off off 90MHz
on on off off 100MHz
off on on off 120MHz
on on on off 133MHz
off on on on 150MHz
on on on on 166MHz
* J11 is always open.
* The CPU is a sensitive electric component and it can be easily
damaged bystaticelectricity. Do not touch the CPU pins with your fin
gers.
* When installing the CPU into the socket, match the CPU pins to the
socket pins.
* Before the CPU is installed, the mainboard must be placed on a flat
plane in order to avoid being broken by the pressure of CPU insertion.
* A cooling fan and a heat sink assembly are required to go with the
CPU.

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3.4 Installing a Second Pentium
The mainboard can operate with either one or two Pentium proces-
sors installed. In the Single Processor mode, with a Pentium P54C installed
in the lower socket, the mainboard will operate like a normal single Pentium
system. To use the Dual Processor mode you have to install a Pentium
P54C or P54CM. The mainboard default setup is for the Single Processor
operation. To install a second processor do the followings.
1.Set J41 to the Dual Processor setting
2.Make sure the second Pentium has the same an internal clock
speed as the the first CPU which has a multiple external clock
speed factor of 1.5.
Internal Clock External Clock
75MHz 50MHz(PCI Bus 25MHz)
90MHz 60MHz(PCI Bus 30MHz)
100MHz 66MHz(PCI Bus 33MHz)
120MHz 60MHz(PCI Bus 30MHz)
133MHz 66MHz(PCI Bus 33MHz)
150MHz 60MHz(PCI Bus 30MHz)
166MHz 66MHz(PCI Bus 33MHz)
In the table above, the 50, 60 and 66 MHz figures are oscillator speeds that
establish the external clock speed. The PCI Bus clock speed is fixed at one
half of the external clock speed.
J41: Single/Dual CPU Selector
1
Dual Processor mode
P54C in "A" socket
P54C or P54CM in "B" socket
Single Processor mode
P54C in "A" or "B" socket
1

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3. Make sure the ZIF socket lever is up. To raise the lever, pull it out
to the side a little and raise it as far as it will go. The top plate will
slide back
4. Align the CPU and socket Pin 1 corners. The pins on the bottom
should align with the rows of holes in the socket.
5. Insert the CPU in the socket. It should insert easily. If it does
not, adjust the position of the lever a little.
6. Press the lever down. The top plate will slide foward. You will
feel some resistance as the presure starts to secure the CPU in
the socket. This is normal and will not damage the CPU.
When the CPU is installed, the lever should snap into place at the
side of the socket.
3.5 Operating Systems
With one processor installed you can use this mainboard with any one
processor Operating system that supports Intel CPUs. This includes MS-
DOS and Windows in all versions as well as network operating systems
like Netware etc.
To use the Dual Processor option, you must use an Operating System that
supports the Intel MP Specification for multi-processing. Current avail-
able options are:
Windows NT
Version 3.5 supports dual processing. For Version 3.1, you
can get the MP Specification V1.1 HAL installation kit from
Intel.
OS/2 OS/2 MP will be available shortly or may already be available by
the time you read this.
Upcoming releases
New releases of Novell Netware, SCO MPX and SunSoft
Solaries will also support multiprocessing.

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1-2
2-3
SRAM CACHE SIZE Number and Size Pin Configuration J7
256KB Eight 32K*8 28 pins/chip
512KB Eight 64K*8 32 pins/chip
3.6 Upgrading Cache Memory (Standard SRAM Only)
Standard on S1462 is a 256KB 2nd level cache. It uses 8 32K*8 SRAM's
You can upgrade the cache to 512KB to improve system performance. It
uses 64K*8 SRAM's.
NOTICE: The 64K*8 SRAM chip is longer in length than the 32K*8
chip. Do not insert the 32 K*8 SRAM chip into the top four pin
holes of the socket, it could cause serious damage to your SRAM
chips. Refer to the diagram below.
All SRAM chips must be 20ns (nanoseconds) or faster. The chart below
shows the chips you need for each configuration.
* J6 always on 1-2
* J8 always on 2-3
* All the standard SRAM must be 3.3V output. Please contact the
MANUFACTUR if upgrades for the SRAMs are needed.
Installation of 2nd Level Cache Memory
Pin1 Pin 1
256 KB Cache 512 KB Cache
Use 32K*8 SRAM's Use 64K*8 SRAM's

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3.7 Synchronouse SRAM Cache Memory
The synchronous SRAM can not be upgraded. Standard SRAM and Syn-
chronous SRAM can not be installed at the same time. Once installed with
the Synchronous SRAM, the standard SRAM must be removed.
The table below is the configuration sizes of the SRAM:
* J8 needs to be on 1-2
3.8CMOSRTC&EISACFGSRAM
CMOS RTC includes an internal battery and Real Time Clock circuit. It
provides the date and the time to the system. CFG SRAM is used to keep
information of EISA device configuration for automatic system bootup.
Normally the life time of a RTC internal battery is 10 years. when replacing,
you should use the same model.
3.9 Speaker Connector Installation
S1462 provides a 4-Pin header J19 to connect the speaker. The polarity
can go either way.
3.10 Turbo Switch J16
Most case's panel has a turbo switch to control system speed. Slower
execution speed is required for the programs developed for the old XT.
Because Pentium cannot slow its clock speed on the fly, S1462 uses simu-
lation method to implement TURBO switching function. The J12 on the
mainboard should be connected to the TURBO switch on case panel.
SRAM Cache Size Numberand SizeJ7
256 KB Four32K*18
512KB Four64K*18 1-2
2-3

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3.11 Turbo LED Connector Installation
The TURBO LED on panel can indicate the current speed states of sys-
tem. The TURBO LED connector should be installed to J17 in the correct
direcion.
3.12 Hardware Reset Switch Connetor Installation
The RESET switch on panel provides users with the HARDWARRE RE-
SET functinon which is almost the same as power on/off. The system will
do a cold start after the RESET switch is pushed by the user. The RESET
switch is a 2 PIN connector and should be installed to J20 on mainboard.
3.13 Flash EPROM-Jumper J18
S1462 uses flash memory to store BIOS program. It can be updated as
new BIOS versions become available. The flash utility will guide you through
the process step by step. In some special cases, a non-programmable EPROM
is used on board.
J18 determines which type of EPROM is used. Short 2-3 for 5V flash chip
or EPROM. Short 1-2 for 12V flash chip. J18 is factory set to match the
on board BIOS chip. Please do not alter this Jumper.
5VoltFlash Chip or 12Volt flash Chip
nonprogrammable
EPROM
J18: BIOSCHIPSETTING
Pins
1
2
3

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3.14 Peripheral Device Installation
After controller jumpers setup, the mainboard can be mounted onto the
case. Then install the peripheral controller, display interface, and the disk
controller.
If the PCI-Bus device is to be installed in the system, any one of the four
PCI-Bus slots can be used no matter Slave or Master PCI-Bus device being
installed.
If the EISA-Bus drivers is to be installed in the system, only four Bus-
Master devices can be installed. EISA slot 1 or slot 5, slot 2, slot 3 and
slot 4.
After installing the peripheral controller, the user should check everything
again, and prepare to power-on the system.
3.15 Turbo / Deturbo by keyboard
press <Ctrl> + <Alt> + [-] : turn off turbo function.
press <Ctrl> + <Alt> + [+] : turn on turbo function.

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3.16 Connecting the Power Supply
There are two system power supply connectors on the mainboard. One
is for a 5 volt power supply, and the other is used for the 3.3 volt power
supply. If the power suply in a 3.3 volt mode, you can connect the leads
to the 3.3 volt connector. If the supply provides 5 volts only, you must
connect the leads to the 5 volt connector. Set the J29 on the "on" posi-
tion.
Good Power Signal
VCC
+12V
-12V
GND
GND
GND
GND
-5V
VCC
VCC
VCC
5 volt
power
connector
pinout
3 volt
power
connector
pinout
Pin 1
Pin 1 GND
GND
GND
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
GND
GND
GND
To connect the leads from either voltage power supply, you should first
make sure the power supply is unplugged. Most power supplies have two
leads. Each lead has six wires, two of which are black. Orient the
connectors so the black wires are in the middle of the 5V power supply
and for the 3.3V the black wires are on the outside.