VersaLogic VL-486-4 User manual

Reference
ReferenceReference
Reference
Manual
ManualManual
Manual
VL-486-4
Industrial CPU Card
for the STD 32 Bus

VL-486-4
Industrial CPU Card
for the STD 32 Bus
TM
M486-4

VL-486-4
486SXLC Industrial Computer
for the STD 32 Bus
REFERENCE MANUAL
Doc. Rev. 01/97
VERSALOGIC CORPORATION
WWW.VERSALOGIC.COM
3888 Stewart Road
Eugene, OR 97402
[phone]
Fax [phone]
Contents Copyright ©1997
All Rights Reserved
Notice:
Although every effort has been made to ensure this document is error-free, VersaLogic makes no
representations or warranties with respect to this product and specifically disclaims any implied
warranties of merchantability or fitness for any particular purpose.
VersaLogic reserves the right to revise this product and associated documentation at any time
without obligation to notify anyone of such changes.
PC/104 and the PC/104 logo are trademarks of the PC/104 Consortium.

iii
Table of Contents
Other References ..............................................................................................................vii
1. Overview...................................................................................................................................1
Using This Manual .............................................................................................................1
Introduction ........................................................................................................................1
PC/AT Compatibility.............................................................................................1
STD BUS Compatibility........................................................................................1
On-Board Memory ................................................................................................2
Hard Disk and Floppy Disk Interface.................................................................... 2
Digital I/O (Opto 22) Interface..............................................................................2
COM Ports.............................................................................................................2
Parallel Port ...........................................................................................................2
Counters/Timers ....................................................................................................2
Real Time Clock with CMOS RAM .....................................................................3
Interrupt Controllers..............................................................................................3
DMA Controllers...................................................................................................3
Watchdog Timer....................................................................................................3
Technical Specifications..................................................................................................... 4
Technical Support...............................................................................................................5
2. DOS Based Quick Start.........................................................................................................7
Introduction ........................................................................................................................7
Installation..........................................................................................................................8
Activating the Battery.........................................................................................................8
Jumper Locations................................................................................................................9
Card Installation ...............................................................................................................10
Monitor and Keyboard Installation ..................................................................................11
Cable Installation..............................................................................................................12
CMOS RAM Setup...........................................................................................................12
CMOS Setup Options.......................................................................................................13
Main CMOS Setup Menu....................................................................................13
Basic CMOS Configuration.................................................................................13
Advanced CMOS Configuration .........................................................................13
Reset CMOS to Last Known Values...................................................................13
Reset CMOS to Factory Defaults........................................................................14
Write to CMOS and Exit.....................................................................................14
Exit Without Changing CMOS............................................................................14
Clearing the CMOS RAM................................................................................................15
3. Configuration.........................................................................................................................17
Hardware Jumper Summary.............................................................................................17
Jumper Block Locations......................................................................................18
Memory Configuration.....................................................................................................21
ROM Configuration.............................................................................................21
Compatible ROM Devices...................................................................................21

Table of Contents
iv
RAM Configuration.............................................................................................22
Compatible RAM Devices...................................................................................22
CMOS RAM Configuration ................................................................................23
Memory Mapping................................................................................................24
I/O Configuration .............................................................................................................25
Using 8-Bit I/O Cards..........................................................................................25
Using 10-Bit I/O Cards........................................................................................25
Using 16-Bit I/O Cards........................................................................................26
COM2 Configuration........................................................................................................ 27
RS-232 Operation................................................................................................27
RS-422 Operation................................................................................................27
RS-485 Operation................................................................................................27
Opto 22 Rack Configuration.............................................................................................29
Rack Power Control.............................................................................................29
Multiprocessor Configuration ..........................................................................................30
Multiprocessor Jumper Configuration.................................................................30
Resistor Pack Configuration................................................................................31
Multiprocessor CPU Reset ..................................................................................31
Interrupt Configuration..................................................................................................... 32
Interrupt Configuration Jumpers .........................................................................33
STD Bus Interrupt Signals...................................................................................34
CPU Interrupt Request Inputs..............................................................................35
Interprocessor Communications Interrupt Configuration ...................................37
Non-maskable Interrupt Configuration ...............................................................37
DMA Configuration..........................................................................................................38
DMA Channel Allocation................................................................................................. 39
Board Initialization...........................................................................................................40
82C836 Initialization...........................................................................................41
82C721 Initialization...........................................................................................42
486SXLC Initialization........................................................................................42
RAM Refresh Initialization.................................................................................43
4. Installation.............................................................................................................................. 45
Introduction ......................................................................................................................45
Activating the Battery.......................................................................................................45
Card Insertion and Extraction........................................................................................... 45
Card Installation ..................................................................................................46
Card Placement....................................................................................................46
STD 32 Bus Installation Guidelines....................................................................46
External Connections........................................................................................................47
Connector Functions............................................................................................47
Connector Locations............................................................................................47
Mating Connectors and Cable Assemblies..........................................................48
Cable Assembly Diagrams ..................................................................................49
J1, J4 – Serial Port Connectors............................................................................50
J2 – Digital I/O Connector...................................................................................51
J3 – LPT1 Parallel Port Connector......................................................................52
J5 – Counter/Timer - Digital I/O - Interrupt Connector...................................... 53

vii.
J6 – DMA Control Signals Connector.................................................................54
L1 – Speaker Connector ......................................................................................55
5. Register Descriptions.......................................................................................................... 57
Introduction ......................................................................................................................57
Register Summary ............................................................................................................57
Direct Memory Access — Channel 1..................................................................58
Direct Memory Access — Channel 2..................................................................59
Direct Memory Access — Page Registers ..........................................................59
COM1 Serial Port................................................................................................60
COM2 Serial Port...............................................................................................60
LPT1 Parallel Port..............................................................................................61
Chipset Registers.................................................................................................61
Floppy Disk Drive Controller.............................................................................. 62
IDE Hard Disk Drive Controller .........................................................................62
Interrupt Controller — Master.............................................................................63
Interrupt Controller — Slave...............................................................................63
Counter/Timers.................................................................................................... 64
Miscellaneous......................................................................................................64
CIO Chip..............................................................................................................64
Special Control Register......................................................................................65
Watchdog Timer Hold-Off Register....................................................................66
Map and Paging Control Register .......................................................................67
6. CIO Chip..................................................................................................................................69
Introduction ......................................................................................................................69
Features................................................................................................................70
Overview..............................................................................................................70
I/O Ports...............................................................................................................70
Ports A and B.......................................................................................................70
Port C...................................................................................................................71
Counter/Timers.................................................................................................... 71
Interrupt Control Logic........................................................................................71
Register Description.........................................................................................................71
Introduction .........................................................................................................71
CIO Registers ......................................................................................................72
Register Access....................................................................................................73
State 0 ..................................................................................................................73
State 1 ..................................................................................................................73
Master Control Registers..................................................................................................74
Master Interrupt Control Register .......................................................................74
Master Configuration Control Register...............................................................76
Port Mode Specification Register........................................................................78
Port Handshake Specification Registers...........................................................................79
Port A/B Handshake Specification Registers......................................................79
Port Command and Status Registers ...................................................................79
Bit Path Definition Registers............................................................................................81
Data Path Polarity Registers................................................................................81
Data Direction Registers......................................................................................81

Table of Contents
vi
Special I/O Control Registers..............................................................................82
Pattern Definition Registers .............................................................................................83
Pattern Polarity Register......................................................................................83
Pattern Transition Register..................................................................................83
Pattern Mask Register..........................................................................................83
Port A and B Data Registers................................................................................84
Port C Data Register............................................................................................85
Counter/Timer Control Registers........................................................................85
Counter/Timer Mode Specification Registers.....................................................85
Counter/Timer Command Status Registers.........................................................87
Counter/Timer Time Constant Registers............................................................. 89
Counter/Timer Current Count Registers .............................................................90
Interrupt Related Registers...............................................................................................90
Interrupt Vector Registers ...................................................................................90
Current Vector Register....................................................................................... 91
I/O Port Operation ............................................................................................................92
Overview..............................................................................................................92
Pattern-Recognition Logic Operation..................................................................92
Bit Port Operation................................................................................................92
Bit Port Simple Operation ...................................................................................92
Bit Port Pattern-Recognition Operation ..............................................................93
Counter/Timer Operation ................................................................................................. 94
Counter/Timer Architecture ................................................................................94
Counter/Timer Sequence Of Events....................................................................95
Initializing the Counter/Timer.............................................................................95
Starting the Counter/Timer..................................................................................96
Countdown Sequence ..........................................................................................96
Ending Condition.................................................................................................97
Counter/Timer Output .........................................................................................98
Linked Sequence..................................................................................................98
Interrupt Operation...........................................................................................................99
Overview..............................................................................................................99
Priority Handling and the CIO.............................................................................99
The Four Interrupt Logic Functions ....................................................................99
Generating the Interrupt Request.........................................................................99
Identification of the Highest-Priority Interrupt Request...................................100
Interrupt Operation............................................................................................101
CIO Initialization............................................................................................................ 101
Introduction .......................................................................................................101
Enable Bits Operation........................................................................................102
Programming ..................................................................................................................102
Interrupt Code Example.....................................................................................103
Appendix A — Schematic.....................................................................................................107
Index...........................................................................................................................................111