Analog Devices Blackfin FPGA EZ-Extender User manual

Blackfin®FPGA EZ-Extender®
Manual
Revision 2.0, April 2006
Part Number
82-000920-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106 a

Copyright Information
©2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The Blackfin FPGA EZ-Extender is warranted against defects in materials
and workmanship for a period of one year from the date of purchase from
Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by impli-
cation or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, Blackfin, VisualDSP++, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.

Regulatory Compliance
The Blackfin FPGA EZ-Extender has been certified to comply with the
essential requirements of the European EMC directive 89/336/EEC
(inclusive 93/68/EEC) and, therefore, carries the “CE” mark.
The Blackfin FPGA EZ-Extender had been appended to Analog Devices
Development Tools Technical Construction File referenced
“DSPTOOLS1” dated December 21, 1997 and was awarded CE Certifi-
cation by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electro-
static charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.

Blackfin FPGA EZ-Extender Manual v
CONTENTS
PREFACE
Product Overview ........................................................................... ix
Purpose of This Manual .................................................................. xi
Intended Audience .......................................................................... xi
Manual Contents ........................................................................... xii
What’s New in This Manual ........................................................... xii
Technical or Customer Support ..................................................... xiii
Supported Products ....................................................................... xiii
Product Information ...................................................................... xiv
Related Documents .................................................................. xiv
Notation Conventions .................................................................... xvi
FPGA EZ-EXTENDER INTERFACES
FPGA EZ-Extender Setup ............................................................. 1-1
FPGA Software and Firmware ....................................................... 1-2
FPGA EZ-Extender Overview ....................................................... 1-3
FPGA EZ-EXTENDER HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
Programming the FPGA ................................................................ 2-3

CONTENTS
vi Blackfin FPGA EZ-Extender Manual
FPGA Programming via JTAG ................................................ 2-4
FPGA Programming via Serial ROM ....................................... 2-5
FPGA Programming via Blackfin Application .......................... 2-6
Programming the Serial ROM ....................................................... 2-7
Serial ROM via JTAG Header ................................................. 2-7
Power ........................................................................................... 2-8
Power In Header (P12) ............................................................ 2-9
3.3V Header (P13) .................................................................. 2-9
2.5V Header (P42) ................................................................ 2-10
1.2V Header (P43) ................................................................ 2-10
Jumpers ...................................................................................... 2-11
Serial ROM Boot Jumper (JP1) ............................................. 2-12
Config Done Jumper (JP2) .................................................... 2-12
Config Program Jumper (JP3) ............................................... 2-13
Boot Jumper (JP4) ................................................................ 2-14
FPGA Input Jumpers (JP5) ................................................... 2-14
Push Buttons and LEDs .............................................................. 2-15
Program Push Button (SW1) ................................................. 2-15
PB1 Push Button (SW3) ....................................................... 2-15
PB2 Push Button (SW4) ....................................................... 2-16
Status LEDs (LED1–8) ......................................................... 2-17
Power LED (LED9) .............................................................. 2-17
Done LED (LED10) ............................................................. 2-17
Connectors ................................................................................. 2-18

Blackfin FPGA EZ-Extender Manual vii
CONTENTS
Expansion Interface (P1–3 and J1–3) ..................................... 2-19
IDC Connectors (P8, P14, P16, and P17) .............................. 2-19
IDC Connectors (P5 and P7) ................................................ 2-20
High-Speed Connector (P4) .................................................. 2-20
FPGA EZ-EXTENDER BILL OF MATERIALS
FPGA EZ-EXTENDER SCHEMATIC
Title Page .................................................................................... B-1
FPGA Configuration .................................................................... B-2
SRAM, FPGA, Banks 7 and 8 ...................................................... B-3
Expansion Interface Connector 1 .................................................. B-4
FPGA Banks 0 and 1 .................................................................... B-5
Expansion Interface Connector 2 .................................................. B-6
FPGA Banks 2 and 3 .................................................................... B-7
Expansion Interface Connector 3 .................................................. B-8
FPGA Banks 4 and 5 .................................................................... B-9
User IO ..................................................................................... B-10
Power ........................................................................................ B-11
Prototyping Area ........................................................................ B-12
INDEX

CONTENTS
viii Blackfin FPGA EZ-Extender Manual

Blackfin FPGA EZ-Extender Manual ix
PREFACE
Thank you for purchasing the Blackfin®Field-Programmable Gate Array
(FPGA) EZ-Extender®, Analog Devices, Inc. (ADI) extension board to
the EZ-KIT Lite®evaluation system for ADSP-BF533, ADSP-BF537,
and ADSP-BF561 Blackfin processors.
The Blackfin processors are embedded processors that support a Media
Instruction Set Computing (MISC) architecture. This architecture is the
natural merging of RISC, media functions, and digital signal processing
characteristics towards delivering signal processing performance in a
microprocessor-like environment.
The EZ-KIT Lite and FPGA EZ-Extender are designed to be used in con-
junction with the VisualDSP++®development environment.
VisualDSP++ offers a powerful programming tool with new flexibility that
significantly decreases the time required to port software code to a proces-
sor, reducing time-to-market.
To learn more about Analog Devices development software, go to
http://www.analog.com/processors/tools/.
Product Overview
The Blackfin FPGA EZ-Extender is a separately sold extension board that
plugs onto the expansion interface of the ADSP-BF533, ADSP-BF537, or
ADSP-BF561 EZ-KIT Lite evaluation system. The extension board aids
the design and prototyping phases of ADSP-BF533, ADSP-BF537, or
ADSP-BF561 processor targeted applications.

Product Overview
x Blackfin FPGA EZ-Extender Manual
The board extends the capabilities of the evaluation system by providing a
Xilinx FPGA with external memory, IDC connectors for off-board con-
nections, and a small bread board area.
The Blackfin FPGA EZ-Extender features:
• Xilinx Spartan III Field-Programmable Gate Array
DXC3S1000
DFG456 package
• Asynchronous static random access memory (SRAM)
DDirectly connected to FPGA
D2 MB (512K x 16 bits x 2 chips)
DTSOP44 package
• 25 MHz oscillator
DDirectly connected to global clock of FPGA
• Socket for auxiliary oscillator
DDirectly connected to global clock of FPGA
• IDC thru-hole connectors
DAllows quick access to Blackfin and FPGA pins for probing
DAllows access to Blackfin and FPGA pins for off-board
connections
• High-speed connector
DAllows access to Blackfin and FPGA pins for high-speed
application
• Expansion interface connectors
DAllows access to ADI’s family of Blackfin EZ-Extenders

Blackfin FPGA EZ-Extender Manual xi
Preface
• Two push buttons
DDirectly connected to FPGA
DOne with external debounce circuitry and one without
• Eight flag LEDs
DDirectly connected to FPGA
Before using any of the interfaces, follow the setup procedure in “FPGA
EZ-Extender Setup” on page 1-1.
Example programs are available to demonstrate the capabilities of the
Blackfin FPGA EZ-Extender board.
Purpose of This Manual
The Blackfin FPGA EZ-Extender Manual describes the operation and con-
figuration of the components on the extension board. A schematic and a
bill of materials are provided as a reference for future Blackfin processor
board designs.
Intended Audience
This manual is a user’s guide and reference to the Blackfin FPGA
EZ-Extender. Programmers who are familiar with the Analog Devices
Blackfin processor architecture, operation, and development tools are the
primary audience for this manual. The user should also be familiar with
basic FPGA development and Xilinx’s Spartan III family of FPGAs.
Programmers who are unfamiliar with VisualDSP++ or EZ-KIT Lite eval-
uation software should refer to the ADSP-BF533, ADSP-BF537, or
ADSP-BF561 Evaluation System Manual, VisualDSP++ online Help, and
user’s or getting started guides. For the locations of these documents, refer
to “Related Documents”.

Manual Contents
xii Blackfin FPGA EZ-Extender Manual
Manual Contents
The manual consists of:
• Chapter 1, “FPGA EZ-Extender Interfaces” on page 1-1
Provides basic board information.
• Chapter 2, “FPGA EZ-Extender Hardware Reference” on page 2-1
Provides information on the hardware aspects of the board.
• Appendix A, “FPGA EZ-Extender Bill Of Materials” on page A-1
Provides a list of components used to manufacture the
EZ-Extender board.
• Appendix B, “FPGA EZ-Extender Schematic” on page B-1
Provides the resources to allow EZ-KIT Lite board-level debugging
or to use as a reference design.
LAppendix B now is part of the online Help. The PDF version of
the Blackfin FPGA EZ-Extender Manual located in the Docs\EZ-KIT
Lite Manuals folder on the installation CD. Alternatively, the
book can be found on the Analog Devices Web site,
www.analog.com/processors.
What’s New in This Manual
This edition of the Blackfin FPGA EZ-Extender Manual has been updated
for the latest revision of VisualDSP++.

Blackfin FPGA EZ-Extender Manual xiii
Preface
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
[email protected]
• E-mail processor questions to
[email protected] (World wide support)
[email protected] (Europe support)
[email protected] (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Products
The Blackfin FPGA EZ-Extender is designed as an extension board to the
ADSP-BF533, ADSP-BF537, and ADSP-BF561 EZ-KIT Lite evaluation
systems.

Product Information
xiv Blackfin FPGA EZ-Extender Manual
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Analog Devices is online at www.analog.com. Our Web site provides infor-
mation about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
Related Documents
For information on product related development software, see the follow-
ing publications.
Table 1. Related Processor Publications
Title Description
•ADSP-BF533 Embedded Processor Datasheet
•ADSP-BF536/ADSP-BF537 Embedded Pro-
cessor Datasheet
•ASP-BF561 Blackfin Embedded Symmetric
Multi-Processor Datasheet
General functional description, pinout, and
timing.
•ADSP-BF533 Blackfin Processor Hardware
Reference
•ADSP-BF537 Blackfin Processor Hardware
Reference
•ASP-BF561 Blackfin Processor Hardware
Reference
Description of internal processor architecture
and all register functions
Blackfin Processor Instruction Set Reference Description of all allowed processor assembly
instructions.

Blackfin FPGA EZ-Extender Manual xv
Preface
All documentation is available online. Most documentation is available in
printed form.
Visit the Technical Library Web site to access all processor and tools man-
uals and data sheets:
http://www.analog.com/processors/resources/technicalLibrary.
For more information on the Xilinx Spartan III FPGA, refer to the
datasheet located at www.xilinx.com.
Table 2. Related VisualDSP++ Publications
Title Description
•ADSP-BF533 EZ-KIT Lite Evaluation
System Manual
•ADSP-BF537 EZ-KIT Lite Evaluation
System Manual
•ADSP-BF561 EZ-KIT Lite Evaluation
System Manual
Description of the EZ-KIT Lite features and usage.
LNote: For the ADSP-BF537 EZ-KIT
Lite, there is additional Getting
Started with ADSP-BF537 EZ-KIT
Lite.
VisualDSP++ User’s Guide Description of VisualDSP++ features and usage
VisualDSP++ Assembler and Preprocessor
Manual
Description of the assembler function and com-
mands
VisualDSP++ C/C++ Complier and
Library Manual for Blackfin Processors
Description of the complier function and com-
mands for Blackfin processors
VisualDSP++ Linker and Utilities Manual Description of the linker function and commands
VisualDSP++ Loader and Utilities Manual Description of the loader function and commands

Notation Conventions
xvi Blackfin FPGA EZ-Extender Manual
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
LAdditional conventions, which apply only to specific chapters, may
appear throughout this document.
Example Description
{this | that} Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
rated by vertical bars; read the example as an optional this or that.
[this,…] Optional item lists in syntax descriptions appear within brackets
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of this.
.SECTION Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename Non-keyword placeholders appear in text with italic style format.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
L
a
[

Blackfin FPGA EZ-Extender Manual 1-1
1 FPGA EZ-EXTENDER
INTERFACES
This chapter provides the setup procedures for both the Blackfin
Field-Programmable Gate Array (FPGA) EZ-Extender and EZ-KIT Lite
(ADSP-BF533, ADSP-BF537 or ADSP-BF561). It also provides an over-
view of the extender board.
The information is presented in the following order.
•“FPGA EZ-Extender Setup” on page 1-1
•“FPGA Software and Firmware” on page 1-2
•“FPGA EZ-Extender Overview” on page 1-3
FPGA EZ-Extender Setup
It is very important to set up all of the components of the system contain-
ing the FPGA EZ-Extender before applying power to that system. The
following procedure is recommended.
Power your system when these steps are completed:
1. Read the applicable design interface section in this chapter—the
text provides an overview of the capabilities of the EZ-Extender.
2. Read “System Architecture” on page 2-2 to understand the physical
connections of the extender board. For detailed information, refer
to “FPGA EZ-Extender Schematic” on page B-1.

FPGA Software and Firmware
1-2 Blackfin FPGA EZ-Extender Manual
3. Remove any rubber feet attached to the EZ-KIT Lite if the feet
cover the printed circuit board (PCB) mounting holes. In place of
the rubber feet, install the four nylon feet and screws provided with
the FPGA EZ-Extender. Install the nylon feet in the mounting
holes of the EZ-KIT Lite’s PCB. Flip the EZ-KIT Lite upside
down so that the three expansion headers (J1–3) are facing up.
4. Set the switches and jumpers on the FPGA EZ-Extender board.
Use the block diagram in Figure 2-1 on page 2-2 in conjunction
with “Jumpers” on page 2-11.
5. Set the switches and jumpers on the EZ-KIT Lite board. If not
already, familiarize yourself with the documentation and schemat-
ics of the EZ-KIT Lite (see “Related Documents” on page -xiv).
Compare the expansion interface signals of the FPGA EZ-Extender
board with the signals of the EZ-KIT Lite board to ensure there is
no contention. For example, it may be necessary to disable other
devices connected to the expansion interface of the processor and
disable the push buttons on the EZ-KIT Lite.
6. Install the FPGA EZ-Extender on the EZ-KIT Lite via the
three-connector expansion interface. Figure 1-1 shows how an
FPGA EZ-Extender plugs onto an EZ-KIT Lite.
7. Configure any other interfacing boards, for example, another
EZ-Extender.
FPGA Software and Firmware
For information on the FPGA software, refer to the
FPGA Extender Readme.txt file located in the
…\Blackfin\Examples\FPGA EZ-EXTENDER subdirectory of the Visu-
alDSP++ installation directory.

Blackfin FPGA EZ-Extender Manual 1-3
FPGA EZ-Extender Interfaces
FPGA EZ-Extender Overview
The Blackfin FPGA EZ-Extender connects a Xilinx®Spartan III
Field-Programmable Gate Array (FPGA for short) to the ADSP-BF533,
ADSP-BF537, or the ADSP-BF561 EZ-KIT Lite. The FPGA connects to
the Blackfin processor via the expansion interface.
The extender board, by default, is powered by an external 7V power sup-
ply provided with the product. You can also power the FPGA
EZ-Extender by the expansion interface of the EZ-KIT Lite or an external
power supply. An external supply must be used whenever application code
exceeds the recommended core and IO power supported by the FPGA
EZ-Extender. For more information on the jumper and connector settings
required to power the extender, review “Power” on page 2-8 as well as
“FPGA EZ-Extender Schematic” on page B-1.
Figure 1-1. FPGA EZ-Extender Setup

FPGA EZ-Extender Overview
1-4 Blackfin FPGA EZ-Extender Manual
The FPGA EZ-Extender contains 2 MB of asynchronous SRAM memory,
powered by a 3.3V supply. The SRAM memory connects to banks 6 and 7
of the FPGA and can perform simple data storage instructions in applica-
tion-specific code.
The FPGA EZ-Extender includes a 25 MHz oscillator (U6) connected to
the FPGA via the dedicated global clock 1 (GCLK1) pin, facilitating devel-
opment of applications that require a clock. A second clock socket (U7) is
left unpopulated to allow a user to place an oscillator with a specific fre-
quency for the FPGA. The second clock socket connects to the global
clock 6 (GCLK6) pin of the FPGA.
The extender has eight LEDs (LED1–8) and two push buttons (SW3–4) for
applications that require status reporting and user control. The push but-
tons are active low and when pressed, provide a logic 0to the respective
FPGA nets. For inputs that require a permanent input low, use the jumper
inputs on JP4. When a jumper is populated on one of the four nets of JP4,
the respective pin is hard wired to a logic 0. For more information about
the LEDs, push button switches, and jumper inputs, refer to “FPGA
EZ-Extender Hardware Reference” on page 2-1.
There are various ways to program the FPGA. By default, the FPGA is
programmed in its slave serial mode by the flash programming utility in
VisualDSP++. The program configures the FPGA using the Blackfin pro-
cessor’s flag pins and/or serial port pins. For more information on how to
use the flash programming utility within VisualDSP++, refer to the
FPGA Extender Readme.txt file located in the
…\Blackfin\Examples\FPGA EZ-EXTENDER subdirectory of the Visu-
alDSP++ installation directory.
A second method of programming the FPGA is by using a Xilinx JTAG
cable and software. The Xilinx JTAG cable connects to the FPGA JTAG
header (P15). For more information about programming the FPGA via a
Xilinx JTAG cable, refer to the manufacturer’s website at www.xilinx.com.