Vlsi VS1000 Manual

PRELIMINARY DOCUMENT
VS1000 PROGRAMMER’SGUIDE
VSMPG “VLSI Solution Audio Decoder”
Project Code: Support.VS1000
Project Name: VSMPG
All information in this document is provided as-is without warranty. Features are
subject to change without notice. This document may contain mistakes and typ-
ing errors. Please contact VLSI if you suspect an error.
Revision History
Rev. Date Author Description
0.1 2007-03-23 PKP Preliminary version
0.11 2007-04-16 PKP Minor adjustments
0.12 2007-06-28 PKP Additions for version 1.33 of developer tools
0.14 2007-06-28 PKP VS1000B minor update
0.15 2008-06-30 POj vskit1.34: lib and include merged
0.16 2009-07-06 POj USB register map fixed.
0.20 2011-10-04 POj More NF peripheral information.
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Who needs to read this document
This document describes the programming interface, register map and and integrated
peripherals of the VS1000. It’s primarily meant for those that wish to add to the func-
tionality of the ROM code in VS1000 or design completely new software for the chip.
If you use the USB...
The example “Changing the USB descriptors” should be read by all vendors that have
USB functionality in their end-products. Although the ROM software is functional as is,
all such vendors should change the USB descriptors to identify the vendor and product
ID’s correctly.
Additionally, all vendors that ship devices conforming to the USB Mass Storage Class
specification should change the USB descriptors and create a unique serial number for
each device. Instructions on how to do this are given in the example.
VS1000B/C
VS1000B is an updated version of VS1000A. VS1000B has many small internal fixes
and some additions that remove some of the restrictions in VS1000A. It is mainly com-
patible with VS1000A, but code needs to be recompiled for VS1000B. This guide was
originally written for VS1000A, so it may not show all of the extra features in VS1000B.
VS1000C is another production test version of VS1000B with identical ROM.
VS1000D
VS1000D includes bug fixes, but is fully backwards-compatible with VS1000C. All soft-
ware works without recompilation, so VS1000D can be used as a direct replacement.
The patches required for VS1000C are no longer necessary, which can save a bit of
code space.
The most important VS1000D changes:
•Code can be loaded and executed when in USB RAM disk mode without
detaching the device.
•Default 3 V IO voltage setting reduced from 3.6 V to 3.3 V (control value 31 to 27).
•SCSI supports the full 32-bit block address (2048GB).
•BusyWait1() now waits 1 ms at 12 MHz clock.
•Time to enter low-power pause mode doubled.
•Ignores subdirectories in FAT12 disks.
•RAMDISK label changed to VS1000D_RAM to make it possible to detect VS1000D.
•USB descriptors, including device ID is the same as with VS1000B.
•Fixed-width Latin-1 font (7x8 pixels) and 8-bit bit-reverse table added to YROM.
All new code should be written for VS1000D.
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VS1000 PROGRAMMER’SGUIDE VSMPG
Contents
Introduction 2
Table of Contents 3
1 Introducing the VS1000 7
2 VS_DSP Basics 8
3 VS1000 RAM Memory Map 9
4 VS1000 Integrated Peripherals 10
5 VS1000 Register Map and Frequently Used Tables 11
6 Software Tools 16
6.1 vcc........................................ 16
6.2 vslink ...................................... 16
6.3 vs3emu ..................................... 16
6.4 coff2spiboot................................... 16
6.5 coff2nandboot ................................. 17
6.6 makenandimage (required for VS1000A only) . . . . . . . . . . . . . . . . 17
7 Examples 18
7.1 Hello,World! .................................. 18
7.1.1 Compiling................................ 18
7.1.2 Linking ................................. 19
7.1.3 Loading................................. 19
7.1.4 Note................................... 20
7.1.5 InputandOutput............................ 20
7.2 MakingtheLEDsblink............................. 22
7.3 Adjusting the Player User Interface . . . . . . . . . . . . . . . . . . . . . . 23
7.4 Hooking custom storage controller . . . . . . . . . . . . . . . . . . . . . . 25
7.4.1 ReadDiskSector is for reading only . . . . . . . . . . . . . . . . . . 26
7.5 Setting your own USB descriptors . . . . . . . . . . . . . . . . . . . . . . 29
7.5.1 Descriptor data format . . . . . . . . . . . . . . . . . . . . . . . . . 29
8 Booting from SPI EEPROM 32
8.0.2 Using a VS1000 Developer Board as an eeprommer . . . . . . . . 32
9 Booting from NAND FLASH 36
9.1 Nand Flash startup sequence and structure . . . . . . . . . . . . . . . . . 36
9.2 Preparing a nand flash image . . . . . . . . . . . . . . . . . . . . . . . . . 37
9.3 Using the VS1000 Demostration/Developer Board as a nand flash writer . 38
10 Using an external display 40
11 Peripheral documentation 41
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12 VS1000 System Controller 41
12.1General ..................................... 41
12.2Registers .................................... 41
12.2.1 SCI_SYSTEM: System Power and Clock Control . . . . . . . . . . 41
12.2.2USBpowering ............................. 42
12.2.3 SCI_STATUS: System Flags . . . . . . . . . . . . . . . . . . . . . 42
12.2.4USBdetection ............................. 42
12.3ConservingPower ............................... 43
12.4I/OPinRouting................................. 44
12.5 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
13 PLL controller v1.0 2006-05-10 45
13.1General ..................................... 45
13.2 DAC Interpolator control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
13.3Registers .................................... 45
13.3.1 Interpolator Rate (low part) . . . . . . . . . . . . . . . . . . . . . . 45
13.3.2 Interpolator Rate (high part) and PLL control . . . . . . . . . . . . 46
13.4 Overview of VS1000 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . 47
13.5 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
14 Interruptable General Purpose IO (VS1000) v1.0 2002-04-23 49
14.1General ..................................... 49
14.2Registers .................................... 49
14.2.1 Data Direction GPIOx_DDR . . . . . . . . . . . . . . . . . . . . . . 49
14.2.2 Output Data GPIOx_ODATA . . . . . . . . . . . . . . . . . . . . . . 49
14.2.3 Input Data GPIOx_IDATA . . . . . . . . . . . . . . . . . . . . . . . 50
14.2.4 Falling Edge Interrupt Enable GPIOx_INT_FALL . . . . . . . . . . 50
14.2.5 Rising Edge Interrupt Enable GPIOx_INT_RISE . . . . . . . . . . 50
14.2.6 Interrupt Pending Source GPIOx_INT_PEND . . . . . . . . . . . . 50
14.2.7 Data Set Mask GPIOx_SET_MASK . . . . . . . . . . . . . . . . . 50
14.2.8 Data Clear Mask GPIOx_CLEAR_MASK . . . . . . . . . . . . . . 51
14.2.9 Bit Engine Config GPIOx_BIT_CONF . . . . . . . . . . . . . . . . 51
14.2.10Bit Engine 0 Read/Write GPIOx_BIT_ENG0 . . . . . . . . . . . . . 51
14.2.11Bit Engine 1 Read/Write GPIOx_BIT_ENG1 . . . . . . . . . . . . . 51
14.3 VS1000 GPIO Pin Mappings . . . . . . . . . . . . . . . . . . . . . . . . . 52
14.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
15 Interrupt Controller v1.0 2002-04-23 54
15.1Registers .................................... 54
15.1.1 Enable INT_ENABLE[L/H][0/1] . . . . . . . . . . . . . . . . . . . . 55
15.1.2 Origin INT_ORIGIN[0/1] . . . . . . . . . . . . . . . . . . . . . . . . 55
15.1.3 Vector INT_VECTOR . . . . . . . . . . . . . . . . . . . . . . . . . 56
15.1.4 Enable Counter INT_ENCOUNT . . . . . . . . . . . . . . . . . . . 56
15.1.5 Global Disable INT_GLOB_DIS . . . . . . . . . . . . . . . . . . . . 56
15.1.6 Global Enable INT_GLOB_EN . . . . . . . . . . . . . . . . . . . . 56
15.2 VS1000 Interrupt Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
15.3 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
16 SPI v1.3 2005-06-09 58
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16.1General ..................................... 58
16.2TheSPIBlock ................................. 59
16.2.1MasterMode .............................. 59
16.2.2SlaveMode............................... 60
16.3Registers .................................... 61
16.3.1 Main Configuration SPIx_CONFIG . . . . . . . . . . . . . . . . . . 61
16.3.2 Clock Configuration SPIx_CLKCONFIG . . . . . . . . . . . . . . . 62
16.3.3 Status SPIx_STATUS . . . . . . . . . . . . . . . . . . . . . . . . . 63
16.3.4DataSPIx_DATA............................ 63
16.3.5 SSI Synchronization SPIx_FSYNC . . . . . . . . . . . . . . . . . . 64
16.4Interrupts .................................... 64
16.5Changesfrom1.2 ............................... 64
16.6 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
16.7 Effect of Clock Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
17 Byte-wide bus/Nand Flash controller v1.0 2006-05-10 66
17.1General ..................................... 66
17.2BlockDiagram ................................. 67
17.3Registers .................................... 68
17.3.1Controlregister............................. 68
17.3.2 Line and Column parity registers . . . . . . . . . . . . . . . . . . . 68
17.3.3Dataregister .............................. 69
17.3.4 Interface control towards physical pins . . . . . . . . . . . . . . . . 69
17.3.5 Interface control towards DSP . . . . . . . . . . . . . . . . . . . . . 70
17.3.6 ECC counter register . . . . . . . . . . . . . . . . . . . . . . . . . . 70
17.4Timing...................................... 71
17.5 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
17.5.1 Nand Flash access methodology . . . . . . . . . . . . . . . . . . . 75
18 Timers v1.0 2002-04-23 76
18.1General ..................................... 76
18.2Registers .................................... 76
18.2.1 Configuration TIMER_CONFIG . . . . . . . . . . . . . . . . . . . . 76
18.2.2 Configuration TIMER_ENABLE . . . . . . . . . . . . . . . . . . . . 77
18.2.3 Timer X Startvalue TIMER_Tx[L/H] . . . . . . . . . . . . . . . . . . 77
18.2.4 Timer X Counter TIMER_TxCNT[L/H] . . . . . . . . . . . . . . . . 77
18.3Interrupts .................................... 77
18.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
19 UART v1.11 2007-03-16 78
19.1General ..................................... 78
19.2Registers .................................... 78
19.2.1 Status UARTx_STATUS . . . . . . . . . . . . . . . . . . . . . . . . 78
19.2.2DataUARTx_DATA........................... 79
19.2.3 Data High UARTx_DATAH . . . . . . . . . . . . . . . . . . . . . . . 79
19.2.4 Divider UARTx_DIV . . . . . . . . . . . . . . . . . . . . . . . . . . 79
19.3 Interrupts and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
19.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
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20 Universal Serial Bus Controller v1.0 2006-01-05 81
20.1General ..................................... 81
20.2Registers .................................... 81
20.2.1 USB_CONFIG - USB Device Config 0xC080 . . . . . . . . . . . . 82
20.2.2 USB_CONTROL - USB Device Control 0xC081 . . . . . . . . . . . 82
20.2.3 USB_STATUS - USB Device Status 0xC082 . . . . . . . . . . . . . 83
20.2.4 USB_RDPTR - Receive buffer read pointer 0xC083 . . . . . . . . 83
20.2.5 USB_WRPTR - Receive buffer write pointer 0xC084 . . . . . . . . 83
20.2.6 USB_EP_SENDn - EPnIN Transmittable Packet Info 0xC088..0xC08B 84
20.2.7 USB_EP_STn - Endpoint flags EPnIN and EP0nUT 0xC090..0xC093 84
20.3 Receiving Packets from PC (EP0OUT, EP1OUT, ... , EP3OUT) . . . . . . 85
20.3.1Reception................................ 85
20.3.2 Sending Packet to PC (EP0IN, EP1IN, ... , EP3IN) . . . . . . . . . 86
20.3.3 How to know that the PC is expecting data . . . . . . . . . . . . . 86
20.3.4Stalling ................................. 86
20.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
20.4.1 Augmenting the ROM functionality . . . . . . . . . . . . . . . . . . 88
20.4.2 Hooking: Example . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
20.4.3 Used memory areas . . . . . . . . . . . . . . . . . . . . . . . . . . 89
21 Watchdog v1.0 2002-08-26 90
21.1General ..................................... 90
21.2Registers .................................... 90
21.3 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
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1 Introducing the VS1000
VS1000 is a complete DSP system-on-chip (SoC) that can be used to implement a mul-
titude of applications such as a single-chip Ogg Vorbis player. VS1000 contains a high-
performance low-power DSP core VS_DSP4, NAND-FLASH interface, Full Speed USB
port, general purpose I/O pins, SPI, UART, as well as a high-quality variable-sample-rate
stereo DAC, and an earphone amplifier and a common voltage buffer.
Reference
Regulator
Regulator
Regulator
Common
Voltage
Driver
Voltage
Monitor
Stereo
Earphone
Driver
Stereo
DAC
AVDD1
AVDD2
AVDD3
Serial
Data/
Control
Interface
UART
Clock
NAND
Flash
Interface/
General IO
<1.6V
USB
X RAM
X ROM
Y RAM
Y ROM
I RAM
I ROM
VSDSP4
processor
USBP
USPN
XCS/GPIO1[0]
SCLK/GPIO1[1]
SI/GPIO1[2]
SO/GPIO1[3]
RX/GPIO1[5]
TX/GPIO1[4]
XTALO
XTALI
Data/
GPIO0[0...7]
Control/
GPIO0[8...14]
XRESETTEST
IOVDD
AVDD
CVDD
IOVDD1
IOVDD2
PWRBTN
VHIGHRCAPCBUFRIGHTLEFT
reset
Figure 1: VS1000 Block Diagram
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2 VS_DSP Basics
At VS1000’s core is the VS_DSP4 signal processor. It has a 16-bit Harward architecture
with three separate 16-bit address spaces: X and Y space for data and I space for
instructions (running code). All of these spaces have both ROM and RAM. In addition,
X and or Y spaces can occupy special function registers for peripheral devices.
X memory Y memory
PROGRAM
CONTROL
PC
Program
memory
VS_DSP CORE
DATAPATH
arithmetic
registers
P register
ALU
X and Y
memory
ADDRESS
CALCULATION
address
registers
Y address ALU
X address ALU
control
registers
decode
logic
Peripheral
interface
PLL clock
generator
Peripheral
devices
Interrupt
arbitrator
Boot loader
Bus switch
Figure 2: VS_DSP General Architecture
Most of the features of the VS_DSP processor can be accessed by using standard C
language, without any specific VS_DSP knowledge. But if you need to develop really
powerful DSP algorithms, use the 40-bit datapath, control the pipeline and take the max-
imum out of the parallel X, Y and I buses, you need to study the VS_DSP architecture
and use assembly language.
The VS_DSP4 architecture manual is included in the VS1000-specific command-line
tools package (vskit140.zip), and also in VSIDE releases. Both packages are down-
loadable from VLSI Solution’s website (www.vlsi.fi).
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3 VS1000 RAM Memory Map
0000
3800
0400
0800
0c00
1000
1400
1800
1c00
2000
2400
2800
2c00
3000
3400
3c00
4000
mallocAreaX
System variables
(Vorbis heap)
audio buffer
mallocAreaY
IMDCT workspace
Y RAM (16−bit)
System Y
variables
User Y statics
Static user variables
IMDCT workspace
Vorbis
workspace
1A00
1B32
1BFF
1F85
X RAM (16−bit)
USB Receive
USB Send
4096 words
(8192 bytes) (8192 bytes)
4096 words
2K words (4K bytes)
I RAM (32−bit)
Interrupt vector (80 words)
USER CODE
1968 words = 7872 bytes
Reserved user static memory: 7872 bytes I + 2240 bytes X + 412 bytes Y, total: 10524 bytes
9216 words
(18432 bytes)
ing vorbis and disk cache,
when USB is connected)
(Vorbis heap when play−
Total stack space: 1024 bytes X + 1024 bytes Y, total: 2048 bytes (for user and system)
Total RAM space: 26624 bytes X + 32768 bytes Y + 8192 bytes I, total: 67584 bytes
stack space and function local variables
Figure 3: VS1000B RAM layout
While playing Ogg Vorbis audio the memory areas available for user are 0x1fa0 to 0x23ff
(1120 words) in X data memory and 0x1b32 to 0x1bff (206 words) in Y data memory.
These areas are included in the default memory description file (mem_desc.vs1000), so
linker can allocate variables into those memory areas.
More memory can be used as temporary storage when audio is not being decoded.
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4 VS1000 Integrated Peripherals
VS1000 contains several integrated peripherals. They are controlled by memory-mapped
special function registers. From the programmer’s point of view this means reading and
writing special memory locations. The peripheral registers in VS1000 are located in the
X address space.
VS1000 chip has the following integrated peripherals:
•21 GPIO pins multiplexed with peripherals, each capable of generating an interrupt
•SPI port with master/slave operation and programmable Frame Sync
•UART port with programmable bit rate and framing error detection
•USB port with 12 Mbit/s signaling rate and 4 KiB of buffer memory
•Digital-to-Analog converter and integrated earphone driver
•Byte-wide Bus / Nand Flash controller with fast 32-byte buffer and ECC calculation
•2 32-bit timers with shared master clock divider
•Interrupt controller, 11 interrupt sources
•3 programmable linear regulators for generating analog, I/O and core voltages
•Internal oscillator for external crystal, can also use external oscillator
•Integrated Clock Generator with PLL and clock multiplier and low-speed modes
•Watchdog timer
The VS1000 has 76 KiB of program ROM and 8 KiB of program RAM. While the latter
might seem like a small amount, note that the ROM code contains many useful rou-
tines, interfaces and tables the RAM code can access. Many internal functions can be
replaced or augmented by hooking a handler vector of a ROM routine.
The amount of data RAM available varies depending on the application. If Vorbis playing
is not used, it can be over 50 KiB. For programs that do play Vorbis files, at least 2652
bytes can be used when Vorbis files are playing.
The complete peripheral documentation is in its own chapter.
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5 VS1000 Register Map and Frequently Used Tables
VS1000 Peripheral Register Map
Address Register Function
0xC000 SCI_SYSTEM System Controller control
0xC001 SCI_STATUS System Controller control and status flags
0xC010 GPIO0_MODE GPIO(0)/Peripheral(1) function for port 0 pins
0xC011 GPIO1_MODE GPIO(0)/Peripheral(1) function for port 1 pins
0xC012 DAC_VOL Digital-to-Analog Converter Volume
0xC013 FREQCTLL Interpolator Frequency low part
0xC014 FREQCTLH Interpolator Frequency high part
0xC015 DAC_LEFT DAC Left Channel
0xC016 DAC_RIGHT DAC Right Channel
0xC020 WDOG_CONFIG Watchdog Config
0xC021 WDOG_RESET Watchdog Reset
0xC022 WDOG_DUMMY Watchdog dummy register
0xC028 UART_STATUS Serial Port Status
0xC029 UART_DATA Serial Port Data byte
0xC02A UART_DATAH Serial Port Data byte shifted 8 bits left
0xC02B UART_DIV Serial Port baudrate generator divider
0xC030 TIMER_CONFIG Timer 0 and 1 Configuration
0xC031 TIMER_ENABLE Timer 0 and 1 Enable/Disable
0xC034 TIMER_T0L Low 16 bits of Timer 0 reload value
0xC035 TIMER_T0H High 16 bits of Timer 0 reload value
0xC036 TIMER_T0CNTL Low 16 bits of Timer 0 current value
0xC037 TIMER_T0CNTH High 16 bits of Timer 0 current value
0xC038 TIMER_T1L Low 16 bits of Timer 1 reload value
0xC039 TIMER_T1H High 16 bits of Timer 1 reload value
0xC03A TIMER_T1CNTL Low 16 bits of Timer 1 current value
0xC03B TIMER_T1CNTH High 16 bits of Timer 1 current value
0xC040 GPIO0_DDR Port 0 Data Direction (“1”=output)
0xC041 GPIO0_ODATA Port 0 Output Data
0xC042 GPIO0_IDATA Port 0 Input Data (pin state)
0xC043 GPIO0_INT_FALL Falling Edge Interrupt Enable
0xC044 GPIO0_INT_RISE Rising Edge Interrupt Enable
0xC045 GPIO0_INT_PEND Interrupt Pending
0xC046 GPIO0_SET_MASK Set output bits high
0xC047 GPIO0_CLEAR_MASK Set output bits low
0xC048 GPIO0_BIT_CONF Bit router engine 0 and 1 configuration
0xC049 GPIO0_BIT_ENG0 Bit router engine 0 data register
0xC04A GPIO0_BIT_ENG1 Bit router engine 1 data register
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VS1000 PROGRAMMER’SGUIDE VSMPG
VS1000 Peripheral Register Map (continued)
Address Register Function
0xC050 GPIO1_DDR Port 1 Data Direction (“1”=output)
0xC051 GPIO1_ODATA Port 1 Output Data
0xC052 GPIO1_IDATA Port 1 Input Data (pin state)
0xC053 GPIO1_INT_FALL Falling Edge Interrupt Enable
0xC054 GPIO1_INT_RISE Rising Edge Interrupt Enable
0xC055 GPIO1_INT_PEND Interrupt Pending
0xC056 GPIO1_SET_MASK Set output bits high
0xC057 GPIO1_CLEAR_MASK Set output bits low
0xC058 GPIO1_BIT_CONF Bit router engine 0 and 1 configuration
0xC059 GPIO1_BIT_ENG0 Bit router engine 0 data register
0xC05A GPIO1_BIT_ENG1 Bit router engine 1 data register
0xC060 NFLSH_CTRL Byte-wide Bus (Nand Flash) Controller Control
0xC061 NFLSH_LPL Calculated Line Parity for 512-byte block
0xC062 NFLSH_CP_LPH Calculated Column Parity for 512-byte block
0xC063 NFLSH_DATA Buffer Data read/write register
0xC064 NFLSH_NFIF Buffer-to-Physical Interface Control
0xC065 NFLSH_DSPIF Buffer-to-DSP Interface Control
0xC066 NFLSH_ECC_CNT Error Correction Code counter
0xC068 SPI0_CONFIG Serial Peripheral Interface Configuration
0xC069 SPI0_CLKCONFIG SPI Clock Configuration
0xC06A SPI0_STATUS SPI Status
0xC06B SPI0_DATA SPI Data read/write register
0xC06C SPI0_FSYNC Frame Sync output bit image
0xC070 INT_ENABLEL Low Priority Interrupt Enable
0xC072 INT_ENABLEH High Priority Interrupt Enable
0xC074 INT_ORIGIN Interrupt Request Status
0xC076 INT_VECTOR Last generated vector
0xC077 INT_ENCOUNT Interrupt disable level counter
0xC078 INT_GLOB_DIS Disable interrupts (increase ENCOUNT)
0xC079 INT_GLOB_EN Enable interrupts (decrease ENCOUNT)
0xC080 USB_CONFIG USB Device Config
0xC081 USB_CONTROL USB Device Control
0xC082 USB_STATUS USB Device Status
0xC083 USB_RDPTR Receive buffer pointer (PC →Device)
0xC084 USB_WRPTR Transmit buffer pointer (Device →PC)
0xC088 USB_EP_SEND0 EP0IN Transmittable Packet Info
0xC089 USB_EP_SEND1 EP1IN Transmittable Packet Info
0xC08A USB_EP_SEND2 EP2IN Transmittable Packet Info
0xC08B USB_EP_SEND3 EP3IN Transmittable Packet Info
0xC090 USB_EP_ST0 Flags for endpoints EP0IN and EP0OUT
0xC091 USB_EP_ST1 Flags for endpoints EP1IN and EP1OUT
0xC092 USB_EP_ST2 Flags for endpoints EP2IN and EP2OUT
0xC093 USB_EP_ST3 Flags for endpoints EP3IN and EP3OUT
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VS1000 PROGRAMMER’SGUIDE VSMPG
VS1000 Interrupt Sources
Name Vector Source
INTV_DAC 0 Digital to Analog Converter
INTV_SPI 1 Serial Peripheral Interface
INTV_USB 2 Universal Serial Bus
INTV_NFLSH 3 Byte-wide Bus (Nand Flash) Controller
INTV_TX 4 UART Transmit
INTV_RX 5 UART Receive
INTV_TIM0 6 Timer 0 underflow
INTV_TIM1 7 Timer 1 underflow
INTV_REGU 8 Input Voltage Monitor
INTV_GPIO0 9 I/O Pin Controller 0
INTV_GPIO1 10 I/O Pin Controller 1
VS1000 I/O Controller 0 pins and peripheral functions
GPIO Ident LQFP
Pin
Function
GPIO0[0] NFDIO0 2 Nand-flash IO0 / General-purpose IO Port 0, bit 0
GPIO0[1] NFDIO1 3 Nand-flash IO1 / General-purpose IO Port 0, bit 1
GPIO0[2] NFDIO2 4 Nand-flash IO2 / General-purpose IO Port 0, bit 2
GPIO0[3] NFDIO3 5 Nand-flash IO3 / General-purpose IO Port 0, bit 3
GPIO0[4] NFDIO4 9 Nand-flash IO4 / General-purpose IO Port 0, bit 4
GPIO0[5] NFDIO5 10 Nand-flash IO5 / General-purpose IO Port 0, bit 5
GPIO0[6] NFDIO6 11 Nand-flash IO6 / General-purpose IO Port 0, bit 6
GPIO0[7] NFDIO7 12 Nand-flash IO7 / General-purpose IO Port 0, bit 7
GPIO0[8] NFRDY 13 Nand-flash READY / General-purpose IO Port 0, bit 8
GPIO0[9] NFRD 14 Nand-flash RD / General-purpose IO Port 0, bit 9
GPIO0[10] NFCE 15 Nand-flash CE / General-purpose IO Port 0, bit 10
GPIO0[11] NFWR 20 Nand-flash WR / General-purpose IO Port 0, bit 11
GPIO0[12] NFCLE 16 Nand-flash CLE / General-purpose IO Port 0, bit 12
GPIO0[13] NFALE 17 Nand-flash ALE / General-purpose IO Port 0, bit 13
GPIO0[14] CS2 21 General-purpose IO Port 0, bit 14
VS1000 I/O Controller 1 pins and peripheral functions
GPIO Ident LQFP
Pin
Function
GPIO1[0] XCS 22 SPI XCS / General-Purpose I/O Port 1, bit 0
GPIO1[1] SCLK 23 SPI CLK / General-Purpose I/O Port 1, bit 1
GPIO1[2] SI 24 SPI MISO / General-Purpose I/O Port 1, bit 2
GPIO1[3] SO 25 SPI MOSI / General-Purpose I/O Port 1, bit 3
GPIO1[4] TX 26 UART TX / General-Purpose I/O Port 1, bit 4
GPIO1[5] RX 27 UART RX / General-Purpose I/O Port 1, bit 5
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VS1000 Handler Vectors (Services)
Address Vector Name Default Handler Remark
0x0000 IdleHook UserInterfaceIdleHook CPU idle
0x0002 InitFileSystem FatInitFileSystem Init storage
0x0004 OpenFile FatOpenFile Open file
0x0006 ReadFile FatReadFile Read file
0x0008 Seek FatSeek Set file position
0x000a Tell FatTell Get file position
0x000c ReadDiskSector MapperReadDiskSector Read 512 bytes
0x000e StereoCopy OldStereoCopy Output samples
0x0015 Sine Test SinTest Sine test
0x0016 Memory Test MemTest Memory test 1
0x0017 Memory Test MemTests Memory tests
0x0018 SetRate RealSetRate Set sample rate
0x001a PowerOff RealPowerOff Close and shutdown
0x001c PlayCurrentFile RealPlayCurrentFile Start playing file
0x001e USBHandler RealUSBHandler USB Task
VS1000 Handler Vectors (Interrupt Controller)
Address Vector Name Default Handler Remark
0x0020 DAC Interrupt dac_int Update sample
0x0021 SPI Interrupt _int (Default Null Handler)
0x0022 USB Interrupt _int (Default Null Handler)
0x0023 Nand Flash Interrupt _int (Default Null Handler)
0x0024 TX Interrupt _int (Default Null Handler)
0x0025 RX Interrupt rx_int ROM Monitor
0x0026 Timer 0 Interrupt tim0_int System timer
0x0027 Timer 1 Interrupt _int (Default Null Handler)
0x0028 Power Interrupt _int (Default Null Handler)
0x0029 GPIO0 Interrupt _int (Default Null Handler)
0x002a GPIO1 Interrupt _int (Default Null Handler)
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VS1000A Handler Vectors (Services)
Address Vector Name Default Remark
0x002c MSCPacketFromPC RealMSCPacketFromPC MSC cmd or data
0x002e DecodeSetupPacket RealDecodeSetupPacket Control endpoint
0x0030 ScsiTaskHandler RealScsiTaskHandler Disk task
0x0032 LoadCheck RealLoadCheck Clock adjust
0x0034 UnsupportedFile DefUnsupportedFile Unknown format
Additional VS1000B Handler Vectors (Services)
0x0036 KeyEventHandler RealKeyEventHandler Perform actions for
key events
0x0038 MassStorage RealMassStorage USB Mass Storage
code
0x003a USBSuspend RealUSBSuspend Code for low-power
mode, used by
USB and low-power
pause
0x003c InitUSBDescriptors RealInitUSBDescriptors Hook to initialize
USB descriptors
0x003e SetVolume RealSetVolume Uses volumeReg
to set DAC_VOL
and bassReg to init
bass/treble controls
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6 Software Tools
Here is a list of the software tools that are necessary to compile and run the examples
of this programming guide. A more complete documentation of the software tools can
be found in the “Tools Manual”, available from VLSI. These command line tools are
available for UNIX and Windows. In addition to these files we recommend using GNU
Make to automatize the compilation process, but you can also compile by typing the
command lines separately in a shell or “MS-DOS Prompt”, or with the help of a suitable
batch file.
Free VSIDE integrated development tool is available and contains example projects for
VS1000.
The various tools can be downloaded from VLSI Solution’s Web Pages www.vlsi.fi .
See under Support / Software.
6.1 vcc
The VLSI C Compiler. Creates a COFF object file from “C” language source file.
Example:
vcc -P130 -O -fsmall-code -I lib -o program.o program.c
6.2 vslink
The linker. Creates a binary program file from multiple COFF object files.
Example:
vslink -k -m mem_user -L lib -lc -o program.bin lib/c-spi.o lib/rom1000.o program.o
6.3 vs3emu
The ROM monitor interface. Loads and runs binary program files using RS-232 ca-
ble between PC and VS10xx. Also provides standard input/output and file system for
debugging C code.
Example:
vs3emu -chip vs1000 -s 115200 -l program.bin e.cmd
6.4 coff2spiboot
Creates bootable EEPROM image from a binary program file.
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Example:
coff2spiboot -x 0x50 program.bin eeprom.img
6.5 coff2nandboot
Creates a nand flash compatible boot record file from a binary program file.
Example:
coff2nandboot -t 3 -b 8 -s 19 -w 50 -x 0x50 led.bin nand.rec
6.6 makenandimage (required for VS1000A only)
Creates a prommable binary nand flash image from a nand flash compatible boot record
file.
Example:
makenandimage nand.rec NANDFLSH.IMG
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7 Examples
For more information and examples, check the VLSI Solution’s website, click Support,
then select Software. You can then find links for full VS1000 applications and smaller
VS1000 examples.
VS1000 evaluation boards also have source code available, so check out Support /
Evaluation Boards as well.
There are also VS1000-specific example projects for VSIDE.
See VSDSP Forum for general talk about VS1000 and other chips from
http://www.vsdsp-forum.com/ .
7.1 Hello, World!
The first example of writing code for the VS1000 is the traditional “Hello, World!” exam-
ple, which is compiled and linked. Then the RS-232 ROM monitor interface (vs3emu) is
used to load and execute the code.
The contents of the file hello.c is:
/* hello.c : A Hello World example. */
#include <stdio.h>
// main() is the program entry point. It is entered via a vector,
// which is statically linked to address 0x0050 in module c.o
void main(void) {
puts("Hello, World!");
}
7.1.1 Compiling
The “hello.c” file is compiled using vcc with a command line such as:
vcc -P130 -O -fsmall-code -I lib -o hello.o hello.c
This creates a coff object file hello.o. The parameteres that were passed to vcc are:
-P130 Treats warning 130 (“can’t find prototype”) as an error.
-O Optimize
-fsmall-code Use 16-bit code model (uses libc16 libraries)
-o hello.o Output file is hello.o
-I lib subdirectory “ lib ” contains include files
hello.c input file
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7.1.2 Linking
Next the hello.o object is linked using the VS1000 memory map, VS1000 ROM content
addresses and the relevant VSDSP link-time libraries using a command such as:
vslink -k -m mem_user -o hello.bin -Llib -lc -ldev1000 lib/c-spi.o lib/rom1000.o hello.o
This produces a loadable object file hello.bin using the parameters:
-k keep relocation information (good for debugging)
-m mem_user use memory areas specified in file mem_user
-o hello.bin output file is hello.bin
-Llib libraries can be found in subdirectory “ lib ”
-lc -ldev1000 use library libc.a and libdev1000.a (in the -L directory)
lib/c-spi.o the vsemu and SPI boot compatible C startup module (in subdirectory
lib ). It calls main() and returns to ROM code to a point after
initializations and SPI boot but before Nand Flash init+boot.
lib/rom1000.o address information of the ROM code (in subdirectory lib )
hello.o user compiled module
7.1.3 Loading
There are many ways to load runnable code to VS1000 chips. Code can be loaded
automatically during boot-up time from an SPI EEPROM or a NAND flash.
During program development it’s usually easiest to load the code using an RS-232
(“COM port”) emulator interface, which connects to the RX and TX pins of VS1000. 1
Note that a program booting from SPI and NAND FLASH may interfere with the loaded
program. You can disable SPI boot and erase the boot program part from NAND FLASH
to make certain. Leave the NAND FLASH ident, so the NAND FLASH can be used by
the ROM firmware and your program.
The PC side interface is invoked with:
vs3emu -chip vs1000 -s 115200 -l hello.bin
which instructs the vs3emu interface to use the “vs1000” communication method and
default (COM1) port with line speed 115200 bit/s.
The emulator contacts the VS1000 by sending a special character to the COM port. This
is handled by the UART receive interrupt on the VS1000. If the VS1000 is running with
a 12 MHz crystal, interrupts are enabled and the core is running, it responds with:
VSEMU 2.1 (c)1995-2006 VLSI Solution Oy
Clock 11999 kHz
Using serial port 1, Serial input speed seems to be 115200
1This is easiest with a VS1000 Developer Board, but even the VS1000 Demonstration Board could
be used in this fashion by building a suitable RS-232 interface board. It would require connecting a
MAX3232 or equivalent buffer chip to the “RX” and “TX” pads on the Demonstration Board PCB. Power
for the MAX3232 could be taken from the JP1 expansion header.
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COM speed 115200
Waiting for a connection to the board...
Caused interrupt
Chip version "1000"
Stack pointer 0x19e0, bpTable 0x7c0f
User program entry address 0x7398
hello.bin: includes optional header, 4 sections, 441 symbols
Section 1: code page:0 start:80 size:1 relocs:1 fixed
Section 2: const_x page:1 start:8096 size:14 relocs:0
Section 3: main page:0 start:81 size:14 relocs:2
Section 4: VS_stdiolib page:0 start:95 size:50 relocs:13
>
Next the executing address is set to be 0x0050 (statically linked loading vector for main())
by command g 0x50 and executed by command e . On the screen it should look like:
> g 0x50
> e
Hello, World!
This final stage can be automated by writing the commands g 0x50 and e to file e.cmd
and calling the emulator with the command line
vs3emu -chip vs1000 -s 115200 -l hello.bin e.cmd
The emulator can be exited by pressing Ctrl-C.
7.1.4 Note
If your board has boot code in the Nand Flash, the Nand Flash boot code runs after
main() exits.
7.1.5 Input and Output
This example uses the vs3emu interface to handle C standard I/O ( stdin, stdout ).
With it it’s possible to write messages to the user and read input from the PC keyboard.
Also it’s possible to open, read and write files in the PC. The library contains the ele-
mentary functions necessary for input and output. In this example, the library function
puts() , which outputs a line of text and a linefeed to stdout , was used.
Since the memory capacity of the chip is limited, the more advanced and memory con-
suming input/output functions such as printf should not be used. When you need to print
out values of variables, it’s recomended to use a smaller special function for it. As an
example, here is a small function that outputs the value of a 16-bit unsigned integer as
a hexadecimal value:
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