Wavecom CM52 User manual

USER GUIDE
CM52 Integrators’ Manual
Reference:
W
I_DEV_CM52_UGD_001
Version:
001
Date: June 20, 2007

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Trademarks
®, WAVECOM®, WISMO®, Open AT®, Wireless CPU®, Wireless Microprocessor®and certain other trademarks and
logos appearing on this document, are filed or registered trademarks of Wavecom S.A. in France or in other
countries. All other company and/or product names mentioned may be filed or registered trademarks of their
respective owners.
Copyright
This manual is copyrighted by WAVECOM with all rights reserved. No part of this manual may be reproduced in
any form without the prior written permission of WAVECOM.
No patent liability is assumed with respect to the use of the information contained herein.
No Warranty
This document is provided “as is” without any warranty of any kind. WAVECOM makes no warranties of any kind,
either express or implied, including any implied warranties of merchantability, fitness for a particular purpose or
noninfringement.
This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without prior written agreement.
Ce document est la propriété exclusive de WAVECOM. Il ne peut être communiqué ou divulgué à des tiers sans son autorisation préalable

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Table of Contents
1Introduction to the Integrator’s Manual............................................................ 9
1.1 OVERVIEW ............................................................................................................................... 9
1.2 HOW TO READ THE MANUAL ................................................................................................... 9
1.3 SERVICE AND SUPPORT............................................................................................................ 9
1.3.1 WEB PAGES ......................................................................................................................... 9
1.4 RELATED DOCUMENTS .......................................................................................................... 10
1.5 ABBREVIATIONS..................................................................................................................... 10
2Integrating the CM52 Wireless CPU®............................................................... 11
2.1 OVERVIEW ............................................................................................................................. 11
2.2 MECHANICAL DESCRIPTION ................................................................................................... 11
2.2.1 MECHANICAL DIMENSIONS .......................................................................................... 11
2.2.2 HEAT-SINK REQUIREMENTS ......................................................................................... 16
2.2.3 MOUNTING HOLES ...................................................................................................... 16
2.2.3.1 MOUNTING CONFIGURATION A ................................................................................... 16
2.2.3.2 MOUNTING CONFIGURATION B.................................................................................... 17
2.2.4 RF CONNECTOR MOUNTING CONSIDERATIONS............................................................ 17
2.3 SYSTEM CONNECTOR INTERFACE........................................................................................... 18
2.3.1 MECHANICAL OVERVIEW.............................................................................................. 18
2.3.2 SYSTEM CONNECTOR INTERFACE PINOUT .................................................................... 19
2.3.3 LOGIC LEVELS ............................................................................................................. 21
2.3.3.1 LEAKAGE CURRENT FOR CMOS SIGNALS ...................................................................... 21
2.3.3.2 VALIDITY OF CMOS SIGNALS ....................................................................................... 21
2.4 POWER SUPPLY ...................................................................................................................... 21
2.4.1 POWER SUPPLY INPUT CAPACITANCE ........................................................................... 22
2.4.2 POWER SUPPLY AND GROUND SIGNALS........................................................................ 23
2.4.2.1 POWER SUPPLY SIGNAL PINS ........................................................................................ 23
2.4.2.2 GROUND SIGNAL PINS ................................................................................................. 23

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2.4.3 POWER CONSUMPTION................................................................................................ 23
2.4.3.1 VCC_MAIN SUPPLY POWER CONSUMPTION................................................................... 24
2.4.3.2 VCC_AUX SUPPLY POWER CONSUMPTION..................................................................... 24
2.4.3.3 POWER DOWN MODE (MINIMUM DC POWER CONSUMPTION) ........................................ 25
2.4.4 VREF SIGNAL DETAILS ................................................................................................. 25
2.5 REAL TIME CLOCK (RTC) CIRCUIT........................................................................................... 26
2.5.1 RTC INITIALIZATION.................................................................................................... 26
2.5.2 RTC FUNCTIONAL BLOCK DIAGRAM............................................................................. 26
2.6 AUDIO INTERFACE................................................................................................................. 27
2.6.1 DIGITAL AUDIO ........................................................................................................... 28
2.6.1.1 DATA FORMAT............................................................................................................ 28
2.6.1.2 TIMING ....................................................................................................................... 29
2.6.2 ANALOG AUDIO .......................................................................................................... 30
2.7 SERIAL DATA INTERFACE ....................................................................................................... 33
2.8 ANTENNA INTERFACE ............................................................................................................ 33
2.8.1 ANTENNA CONNECTOR............................................................................................... 34
2.8.2 RF OUTPUT POWER...................................................................................................... 35
2.8.3 CARRIER APPROVAL .................................................................................................... 36
2.8.4 ANTENNA DIAGNOSTICS ............................................................................................. 36
3Recommended Interface Circuitry................................................................... 38
3.1 STATUS GROUP RECOMMENDED CIRCUITRY........................................................................... 38
3.1.1 MODULE_PWR_EN_B .................................................................................................... 39
3.1.2 VREF ........................................................................................................................... 39
3.1.3 RI ............................................................................................................................... 40
3.1.4 HW_SD........................................................................................................................ 40
3.2 DATA GROUP RECOMMENDED CIRCUITRY.............................................................................. 42
3.2.1 VPPFLASH/DCD........................................................................................................... 42
3.3 PCM GROUP RECOMMENDED CIRCUITRY................................................................................ 43
3.4 ANALOG AUDIO GROUP RECOMMENDED CIRCUITRY .............................................................. 44
3.4.1 CREATING AN ANALOG GROUND................................................................................. 44
3.4.2 ANALOG GROUND VS. AGND....................................................................................... 45
3.4.3 MICROPHONE PATH .................................................................................................... 45

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3.4.4 LOUDSPEAKER PATH ................................................................................................... 46
3.5 SYSTEM CONNECTOR IO FUNCTIONALITY .............................................................................. 47
4Functional Description ................................................................................... 49
5Hints for Integrating the Wireless CPU®.......................................................... 50
5.1 PRECAUTIONS ....................................................................................................................... 50
5.2 WHERE TO INSTALL THE WIRELESS CPU®................................................................................. 50
5.3 SAFETY STANDARDS.............................................................................................................. 50
5.4 ANTENNA.............................................................................................................................. 51
5.4.1 ANTENNA TYPE ........................................................................................................... 51
5.4.2 ANTENNA PLACEMENT ................................................................................................ 51
5.5 POSSIBLE COMMUNICATION DISTURBANCES .......................................................................... 51
6Technical Data ............................................................................................... 52

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List of Tables
TABLE 1: ABBREVIATION DEFINITIONS ................................................................................................ 10
TABLE 2: SYSTEM CONNECTOR AND MATING PART NUMBERS ..................................................................... 18
TABLE 3: PIN-OUT OF THE SYSTEM CONNECTOR HEADER........................................................................... 20
TABLE 4: CMOS OUTPUT /INPUT ELECTRICAL CHARACTERISTICS .............................................................. 21
TABLE 5: MAXIMUM LEAKAGE CURRENT FOR CMOS SIGNALS ..................................................................... 21
TABLE 6: CM52 POWER SUPPLY REQUIREMENTS .................................................................................... 22
TABLE 7: POWER SUPPLY INPUT CAPACITANCE (0.6W VARIANTS)............................................................. 22
TABLE 8: POWER SUPPLY INPUT CAPACITANCE (3W VARIANTS)................................................................ 22
TABLE 9: CM52 POWER SUPPLY SIGNALS............................................................................................. 23
TABLE 10: CM52 GROUND SIGNALS.................................................................................................... 23
TABLE 11: VCC_MAIN SUPPLY POWER CONSUMPTION ........................................................................... 24
TABLE 12: VCC_AUX SUPPLY POWER CONSUMPTION ............................................................................. 25
TABLE 13: MODULE_PWR_EN_B SIGNAL PARAMETERS ........................................................................... 25
TABLE 14: VREF SUPPLY DETAILS ...................................................................................................... 26
TABLE 15: FREQUENCY CHARACTERISTICS OF THE RTC............................................................................. 26
TABLE 16: CM52 AUDIO SIGNALS ...................................................................................................... 27
TABLE 17: CM52 DIGITAL AUDIO SIGNALS .......................................................................................... 28
TABLE 18: PCM TIMING PARAMETERS ................................................................................................. 29
TABLE 19: CM52 ANALOG AUDIO SIGNALS........................................................................................... 30
TABLE 20: AUDIO CHARACTERISTICS ................................................................................................... 30
TABLE 21: SERIAL DATA CHANNELS..................................................................................................... 33
TABLE 22: ANTENNA CONNECTOR SUPPLIERS ........................................................................................ 35
TABLE 23: MOBILE STATION NOMINAL ANALOG POWER LEVELS ................................................................. 36
TABLE 24: MOBILE STATION CDMA MAXIMUM OUTPUT POWER ................................................................. 36
TABLE 25: RANGE OF ADC READINGS FOR AN EXTERNAL ANTENNA .............................................................. 37
TABLE 26: PIN DIRECTION FOR GENERAL PURPOSE SIGNALS..................................................................... 48
TABLE 27: TECHNICAL DATA .............................................................................................................. 53

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List of Figures
FIGURE 1: CM52 PRIMARY SIDE ........................................................................................................ 11
FIGURE 2: CM52 SECONDARY SIDE..................................................................................................... 11
FIGURE 3: MECHANICAL DIMENSIONS DRAWING (CM52003 VARIANT)...................................................... 12
FIGURE 4: MECHANICAL DIMENSIONS DRAWING (CM52001 AND CM52004 VARIANTS)................................ 13
FIGURE 5: MECHANICAL DIMENSIONS DRAWING (CM52002 VARIANT)...................................................... 14
FIGURE 6: KEEP-OUT DRAWING OF CM52 ............................................................................................. 15
FIGURE 7: MOUNTING CONFIGURATION A............................................................................................. 16
FIGURE 8: MOUNTING CONFIGURATION B............................................................................................. 17
FIGURE 9: APPLICATION HOUSING ...................................................................................................... 17
FIGURE 10: 40-PIN SYSTEM CONNECTOR ............................................................................................. 18
FIGURE 11: 40-PIN SYSTEM CONNECTOR PIN NUMBERING....................................................................... 18
FIGURE 12: RTC FUNCTIONAL BLOCK DIAGRAM ..................................................................................... 27
FIGURE 13: PCM TIMING DIAGRAM .................................................................................................... 29
FIGURE 14: BIAS DIAGRAM EXAMPLE ................................................................................................. 31
FIGURE 15: MICROPHONE IMPLEMENTATION EXAMPLE ............................................................................. 32
FIGURE 16: DIFFERENTIAL IMPLEMENTATION EXAMPLE............................................................................ 32
FIGURE 17: COLOR AND KEYING FOR VARIOUS FAKRA CONNECTORS .......................................................... 34
FIGURE 18: SAMPLE SMA CONNECTOR AND MOUNTING HOLE.................................................................... 35
FIGURE 19: ANTENNA DIAGNOSTIC CIRCUIT ......................................................................................... 37
FIGURE 20: STATUS GROUP DIAGRAM.................................................................................................. 39
FIGURE 21: PIN 15 HW_SD DIAGRAM................................................................................................ 40
FIGURE 22: SHUT DOWN SEQUENCE TIMELINE ....................................................................................... 41
FIGURE 23: DATA GROUP DIAGRAM .................................................................................................... 42
FIGURE 24: PCM GROUP DIAGRAM ..................................................................................................... 43
FIGURE 25: CREATING AN ANALOG REFERENCE VOLTAGE (BIAS)................................................................ 44
FIGURE 26: BIAS/VANA REFERENCE ................................................................................................. 44
FIGURE 27: MICROPHONE IMPLEMENTATION EXAMPLE ............................................................................. 45
FIGURE 28: LOUDSPEAKER IMPLEMENTATION EXAMPLE ............................................................................ 46

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Revision History
Release Date Summary of Changes
PA1 05/07/2004 Initial Draft
PA2 09/01/2004 Formatting
PA3 11/17/2004 Updated Chapters 1 & 2
PA4 11/29/2004 Updated with review feedback
PA5 12/01/2004 Updated the List of Tables and Figures
PA6 06/16/2005 Current Consumption Table, RTC Block Diagram, Mechanical
Drawing
A 09/15/2005 Release version
PB1 11/30/2005 Updates for VREF sourcing capability, inrush current, mechanical
mounting, recommended application circuitry and CMOS leakage
current.
PB2 02/16/2006 Update to Power consumption section & Formatting updates
PB3 03/08/2006 Updated mechanical drawings, Re-formatted Table 2, Added RTC
Frequency Characteristics.
PB4 03/16/2006 Updated Sections: 2.5 - Real Time Clock Circuit, 2.8.2 – RF Output
Power. Added section 3.1.3 – RI
PB5 03/22/2006 Updated Table of Contents.
Updated Sections: 3.1.3 – RI and 3.1.4 – HW_SD.
Removed the Random Stationary Vibration information from
Section 6 – Technical Data.
B 03/24/2006 Release Version
PC1 06/02/2006 Updated Vibration Specification and add Minimum Off-Time
PC2 06/13/2006 Added RTC Initialization section and reformatted Technical Data
table
001 06/20/2007 Update product references, Wavecom format

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1Introduction to the Integrator’s Manual
1.1 Overview
This manual is for use as a guide to the setup, installation, and use of the CM52 Wireless CPU®into
your application. The Wireless CPU®may be tested using the developer’s board, which is supplied
together with all the necessary tools in the Developer’s Kit.
1.2 How to Read the Manual
This manual is divided into six chapters:
Chapter 1 gives a general view of the integrator’s manual. A list of related documents as well as a
list of abbreviations used throughout the manual is also included. Information concerning service
and support is also presented.
Chapter 2 focuses on helping the hardware developer to integrate the CM52 hardware into their
application. An overview of the mechanical and electrical information is provided. Interface
specifications, RF output power, and power supply issues are included in this chapter.
Chapter 3 contains information on recommended circuitry needed to ensure proper performance
from the CM52 Wireless CPU®.
Chapter 4 describes several of the common cellular functions available with the CM52.
Chapter 5 provides some hints for integrating the Wireless CPU®.
Chapter 6 provides a summary of the technical data for the CM52 Wireless CPU®.
1.3 Service and Support
1.3.1 Web Pages
Visit our Web site for more information about where you can buy our products or for
recommendations for accessories and components. The address is:
http://www.wavecom.com
To register for product news and announcements or for product questions, work with your usual
Wavecom contact.

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1.4 Related Documents
CM52 AT Command Manual – Details the AT command interface for the CM52
The CM52 is based upon the following mobile standards:
IS-2000 Release 0 (1XRTT), MOB_P_REV – CDMA protocol
TIA/EIA/IS-91 –
Mobile Station – Base Station Compatibility Standard for 800 MHz Analog
Cellular
TIA/EIA-98-D –
Recommended Minimum Performance Standards for Dual-Mode Spread
Spectrum Mobile Stations
1.5 Abbreviations
Abbreviation Definition
AGND Analog Reference
AMPS Advanced Mobile Phone System
AT Attention Command
CDMA Code Division Multiple Access
CTS Clear to Send
DCD Data Carrier Detect
DFMS Data from Mobile Station
DTMS Data to Mobile Station
DTR Data Terminal Ready
EMI Electromagnetic Interference
ESD Electrostatic Discharge
GND Chassis GrouND
IRA International Reference Alphabet
LSB Least Significant Bit
ME Mobile Equipment
MO Mobile Originated
MS Mobile Station
MT Mobile Terminated
OEM Original Equipment Manufacturer
PCB Printed Circuit Board
PCM Pulse Code Modulation
PIN Personal Identification Number
PSD Power Spectral Density
RD Receive Data, also known as DFMS
RF Radio Frequency
RI Ring Indicator
RTS Request to Send
SMS Short Message Service
TD Transmit Data, also know as DTMS
Table 1: Abbreviation Definitions

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2Integrating the CM52 Wireless CPU®
2.2.1 Mechanical Dimensions
The following figures provide the mechanical dimensions for several CM52 variants (CM52002,
CM52003, and CM52004). There is also a drawing detailing the mechanical keep-out regions.
2.2 Mechanical Description
2.1 Overview
The CM52 is a dual band, dual mode CDMA transceiver Wireless CPU®. It operates in the 800 MHz
band for CDMA and AMPS and in the 1900 MHz band for CDMA. It is designed for consumer and
OEM industrial voice and data applications.
The CM52 Wireless CPU®is intended for mounting into an application developer’s chassis to
provide wireless communication capability for the product. The target chassis could be in a wide
variety of forms such as a residential electric meter, a point of sale terminal, an alarm panel, or an
automobile console. All initial configuration, mode control, and operational commands are issued
to the Wireless CPU®over an RS-232 serial port using a flexible AT command format. The Wireless
CPU®circuitry has been designed to meet the environmental requirements of a large range of
commercial and industrial users.
The CM52 has no mechanical elements other than the main PCB assembly. All critical electronic
components are shielded using six cans to prevent internal and external electromagnetic
interference from degrading the Wireless CPU performance and to prevent the Wireless CPU®from
interfering with other nearby devices. The Wireless CPU®is plugged into the fixed mating
connector and secured with four screws.
The Wireless CPU®has no keypad, display, microphone, speaker, or battery. The following figures
show 3-D models of the Wireless CPU®.
The antenna interface is provided via a board mounted RF connector at the opposite end of the
board from the system connector. See Section 2.8 for more information on antenna connector
options.
Figure 1: CM52 Primary Side
Figure 2: CM52 Secondary Side
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CM52 Integrators’ Manual

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Note! All the measurements are in millimeters.
Figure 3: Mechanical Dimensions Drawing (CM52003 variant)
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Note! All the measurements are in millimeters.
Figure 4: Mechanical Dimensions Drawing (CM52001 and CM52004 variants)
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Note! All the measurements are in millimeters.
Figure 5: Mechanical Dimensions Drawing (CM52002 variant)
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Note! All the measurements are in millimeters.
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Figure 6: Keep-out drawing of CM52

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2.2.2 Heat-Sink Requirements
The application is required to provide a heat-sink for the 3W AMPS capabilities of the CM52.
The application should be designed to provide a heat sink with a thermal resistance of 4.0 °C/W.
For applications that disable the 3W mode (Class I) and only operate in 0.6W mode (Class III) a
heat-sink is not required.
2.2.3 Mounting Holes
Mounting holes and tabs are provided for proper mechanical support of the CM52 Wireless CPU®in
the customer’s application. The OEM’s application must provide sufficient mechanical retention
using the mounting holes and/or tabs or some other means. The system connector and RF
connector connections should not be used as a means of mechanical support. Also, please note
that the mounting holes may not substitute for the actual grounding pins provided via the system
connector.
Two mounting configurations are supported (A and B). Each has its own mechanical vibration
specification. Section 6 details the mechanical vibration specification for both configurations.
For machine screw mounting a wet torque of 8 in-lbs is recommended.
2.2.3.1 Mounting Configuration A
Mounting configuration “A” uses four exterior mounting holes that support #4 size screws.
Figure 7: Mounting Configuration A
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2.2.3.2 Mounting Configuration B
Mounting configuration “B” uses four 3/4 mounting holes that support #6 size screws.
Figure 8: Mounting Configuration B
Note: This is the recommend mounting configuration due to the higher mechanical vibration
specification supported.
2.2.4 RF Connector Mounting Considerations
When designing the application the designer should ensure that the housing does not degrade the
RF performance of the CM52. A minimum clearance of 4mm from the surface of the PCB to the
housing on the back side of the RF connectors should be provided.
4mm
Figure 9: Application Housing
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ty of WAVECOM. Not to be distributed or divulged without prior written agreement.
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2.3 System Connector Interface
2.3.1 Mechanical Overview
External interfaces to the Wireless CPU®are made primarily through a 40 pin, standard 0.050-inch
pitch, ODU header show below.
Figure 10: 40-Pin System Connector
Figure 11: 40-Pin System Connector Pin Numbering
Description ODU Part Number Dimension A Dimension B
System Connector 515.569.035.140.xxx 24.13 mm 22.86 mm
Mating Ribbon
Connector
525.060.035.040.xxx
SMT Mating Header 525.041.035.040.xxx
Ribbon cable, AWG 30 921.659.031.040.000
Please consult the ODU site for more information on mating options: http://www.odu.de
Table 2: System Connector and Mating Part Numbers

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2.3.2 System Connector Interface Pinout
Pin Signal Description Dir Pin Type Alternate
Function
Dir Pin
Type
1 Reserved
TIMEMARK 1O CMOS
2 VREF Logic Voltage O Reference
3 Reserved
GPS Fix 1O CMOS
4 VRTC Supply pin for RTC 2I Power GPS VRTC1I Supply
5 GND Chassis Ground Ground
6 GND Chassis Ground Ground
7 AFMS Analog Audio from Wireless CPU®O Audio
8 GND Chassis Ground Ground
9 AGND Analog Reference Audio
10 ATMS Analog Audio to Wireless CPU®I Audio
11 Reserved
UART3_RX1I CMOS
12 MODULE_PWR_EN_B Switches the Wireless CPU®on/off
(hardware-wise), active low
I
13 Reserved
UART3_TX1O CMOS
14 Reserved
15 HW_SD Hardware shutdown I/O
16 Reserved
17 PCMCLK PCM Clock output O CMOS
18 PCMSYNC PCM Frame sync O CMOS
19 PCMULD PCM Voice input to Wireless CPU®I CMOS
20 PCMDLD PCM Voice output from Wireless CPU®O CMOS
21 GND Chassis Ground Ground
22 GND Chassis Ground Ground
23 DCD / VPPFLASH Data Carrier Detect & Flash programming
voltage input
O / I CMOS /
Power
24 Reserved O RINGER O CMOS
1Default function if GPS option on board
2Default function if RTC option on board

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Pin Signal Description Dir Pin Type Alternate
Function
Dir Pin
Type
25 CTS Clear to send O CMOS
26 DTR Data Terminal Ready I CMOS
27 TD Transmit data, also known as DTMS I CMOS
28 RTS Request to Send I CMOS
29 VCC_AUX 13.8 VDC supply input I Power
30 RD Receive data, also known as DFMS O CMOS
31 VCC_AUX 13.8 VDC supply input I Power
32 VCC_AUX 13.8 VDC supply input I Power
33 VCC_MAIN 5 VDC regulated supply I Power
34 VCC_MAIN 5 VDC regulated supply I Power
35 SDA_SPI_IN Reserved CMOS SDA_SPI_IN IO
36 SCL_SPI_CLK Reserved CMOS SCL_SPI_CLK IO
37 SYS_DTM_2 Transmit Data for UART2 I CMOS GPS TX Data1I
38 SPI_OUT Reserved CMOS SPI_OUT IO
39 SYS_DFM_2 Receive Data for UART2 O CMOS GPS RX Data1O
40 RI Ring Indicator O CMOS
Table 3: Pin-out of the System Connector Header
Table of contents
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