WinSystems PCM-AIO User manual

OPERATIONS MANUAL
PCM-AIO
WinSystems reserves the right to make changes in the circuitry
and specifications at any time without notice.
Copyright 1993 by WinSystems. All Rights Reserved.
NOTE: This manual has been designed and created for use as part of the WinS
y
stems’ Technical Manuals
CD and/or the WinSystems’ website. If this manual or any portion of the manual is downloaded, co
p
ied or
emailed, the links to additional information (i.e. software, cable drawings) will be inoperable.

REVISION HISTORY
P/N 403-0172-000
ECO NUMBER Date CodeRev Level
ORIGINATED 032993A
93-67092493A1
94-31940817A2
98-29980414A3
98-48980723B
WinSystems- "The Embedded Systems Authority"

TABLE OF CONTENTS
Section Paragraph Title Page
Visual Index- Quick Reference i
1 General Information 1-1
1.1 Features 1-1
1.2 General Description 1-1
1.3 Specifications 1-3
2 PCM-AIO Technical Reference 2-1
2.1 Introduction 2-1
2.2 I/O Addressing Selection 2-1
2.3 A/D Registers 2-2
2.4 D/A Registers 2-2
2.5 Interrupt Routing Selection 2-3
2.6 A/D In put Connector 2-3
2.7 Single Ended Operation 2-3
2.8 Differential Operation 2-3
2.9 Unipolar/Bipolar Operation 2-4
2.10 A/D Software Interface 2-4
2.11 A/D Calibration Procedure 2-5
2.12 Output Coding 2-6
2.13 A/D Software Examples 2-6
2.14 D/A Output Connector 2-10
2.15 D/A Voltage Reference and Output Selection 2-10
2.16 D/A Software Flowchart/Assembly Routine 2-10
2.17 D/A Calibration Procedure 2-12
APPENDIX A MAX 180 Datasheet Reprint
APPENDIX B Cable Drawings and Software
Warranty and Repair Information

Visual Index – Quick Reference
For the convenience of the user, a copy of the Visual Index has been provided with direct links to
connector and jumper configuration data.
J7, J10
Interrupt Routing
Selection
J8
I/O Address
Selection
J3
D/A Output
Connector
J4, J5, J6
D/A Output
Configuration
i OPERATIONS MANUAL PCM-AIO 980723
J1
A/D Input
Connector

1GENERAL INFORMATION
1.1FEATURES
nLow cost, 12-bit A/D
nUp to 8 A/D input channels
nEach A/D channel configurable for Unipolar (0 to +5V) or Bipolar (-2.5 to +2.5V)
nSingle-ended or Differential Input Modes
nBuilt-in Sample-and-Hold
n100KHz sampling rate
nI/O mapped on the PC/104 Bus
nProcessor independent
nVery low power, all CMOS components
nTwo channel 12 Bit CMOS D/A converter
nSelectable UNIPOLAR or BIPOLAR voltage output for each channel
nTwo output voltage ranges: 0 to 5V or -5V to +5V
1.2GENERAL DESCRIPTION
1.2.1PC/104 Bus Interface
The PCM-AIO is I/O port mapped with the unique port address determined by an on
boardEPALdecoder. ThePCM-AIOusesatotalof8I/Oportsandisdesignedto workwith
standard NMOS/TTL or CMOS base boards.
1.2.2Analog to Digital Converter
The PCM-AIO contains the Maxim MAX180, 12-bit data acquisition system. It com-
bines an 8 channel input multiplexer, high bandwidth Track-and-Hold (T/H), low-drift
zener reference, and flexible microprocessor interface with a high conversion speed, suc -
cessive approximation analog to digital converter. The device samples and digitizes at a
100KHzthroughputrate. TheMAX180canbesoftwareconfiguredforunipolarorbipolar
conversions and single-ended or differential inputs on a per channel basis. Output codi ng
is natural binary for unipolar operation with 1 LSB = 1.22mV (5V/4096). Coding is twos
complement for bipolar. Potentiometersare onthe cardto permitboth gainand offsetad-
justment.
980723OPERATIONS MANUAL PCM-AIOPage 1-1

1.2.3 Starting an A/D conversion
The conversion is begun by writing a word to the control register to select the channel
and specify if it is single-ended/differential and unipolar/bipolar. Output data is latc hed
andthe PCM-AIO signalsthebase board thatconversion is complete and data is available.
ThisboardsetsaBusyflagforuseinapolledmodeandcangenerateaninterruptaftereach
completed conversion.
1.2.4 A/D Input Configuration
All input channel are wired to J1, a 26-pin right angle male connector. It has the same
pin-outasWinSystems' MCM/LPM-A/D12. J1 is configuredsothatmassterminationtype
flatribboncableordiscreetwirescanbeconnectedtoit. WinSystemsofferstheCBL-120- 3
whichis a 3 foot, #28 AWG, ribbon cabledesignedto provide accesstosignals from the 26-
pin,0.100“gridconnectoronthePCM-AIOboard. Oneendofthecablehasapolarized,26-
pinfemalesocketconnectorwithstrainreliefthatplugsintotheboardandtheotherendis
opento allow usersto maketheir own custom termination. The CBL-130-4 is a 4 foot, rib-
boncable that will connect the PCM-AIO to the Analog-ADP. This board is a non-isolated
signal conditioner and termination panel.
1.2.5 Digital to Analog Converter
ThePCM-AIOhastwo12bitdigitaltoanalogconvertorchannels. Eachchannelcanbe
configuredfor eitheraunipolarorbipolar output with one of two output ranges: 0to 5V or
+/-5V. The D/A section on the PCM-AIO takes 4 I/O ports.
1.2.6D/A Operation
EachD/Achannel on the PCM-AIOisresettologiczeroafterasystemreset. Tooutput
a digital word to a channel, the low byte is written to the low byte address (ALWAYS
EVEN), the upper 4 bits of the 12 bit word is written to the next address (ALWAYS ODD).
Afterwritingtheupper4bits,thechannelisautomaticallyupdated. Itisimportanttonote
that a channel is only updated when the upper 4 bits are written to the odd address.
EXAMPLE:0 to 5V unipolar output selected
D/A Ports are located at 100-10B
To Output 800 HEX to channel 0 (should equal 2.5V output)
1. OutpuT 00 HEX TO I/O PORT 108 HEX
2. Output 08 HEX TO I/O PORT 109 HEX
When the 08 hex is written to I/O Port 101, the 12 bit word will be converted to a 2.5V
output.
Page 1-2OPERATIONS MANUAL PCM-AIO980723
WinSystems- "The Embedded Systems Authority"

1.2.7 PC/104 Module
PC/104 multimodule boards are small (3.550" x 3.775"), I/O or memory mapped boards
whichplugintoabaseboard. ThePC/104boardsconnecttothePC/104bus connector and
convert the PC/104 bus signals to a defined memory or I/O interface. The PC/104 is a
unique design approach to Embedded Systems users offering a broad range of expansion
boardsjoinedtogetheronthePC/104interface. ThePCM-AIOisdesignedtofitonallWin-
Systems' processors that have PC/104 connectors, our LPM/MCM-SX386/486, and other
CPU base boards.
1.3SPECIFICATIONS
1.3.1 Electrical
A/D
Number of Channels:Up to 8
A/D Resolution:12-bits
Input range: 0 to +5 volts; single-ended -2.5 to +2.5 volts; differetial
Coding: Natural binary (unipolar)
Two's complement (bipolar)
Nonlinearity:1 LSB
Gain error:Adjustable to zero
Conversion speed: 10 microseconds
D/A
Number of Channels:2
D/A Resolution:12-bits
Voltage Output:0 to 5 VDC or -5 to +5 VDC
Output Drive: 2.5 mA
Power Requirements:
VCC+5 VDC 5% at 35 mA (typ. outputs unloaded)
VCC1-12VDC 10% at 15 mA (typ. outputs unloaded)
VCC2+12VDC 10% at 15 mA (typ. outputs unloaded)
980723OPERATIONS MANUAL PCM-AIOPage 1-3
WinSystems- "The Embedded Systems Authority"

1.3.2 Mechanical
Dimensions:3.550" x 3.775"
Connectors : A/D Input: 26-pin dual pin on 0.100"
D/A Output: 26-pin dual pin on 0.100"
PC/104: 62-pin dual pin on 0.100"
1.3.3Environmental
Operational Temperature: 0° C to +65° C
1.3.4Ordering Information
PCM-AIO 12-bit A/D converter
CBL-120-3 3 ft., 26 conductor ribbon cable unterminated
CBL-130-4 4 ft., 26 conductor, ribbon cable to the Analog-ADP card
Analog-ADP Analog termination panel
Page 1-4OPERATIONS MANUAL PCM-AIO980723
WinSystems- "The Embedded Systems Authority"

2PCM-AIO Technical Reference
2.1Introduction
This section of the manual is intended to provide sufficent information regarding the
configuration, and programming of the PCM-AIO module. A complete reprint of the MAX
180datasheetisprovidedinAppendixCforspecificinformationonthechip.Questionsno t
adequately addressed in this section should be addressed to the WinSystems Technical
Support department at [phone] between 8AM and 5PM Central time Monday
through Friday.
2.2I/O Address Select
The PCM-AIO decodes 16 I/O ports to access the board. The I/O port addresses are de-
termined by an EPAL and is controlled by jumper block J8. The figures below show the
Base I/O address as determined by the jumpering of J8.
980723 OPERATIONS MANUAL PCM-AIOPage 2-1
2 o o 4
1 o o 3
J8
2 4 6 8 10 12
o o o o o o
o o o o o o
1 3 5 7 9 11
J7
I/O Address Select
Jumper J8
Interrupt Routing Select
Jumper J7, J10
2 4 6 8 10
o o o o o
o o o o o
1 3 5 7 9
J10
2 o o4
1 o o3 2 o o4 1 o o3 2 o o4 1 o o3 2 o o4 1 o o3
J8J8J8J8
100H190H180H110H

2.3A/D Registers
OFFSET 0 - Write
Bits 7-5Unused
Bit 4 1 = Differential Input, 0 = Single Ended input
Bit 31 = Bipolar Input, 0 = Unipolar Input
Bits 2-0 Channel Select 0 to 7
OFFSET 0 - Read
Bits 7-0LSB of converted data
OFFSET 1 - Read
Bits 7-4Unused
Bits 3-0Upper 4 Bits of converted data
OFFSET 4 - Read
Bit 7 1 = A/D Busy, 0 = Conversion complete
Bits 6-0Unused
2.4D/A Registers
OFFSET 8 - Write
Bits 7-0Channel A LSB data
OFFSET 9 - Write
Bits 7-4Unused
Bits 3-0Channel A - Upper 4 bits of 12-Bit ouput value.
OFFSET 10 - Write
Bits 7-0Channel B LSB data
OFFSET 11 - Write
Bits 7-4Unused
Bits 3-0Channel B - Upper 4 bits of 12-Bit ouput value.
Page 2-2OPERATIONS MANUAL PCM-AIO980723
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