WRS PuPla/2 User manual

© 2003 WRS software design, Humboldt Strasse 12, 45886 Gelsenkirchen
Bus Buffer Board and Interrupt Logic
for the PAK68/3 and Panther/2

IMPRINT
Page 1 PuPla/2
PuPIa/2
Bus Buffer Board and Interrupt Logic
for the PAK68/3 and Panther/2
Developer: Holger Zimmermann, Roland Skuplik
Copyright © 2000-2003 WRS Software-Design
All rights reserved. The copyright to the hardware extension
PuPla/2, including the GAL equations, lies with the developer.
Reproduction is permitted for private use only!
Distributor/Supplier:
WRS Software-Design
W. Rohmann & R. Skuplik GbR
Humboldtstrasse 12
45886 Gelsenkirchen
TEL: 0209 - 87 30 01
FAX: 0209 - 87 30 02
E-mail: [email protected]
WWW: www.wrsonline.de
Documentation: R. Skuplik, H. Zimmermann
5th Edition from 01/27/2003
Limitation of Liability
We reserve the right to make changes to the hardware, the GAL
equations or the documentation without restrictions. We are not
responsible for the accuracy of the manual of damage resulting
from the use of the hardware. Every modification done to your
own computer system is performed at your own risk!
We are always grateful for suggestions on improving the manual.

Table of Contents
PuPla/2 Page 2
Table of Contents
1. Before Starting 3
1.1 Notes 3
1.2 Delivery Options 3
1.3 Requirements 3
1.4 Features of the PuPla/2 4
2. Building the PuPla/2 4
2.1 Prerequisites 4
2.2 The Construction 5
3. Installing the PuPla/2 5
3.1 Preparation 5
3.2 Installation without PAK / DIP CPU 6
3.3 Installation with PAK / DIP CPU 6
3.4 Installation without PAK / PLCC CPU 7
3.5 Installation with PAK / PLCC CPU 8
4. Configuring the PuPla/2 8
4.1 The Jumpers 8
4.2 The GALs 9
Appendix
A Component Layout 11
B Parts List 13

1. Before Starting
Page 3 PuPla/2
1. Before Starting
1.1 Notes
Please read the instructions carefully before you begin the
construction and installation. Most errors can be attributed to an
insufficient knowledge of the instructions!
The installation of the finished PuPla/2 board should be possible
even for people with little hardware experience. If the necessary
steps seem too difficult, please contact us (see imprint).
If you currently have the empty board or the parts kit then you
should possess good SMD soldering skills! We need to point out
that the parts kit with SMD components was only made available
by popular demand. We assume no liability nor offer free repair
service for faulty or poorly built circuit boards. The circuit and the
board itself were developed and tested with great care so errors
from this side are essentially ruled out.
By using SMD components in the assembly, the PuPla/2 is very
small. It works smoothly with or without the PAK, so a network
solution using only the Panther/2 and a 68000 is possible.
1.2 Delivery Options
The PuPla/2 is available in three versions:
Empty board with optional programmed GALs
Parts Kit with all required components
Ready-Built Unit
optional:
PAK-GAL V4-50ac (at the time of printing of the manual)
1.3 Requirements
The PuPla/2 is suitable for all Atari ST models that work over a
68000 bus (ST, MegaST, STE and MegaSTE). The E-models
might still require a PLCC-to-DIP adapter. When in doubt, please
contact us.

2. Building the PuPla/2
PuPla/2 Page 4
Although the PuPla/2 was primarily designed for the PAK68/3, it
is also possible to operate with the 68000, i.e. to use a network
card with the interrupt-enabled Panther/2.
The PuPla/2 is always installed "under" the CPU - regardless of
whether you use the PAK or 68000 since some lines have to be
interrupted. This means that to use the PuPla/2 in any way the
CPU must be socketed.
Unfortunately, the PuPla/2 is not suitable for the TT or Falcon!
1.4 Features of the PuPla/2
Complete buffering of the address and data bus
Additional buffering for the main control signals
CPU-side damping resistors on the data lines
Address latch when used with the PAK
Convenient configuration via jumpers
Mainboard interrupt logic for the Panther/2
Small dimensions due to SMD components
2. Building the PuPIa/2
2.1 Prerequisites
This chapter isn't relevant to owners of the finished device. If this
applies please continue reading from Chapter 3 onwards.
We assume that the empty board has been purchased by
persons who know what they are doing and can get the
components themselves. Those that have purchased the parts
kit need only experience in soldering SMD components and the
necessary equipment. We would like to point once again that the
circuit and board have been developed and tested with great
care. So if your self-built PuPla/2 does not work correctly, check
for construction errors first. If, after checking the board, you still
need to take advantage of our services and it turns out that the
error was caused by improper assembly, our service is not free!

3. Installing the PuPla/2
Page 5 PuPla/2
2.2 The Construction
Regarding the order of construction we recommend first placing
the SMD components on the solder side and then the SMD
components on the component side. Next place the IC plug
adapter pins on the solder side and then the socket/SIL strips on
the component side. Finally, place the angled header pins and
the resistor under the PUF-GAL (2.2k from pin 6 to pin 24 of the
PUFCTRL GAL). As a tip for the IC plug adapter pins and the
SIL strips: a 64-pin socket helps in positioning when soldering.
In addition, pay attention to the correct position: the pin headers
for the mainboard are located closer to the edge of the board.
The location of the parts on the component side is clear from the
silkscreening on the board, but the position of the components
on the solder side is only apparent from the component layout
diagram in Appendix A. This is a result of cost considerations
which made further silkscreening impossible. The component
specifications can be found in the parts list in Appendix B.
3. Installing the PuPIa/2
3.1 Preparation
The CPU must be socketed in order to install PuPla/2 since it
must operate on or above the PuPla/2 board itself. If your CPU
is not socketed, then the best way to do this is to use a fine side-
cutter and snip the CPU pins close to the mainboard. Then you
can grab each pin remaining in the mainboard with some
tweezers and unsolder them. Afterwards, clean the holes with a
desoldering pump. Now the CPU socket (precision type!) can be
soldered in. The original CPU is now unusable, but an 8MHz
68000 doesn't even cost 10 DM. This is a small amount
compared to the unnecessary risk of ruining the mainboard with
a desoldering attempt. This procedure is the only "hurdle" for the
average user. You might be able to persuade a soldering friend
to help or, if necessary, please contact us. We also offer an
installation service.
Remember to unplug the power cord before performing any
work on the computer!

3. Installing the PuPla/2
PuPla/2 Page 6
At this point you should have the computer "opened up" in order
to install the PuPla/2.
The installation options depend on whether you have a PAK or
not and the CPU design of the mainboard.
3.2 Installation without PAK / DIP CPU
The installation of the PuPla/2 without a PAK is really only useful
if you want to use the Panther/2 ISA Adapter with a network card.
In this case the PuPla/2 jumpers should be configured as follows:
J1 closed when the Panther/2 is installed above the PuPla/2
otherwise left open
J2 open
J3 open
J4 (bottom pin) to pin C3 of the Panther/2 bus adapter
The CPU and Panther/2 bus adapter can now be placed on the
PuPla/2 (we recommend the use of the Panther/2 on top of the
PuPla/2) which can then be plugged into the mainboard. With
this the installation is complete. Thus, this is the sequence from
"bottom" to "top": Mainboard - PuPla/2 - Panther/2 - CPU.
The exact meanings of the jumpers are explained in Chapter 4.1.
3.3 Installation with PAK / DIP CPU
This is probably the most common variation, since the PuPla/2
was mainly developed as a buffer board for the PAK. Remove
the PAK and, if you have one, PuPla/1 from the mainboard. Also
remove any existing connections to the Panther/2 adapter. Then
configure the PuPla/2 jumpers as follows:
J1 closed when the Panther/2 is installed above the PuPla/2
otherwise left open
J2 depends on whether you use a 68000 in the alternate
operating mode on the PAK. See Chapter 4.1
J3 (bottom pin) to PAK U1 pin 20 via a 68 ohm resistor close
to U1
J4 (bottom pin) to Panther/2 pin C3 or open if no Panther/2
adapter is equipped.

3. Installing the PuPla/2
Page 7 PuPla/2
Also, you must replace GAL U4 on the PAK in order for the
address latch feature of the PuPla/2 to work. If the GAL V4-50ac
was included in your order, you can now use it to replace the
PAK GAL U4. If the GAL was not included in your order, you will
have to update the PAK GAL U4 yourself. The JEDEC files for
the PuPla/2, as well as for the PAK, FRAK/2 and the Panther/2
bus adapter are public, but only released for private use. You can
download the JEDEC files from our homepage (this archive
replaces the old "FR2GAL?.LZH") or you can obtain them by
mailing us a stamped envelope and a properly formatted disk.
Please note that the PAK will not work with PuPla/2 without
the GAL V4-50ac!
You can now reassemble the PAK-tower and plug it back into the
mainboard. This completes the installation. If you have a
preexisting control signal from the Panther/2 to the PuPla/1 it is
no longer necessary. The PuPla/2 uses J1 to make all the
necessary adjustments so that the data bus drivers of the
Panther/? and PuPla/2 do not work against each other when the
Panther/? is operated above the PuPla/2.
The exact meanings of the jumpers are explained in Chapter 4.1.
3.4 Installation without PAK / PLCC CPU
In this case you'll need a PLCC-to-DIP adapter. These are
available in two main types: Solderless plug adapter and plug
adapter requiring soldering (based on precision socket pins). I
can strongly advise against the former! Sooner or later these
adapters will cause contact problems due to mechanical
instability. Unfortunately, solder-in plug adapters are nowhere to
be found. If necessary, please contact us. However, if you have
such an adapter, you need very good soldering skills and top-
notch tools for installation. I can only advise against casual users
trying this type of conversion. Already several people have killed
their beloved STE this way...

4. Configuring the PuPla/2
PuPla/2 Page 8
As you can see, the installation of the PuPla/2 in systems with
PLCC CPUs is not very easy. Please contact us if necessary.
If you are able to successfully "implant" the PLCC-to-DIP adapter
then the installation is the same as described in Chapter 3.2
since basically the system now has a DIP design.
3.5 Installation with PAK / PLCC CPU
Have you ever used a PuSTE? If not, then you must already
have a PLCC-to-DIP adapter, otherwise the PAK would not be
usable. In this case the installation is the same as described in
Chapter 3.3. But if you are using a PuSTE, it must be removed
and replaced with a PLCC-to-DIP adapter since the PuSTE is
basically a PuPla/1. Unfortunately, this is not quite as easy as
you might think. You can read about this in Chapter 3.4. If you
have successfully overcome this hurdle then the installation is
the same as described in Chapter 3.3.
4. Configuring the PuPla/2
4.1 The Jumpers
The PuPla/2 is configured mainly via the jumper pins, but
changing the GAL equations can also affect the configuration.
First, here is the explanation of the jumper pin header.
The double-row angle header consists of GND pins (top row) and
the actual configuration pins (bottom row). The lower row of pins
are labeled 1-4 on the board silkscreen. There are two different
types of pins: jumper pins and signal inputs. With a jumper pin it
is either plugged (closed) or left open. A signal input expects a
signal on the lower pin. Here are the assignments:
J1 (Jumper)
closed: A Panther/? adapter is installed above the PuPla/2
open when a Panther/? adapter is installed below the
PuPla/2 or no Panther/? adapter is present

4. Configuring the PuPla/2
Page 9 PuPla/2
J2 (Jumper or Signal Input)
closed: PAK only, without 68000 on the PAK/FRAK
open: 68000 only or other accelerator, but no PAK
Connected to PAK J5 pin 2, when a switchable 68000 is
used on the PAK
J3 (Signal Input)
Connected to PAK U1 pin 20 via a 68 ohm resistor close to
U1
Not connected if there is no PAK
J4 (Signal Input)
Connected to pin C3 of Panther/2 bus adapter
Not connected when there is no Panther/2 adapter
4.2 The GALs
The PuPla/2 has two 20v8 GALs for flow control.
GAL1, labeled "PUFCTRL" on the silkscreen. This GAL is
responsible for controlling the buffering capabilities. The current
equation for this GAL is named "PUF2-004".
GAL2, labeled "AVICTRL" on the silkscreen. This GAL is
responsible for controlling the interrupt functions. Unfortunately,
the current equation has changed since delivery and is now called
"AVI5-06b". The tests with the first equation have shown that in a
very specific situation the GAL may cause a bus error (two
bombs) when writing to the network card under heavy load. This
does not occur under normal-to-medium load when reading from
the card. The reason for this behavior is quite strange: the "a"
version of the AVI5 equation only confirms a level 5 autovector
interrupt if the interrupt signal of the card is still present This has
the advantage that a non-autovector interrupt of the same level is
also possible.

4. Configuring the PuPla/2
PuPla/2 Page 10
However, it now appears that the card can cancel the interrupt
request before confirmation (only under heavy load) so the CPU
does not confirm the interrupt acknowledge cycle (which causes
the bombs). Now in the "b" version of the equation a level 5
interrupt acknowledgment is always executed an an autovector.
So you don't need the interrupt request of the network card. This
prevents the bus error, but, unfortunately, now no autovector
interrupt level 5 can be triggered. This solution is not that bad
since we don't know any extension that has these requirements.
If you are unable to update the PuPla/2 AVICTRL GAL yourself,
you can get a free GAL update from us.

Appendix A –Component Layout
Page 11 PuPla/2
Appendix A –Component Layout

Appendix A –Component Layout
PuPla/2 Page 12

Appendix B –Parts List
Page 13 PuPla/2
Appendix B –Parts List
Position
Qty.
Designation
GAL1, GAL2
2
GAL20v8-15ns
IC1, IC2
2
74HCT373-SMD
IC3
1
74HCT573-SMD
IC4, IC5
2
74F245-SMD
R1 - R16
16
Resistor 100 ohm SMD 1206
R17 - R20
4
Resistor 4.7k ohm SMD 1206
for PUFGAL
1
Resistor 2.2k ohm
Cl - C6
6
SMD Capacitor 100nF 1206
for the GALs
2
DIP Socket 24pin narrow
PAK
2
SIL Socket 32pin
Mainboard
2
Plug-In Adapter SIL 32pin
CON1
1
Pin Header double row, 8pin, angled
2
Jumpers for CON1

Space for Notes
PuPla/2 Page 14