Intel 810e2 Quick start guide

A
A
A A
INTEL® PENTIUM® III & INTEL® CELERON (R)
PROCESSOR/ 810E2 CHIPSET UNIVERSAL
SOCKET 370 PLATFORM
UNIPROCESSOR CUSTOMER REFERENCE SCHEMATICS
REVISION 1.0
TitlePage
Cover Sheet
Block Diagram
370-pin socket
82810e
Display Cache
System Memory
ICH2
FWH & UDAM 100 IDE1-2
Super I/O
PCI Connectors
USB Connectors
AC97 CODEC
Audio I/O
Kybrd / Mse / F. Disk / Gme Connectors
Digital Video Out
Video Connectors
Front Panel & CNR
ATX Power & H/W Monitor
Voltage Regulators
System Configuration
1
2
3 , 4
7, 8, 9
10
11, 12
13, 14
15
16
17, 18
19
20
21
22
23
24
25
31
32
** Please note these schematics are subject to change.
THESE SCHEMATICS ARE PROVIDED "AS IS" WITH NO WARRANTIES
WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS
FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING
OUT OF PROPOSAL, SPECIFICATION OR SAMPLES.
Information in this document is provided in connection with Intel products. No license,
express or implied, by estoppel or otherwise, to any intellectual property rights is
granted by this document. Except as provided in Intel's Terms and Conditions of Sale
for such products, Intel assumes no liability whatsoever, and Intel disclaims any
express or implied warranty, relating to sale and/or use of Intel products including
liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products
are not intended for use in medical, life saving or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time,
without notice.
The Intel® Celeron(R) processor and Intel® 810e2 chipset may contain design defects
or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Copyright (c) Intel Corporation 2001.
* Third-party brands and names are the property of their respective owners.
5AGTL Termination
Clock Synthesi zer 6
WOL, WOR & 2S1P
26
35, 36
Pullup Resistors
UMB Circuits
Unused Gates & Decoupling capacitors
27, 28
29, 30
33, 34
Intel® 810e2 Chipset Universal Socket370CRB
Cover Sheet
36
1.0
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REV.
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Title:
intel

A
A
A A
DATA CTRL
ADDR
Term
VRM
ICH2
Keyboard
Mouse Floppy Parallel
Serial1
SIO
Clock
PCI CONN 1 PCI CONN 2 PCI CONN 3
Block Diagram
2 DIMM
Modules
USB Port1-4
CNR
CONNECTOR
CTRL
DATA
ADDR
IDE Primary
IDE Secondary UltraDMA/100 PCI CNTRL
PCI ADDR/DATA
AC'97 Link
FirmWare
Hub
LPC Bus
GMCH
Game Port
Display Cache
Memory
Out Device
Digital Video
370-PIN SOCKET PROCESSOR
GTL BUS
USB
AUDIO
CODEC
Serial2
Intel® 810e2 Chipset Universal Socket370CRB
Block Diagram
36
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Title:
intel

A
A
A A
370 - Pin Socket Part 1
Intel® 810e2 Chipset Universal Socket 370 CRB
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HD#63
370-PIN SOCKET PART 1
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Title:
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HA#[31:3]
HD#[63:0]
HA#16
HD#11
HD#2
HA#12
HA#11
HA#3
HD#53
HD#34
HD#29
HA#30
HA#13
HA#9
HD#28
HD#17
HA#15
HD#61
HD#57
HD#26
HD#10
HD#3
HD#59
HD#20
HD#15
HD#13
HD#6
HD#0
HA#26
HA#19
HD#42
HD#25
HD#16
HD#14
HD#9
HD#8
HD#7
HA#6
HA#5
HD#55
HD#47
HD#46
HD#5
HA#25
HA#18
HA#14
HA#4
HD#52
HD#45
HD#23
HD#4
HA#28
HD#32
HD#31
HD#44
HD#35
HD#33
HD#18
HA#17
HD#50
HD#43
HD#36
HD#22
HD#21
HA#31
HA#27
HA#22
HD#58
HD#54
HD#49
HD#48
HD#40
HD#1
HA#23
HA#10
HD#56
HD#12
HA#20
HD#30
HA#21
HA#8
HA#7
HD#62
HD#51
HD#41
HD#38
HD#24
HA#24
HD#60
HD#39
HD#27 HA#29
HD#37
HD#19
HA#[31:3] 5,7
HD#[63:0] 5,7
VID1 16,29
RS#[2:0]7
HREQ#[4:0] 5,7
VID2 16,29
VID3 16,29
VID0 16,29
33 TUALDET
VTTPWRGD 33
VID4 16,29
VCCVID
VTT
VTT
VTTR340
1K
U1A
Socket 370_9
W1
T4
N1
M6
U1
S3
T6
J1
S1
P6
Q3
M4
Q1
L1
N3
U3
H4
R4
P4
H6
L3
G1
F8
G3
K6
E3
E1
F12
A5
A3
J3
C5
F6
C1
C7
B2
C9
A9
D8
D10
C15
D14
D12
A7
A11
C11
A21
A15
A17
C13
C25
A13
D16
A23
C21
C19
C27
A19
C23
C17
A25
A27
E25
F16
AH26
AH22
AK28
AM34 AH2 AD2 Z2 V2 M2 D18 H2 D2 AL3 AK4 AG5 AC5 Y5 U5 Q5 L5 G5 D4 B4 AM6 AJ7 E7 B8 AM10 AJ11 E11 B12 AM14 AJ15 E15 B16 AM18 AJ19 E19 F20 B20 AM22 AJ23 D22 F24 B24 AM26 AJ27 D26 F28 B28 AM30 D30 AF32 AB32 X32 T32 P32 F32 B32 AH34 AD34 Z34 V34 R34 M34 H34 D34
AK36
AF36 X36 T36 P36 K36 F36 A37 AC33 AJ3 AL1 AN3 Y37
AK8
AH12
AH8
AN9
AL15
AH10
AL9
AH6
AK10
AN5
AL7
AK14
AL5
AN7
AE1
Z6
AG3
AC3
AJ1
AE3
AB6
AB4
AF6
Y3
AA1
AK6
Z4
AA3
AD4
X6
AC1
W3
AF4
AL35
AM36
AL37
AJ37
AK18
AH16
AH18
AL19
AL17
C33
C31
A33
A31
E31
C29
E29
A29
AH20
AK16
AL21
AN11
AN15
G35
AL13
U37
U35
S37
S33
E23
AN21
AA35
AA33
B26 C3 AK2 AF2 AB2 T2 P2 K2 F4 E5 AM4 AE5 AA5 W5 S5 N5 J5 F2 D6 B6 AM8 AJ9 E9 B10 AM12 AJ13 E13 B14 AM16 AJ5 AJ17 E17 B18 AM20 AJ21 D20 F22 AM24 AJ25 D24 F26 AM28 AJ29 D28 AK34 F30 B30 AM32 AH32 Z32 V32 R32 M32 H32 AF34 AB34 X34 T34 P34 K34 F34 B34 AH36 B22 V36 R36 H36 D36 D32 AD32 AH24 F14 K32 AA37 Y35
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
RS#0
RS#1
RS#2
GND GND GND GND GND GND GND GND GND GND VTTPWRGD GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND/VID4
TUALDET GND GND GND GND GND GND GND RSVD-NC GND DYN_OE GND
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HA#32
HA#33
HA#34
HA#35
VID0
VID1
VID2
VID3
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VTT1_5
VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID
VTT
VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID VCCVID

1
1
A A
FSB
66M
100M
133M
rsvd
near VCMOS Processor Pin
VCMOS Decouping
370 - Pin Socket
Place 0603 Paclage
Part2
Place Site w/in 0.5"
Do Not stuff C
of clock pin (W37)
GTLREF Generation Circuit
Use 0603 Packages and distribute
within 500 mils of VREF pins
1
BSEL#0
0
01 11
BSEL#1
0
0
CMOSREF
CMOSREF Generation
Circuit
No-stuff R199 page33
see page 34
see page 4
150
Intel® 810e2 Chipset Universal Socket 370 CRB
370-Pin Socket Part 2
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Title:
intel
GTLREFA
GTLREFA
A20M# 13
VTIN2 16,28
BPRI# 5,7
HITM# 5,7
BNR# 5,7
STPCLK# 13
INTR 13
HLOCK# 5,7
HTRDY# 5,7
IGNNE# 13
CPUSLP# 13
HIT# 5,7
DRDY# 5,7
BSEL#1 31
DEFER# 5,7
VCMOS 14
HADS# 7
BSEL#0 31
SMI# 13
DBSY# 5,7
APICD113,32 APICD013,32
CPUHCLK6
CPURST#7
APICCLK_CPU6
CPU_PWGD13
ITPRDY#5
ITPCLK6
DBRESET#27
BR0# 5
GTLREF 7
CMOSREF
NMI 13
FERR# 13,32
INIT# 13,15
THERMTRIP# 33
THRMDN 16,28
33 TUAL5
ITPTCK33
VCC2_5
VTT
VTT
V3SBV3SB
VTT1_5
VTT1_5
VTT
VCC 2_5
VTT
VCCVID
VTT
C2
X18PF
BC3
0.1UF
R15
0
R340
1K
R9
330
U1B
Socket 370_9
X2
AG1
C37 E21
AJ33
AJ31
AN29
AL29
AL31
AH28
S35
W33
U33
E27
AN35
AN37
AN33
AL33
AK32
J37
A35
G33
E37
C35
E35
N33
N35
N37
Q33
Q35
Q37
AK30
AM2
F10
W35
Y1
R2
G37
L33
J35
L35
J33
W37
Y33
AK26
AH4
X4
AB36 AD36 Z36 E33 F18 K4 R6 V6 AD6 AK12 AK22
AH14
AN17
AN25
AN19
AK20
AN27
AL23
AL25
AL27
AN31
AE37
AE33
AG35
AH30
AJ35
M36
L37
AG33
AC35
AG37
AE35
AC37
AL11
AN13
AN23
B36
AK24
V4
RESVD21(BR1#)
EDGCTRL/VRSEL
CPUPRES# VCOREDET
BSEL0#
BSEL1#
BR0#
THRMDN
THRMDP
THERMTRIP#
RTTCNTR
PLL1
PLL2
SLEWCNTR
TDI
TDO
TRST#
TCK
TMS
PREQ#
PRDY#
BP2#
BP3#
BPM0#
BPM1#
RSRVD6
RSRVD7
RSRVD8
RSRVD9
RSRVD10
RSRVD11
RSRVD12/JBSEL1#
RSRVD13
RSRVD15
RSRVD16
RSRVD17
RSRVD18
RSRVD19
RSRVD20
PICD0
PICD1
PICCLK
BCLK
CLKREF
PWRGOOD
RESET#
RESET2#
V_CMOS
V1_5 V2_5
VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7
BNR#
BPRI#
TRDY#
DEFER#
LOCK#
DRDY#
HITM#
HIT#
DBSY#
ADS#
FLUSH#
A20M#
STPCLK#
SLP#
SMI#
LINT0/INTR
LINT1/NMI
INIT#
FERR#
IGNNE#
IERR#
RSP#
AP0#
AP1#
RP#
BINIT#
AERR#
BERR#
R1
1K
R339
150,1%
R23 X0
R11
150
R275
22 PR3
110,%1
MC1
4.7UF
R346
1K
R6
1k
BC5
0.1UF
R12
150
R3
150
PR5
75,1%
R4
150
R317 0
R373
330
R316 0
R14
1K
+
C6 33uF (C size)
J1 HEADER 15X2
12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930
R33
90.9, 1%
R5
330
R199
1.8K
PR4
110,%1
BC228
0.1UF
R319
243,1%
PR6
150,1%
R345 1k
R7
PR1
150,1%
BC6
0.1UF
R374
14
R338
75.1%
C12
10PF
BC4
0.1UF
R10
680
R318
243.1%
L2
4.7UH/SMD-0805
BC1
0.1UF
Q27
FDN335N
PR2
150,1%
R8
150
BC2
0.1UF
R13
1K

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AGTL Termination
" One Cap for each 2 R-Pack "
HEATSINK GROUNDING
Intel® 810e2 Chipset Universal Socket 370 CRB
AGTL TERMINATION
36
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Last Revision Date:
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Title:
intel
HA#23
HA#17
HA#22
HA#31
HA#19
HA#21
HA#25
HA#10
HA#13
HA#16
HA#3
HA#9
HA#20
HA#24
HA#30
HA#28
HA#15
HA#12
HA#5
HA#7
HA#11
HA#6
HA#8
HA#4
HA#14
HA#27
HA#29
HA#26
HD#15
HD#1
HD#0
HD#6
HD#4
HD#9
HD#5
HD#8
HD#10
HD#12
HD#24
HD#21
HD#17
HD#23
HD#16
HD#3
HD#20
HD#7
HD#18
HD#11
HD#30
HD#13
HD#14
HD#2
HD#19
HD#29
HD#31
HD#26
HD#25
HD#35
HD#59
HD#48
HD#52
HD#40
HD#60
HD#62
HD#61
HD#56
HD#57
HD#55
HD#46
HD#58
HD#63
HD#53
HD#50
HD#54
HD#45
HD#27
HD#51
HD#44
HD#42
HD#47
HD#41
HD#49
HD#22
HD#38
HD#39
HD#37
HD#28
HD#34
HD#36
HD#43 HD#[63:0]
HA#[31:3]
HA#18
HD#32
HD#33
BNR# 4,7
HA#[31:3] 3,7
HD#[63:0] 3,7
HREQ#2 3,7
HLOCK# 4,7
HITM# 4,7
HIT# 4,7
DRDY# 4,7
DBSY# 4,7
HREQ#4 3,7
BPRI# 4,7
HREQ#0 3,7
ITPRDY# 4
BR0# 4
HREQ#1 3,7
HTRDY# 4,7
DEFER# 4,7
HREQ#3 3,7
VTT1_5VTT1_5VTT1_5VTT1_5
VTT1_5
RN27
56/8P4R
1
3
5
7
2
4
6
8
R24 150
BC14
0.1UF
BC13
0.1UF
U1C
Socket 370_9
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
GD32
GD33
GD34
GD35
GD36
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
BC11
0.1UF
RN25
56/8P4R
1
3
5
7
2
4
6
8
BC18
0.1UF
BC17
0.1UF
RN21
56/8P4R
1
3
5
7
2
4
6
8
RN13
56/8P4R
1
3
5
7
2
4
6
8
RN16
56/8P4R
1
3
5
7
2
4
6
8
RN6
56/8P4R
1
3
5
7
2
4
6
8
RN2
56/8P4R
1
3
5
7
2
4
6
8
RN24
56/8P4R
1
3
5
7
2
4
6
8
RN8
56/8P4R
1
3
5
7
2
4
6
8
BC15
0.1UF
RN7
56/8P4R
1
3
5
7
2
4
6
8
MC3
4.7UF
RN15
56/8P4R
1
3
5
7
2
4
6
8
BC12
0.1UF
RN18
56/8P4R
1
3
5
7
2
4
6
8
RN1
56/8P4R
1
3
5
7
2
4
6
8
RN4
56/8P4R
1
3
5
7
2
4
6
8
RN19
56/8P4R
1
3
5
7
2
4
6
8
BC21
0.1UF
RN26
56/8P4R
1
3
5
7
2
4
6
8
BC16
0.1UF
BC7
0.1UF
RN14
56/8P4R
1
3
5
7
2
4
6
8
RN11
56/8P4R
1
3
5
7
2
4
6
8
RN20
56/8P4R
1
3
5
7
2
4
6
8
RN3
56/8P4R
1
3
5
7
2
4
6
8
RN23
56/8P4R
1
3
5
7
2
4
6
8
BC10
0.1UF
RN17
56/8P4R
1
3
5
7
2
4
6
8
RN5
56/8P4R
1
3
5
7
2
4
6
8
BC20
0.1UF
BC19
0.1UF
BC9
0.1UF
RN10
56/8P4R
1
3
5
7
2
4
6
8
BC8
0.1UF
RN28
56/8P4R
1
3
5
7
2
4
6
8
RN22
56/8P4R
1
3
5
7
2
4
6
8
RN9
56/8P4R
1
3
5
7
2
4
6
8
MC2
4.7UF
R25 10

A
A
A A
Clock Synthesizer
- Place all decoupling caps as closetoVCC/GNDpinsaspossible
Notes:
Minimize Stub Length from
CLK14 trace to
JP20A.
- PCI_0/ICH pin has to go totheICH.
- CPU_ITP pin must go to the ITP.Itistheonly
CPU CLK that can be shut off throughtheSMBUSinterface.
(This clock cannot be turnedoffthroughSMBus)
APIC Clk Strap JP20A
16 MH z
33 MH z
in
out
Intel® 810e2 Chipset Universal Socket370CRB
Clock Synthesizer
36
1.0
9/02/01
6
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
Last Revision Date:
Sheet:
of
Title:
intel
DCLK
MEMCLK2
MEMCLK1
MEMCLK4
MEMCLK7
MEMCLK3
MEMCLK5
MEMCLK0
MEMCLK6
DRAM_1
XTAL_IN
CPU_0_1
DRAM_7
MEMV3PCIV3
3V66_0
L_VCC2_5
XTAL_OUT
USBV3
APIC_1
DRAM_0
DRAM_2
DRAM_3
DRAM_4
DRAM_5
DRAM_6
SEL1_PU
3V66_1
PCI_3
L_CKVDDA
CPU_2
REFCLK
APIC_0
DCLK_WR8
FREQSEL9,31
APICCLK_ICH 13
CPUHCLK 4
GMCHHCLK 7
ITPCLK 4
SLP_S3# 14,16,30
CK_SMBDATA 25
CK_SMBCLK25
ICH_CLK1414
ICH_3V6614GMCH_3V668
PCLK_0/ICH13
DOTCLK9USBCLK14,16
PCLK_615 PCLK_518 PCLK_416
PCLK_318 PCLK_217 PCLK_117
FMOD131
SIO_CLK2414,16
MEMCLK[7:0] 11,12
33 VTTPWRGD12
TUAL5 33
APICCLK_CPU 4
VCC_CLOCK
VCC_CLOCK
VCC_CLOCK
VCC2_5
VCC3_3
VCC3_3
VCC_CLOCK
0.1UF
C22A
0.1UF
C8A
R26A
8.2K
CPU
APIC
USB
REF
CK810e
3V66
PCI Memory
U2A
7
8
55
54
52
50
49
11
12
13
15
16
18
19
20
1
31
30
46
45
43
42
40
39
37
36
28
29
25
26
51
53
2 9 10 21 27 33 38 44
22
48
56
5 6 14 17 24 35 41 47
23
3
4
34
32
3V66_0
3V66_1
APIC_0
APIC_1
CPU_0
CPU_1
CPU_2/ITP
PCI_0/ICH
PCI_1
PCI_2
PCI_3
PCI_4
PCI_5
PCI_6
PCI_7
REF0
SCLK
SDATA
SDRAM_0
SDRAM_1
SDRAM_2
SDRAM_3
SDRAM_4
SDRAM_5
SDRAM_6
SDRAM_7
SEL0
SEL1
USB_0
USB_1
VDD2_5[0]
VDD2_5[1]
VDD3_3[0] VDD3_3[1] VDD3_3[2] VDD3_3[3] VDD3_3[4] VDD3_3[5] VDD3_3[6] VDD3_3[7]
VDD_A
VSS2_5[0]
VSS2_5[1]
VSS3_3[0] VSS3_3[1] VSS3_3[2] VSS3_3[3] VSS3_3[4] VSS3_3[5] VSS3_3[6] VSS3_3[7]
VSS_A
XTAL_IN
XTAL_OUT
DCLK
PWRDWN#
R32A
33
.001UF
C6A
R54A
10K
.1UF
C16A
BC23
X10PF
R36A
22
R347
0
.001UF
C13A
.1UF
C18A
.001UF
C15A
R348
130
R35A
22
R51A
10
R45A
22
0.1UF
C25A
R41A
22
Q29
FDN359AN
R52A
33
+
22UF
C11A
12
Q28
2N7002
.001UF
C23A
.001UF
C17A
.001UF
C7A
R42A
33
R27A
33
R38A
33
.001UF
C9A
R49A
33
R37A
22
L6A
1 2
L4A
1 2
R31A
10 R33A
22
+
22UF
C4A
12
12PF
C21A
R47A
22
+
4.7UF
C26A
12
R28A
33
R53A
22
+
22UF
C19A
12
R44A
33
Y1A
XTAL
14.318MHZ
1 2
JP1A
12PF
C20A
0.1UF
C5A
0.1UF
C10A
R29A
33
R43A
22
R39A
22
L3A
1 2
R34A
22
R50A
22
BC22
X10PF
0.1UF
C12A
0.1UF
C14A
L2A
1 2
R30A
33
R40A
33
.001UF
C24A
R48A
33
R46A
33
L5A
1 2

A
A
A A
82810E, PART 1: HOST INTERFACE
Place site w/in 0.5"
of clock ball (V6)
Do not Stuff C365A
Intel® 810e2 Chipset Universal Socket370CRB
82810E, Part 1: Host Interface
36
1.0
9/02/01
7
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
Last Revision Date:
Sheet:
of
Title:
intel
HA#13
HA#26
HA#6
HD#16
HD#17
HREQ#0
HA#4
HD#29
HREQ#4
HD#18
HD#30
HD#31
HD#43
HD#44
HD#49
HD#5
HD#6
HA#18
HA#25
HD#1
HD#11
HD#25
HD#40
HD#62
RS#1
HA#27
HD#46
HD#48
HA#10
HA#9
HD#2
HD#63
HREQ#3
HA#20
HA#21
HD#23
HD#24
HD#53
HREQ#1
HA#24
HA#3
HD#47
HD#51
RS#2
HD#12
HD#19
HD#3
HD#35
HD#36
HD#52
HD#55
HD#8
HD#9
HA#11
HD#26
HD#14
HD#20
HD#21
HD#4
HD#50
HD#57
HA#15
HA#22
HA#30
HA#7
HD#15
HD#28
HD#41
HD#56
HD#61
HREQ#2
HA#28
HA#31
HA#5
HD#0
HD#59
HA#29
HD#34
HD#38
HA#16
HA#19
HA#8
HD#13
HD#42
HD#45
HD#54
HD#58
HD#60
HD#7
HA#23
HD#10
HD#32
HD#39
RS#0
HA#12
HA#14
HA#17
HD#22
HD#27
HD#33
HD#37
GMCHGTLREF
CPURST#4HLOCK#4,5
HTRDY#4,5
GMCHHCLK6PCIRST#15,16,24,32
DEFER#4,5 HADS#4 BNR#4,5 BPRI#4,5 DBSY#4,5 DRDY#4,5 HIT#4,5 HITM#4,5
HD#[63:0]3,5
HA#[31:3]3,5
HREQ#[4:0]3,5
RS#[2:0]3
GTLREF
4
VCC1_8
VTT1_5
HOST INTERFACE
U3A
INTEL 82810E
PART1
N3
T3
T1
M4
R3
N1
M5
W13
W1
U4
W3
W4
T5
W2
V2
AC2
AA2
Y3
AB3
AA1
AB2
AC3
AA3
Y2
AB5
AC4
Y1
AC5
U5
Y4
AB1
U1
V4
V1
T4
U2
U3
Y5
W5
AB7
AC8
AA7
Y8
W7
AC6
W9
AC9
Y7
AA10
W8
AB8
AC10
AB13
AB10
AB9
AB11
Y10
AB16
AB12
Y11
AA6
Y9
AC12
W11
AC11
W12
AA11
AA13
Y13
Y12
AC14
AB6
AA15
AC15
Y14
AC13
AA14
AB14
Y17
Y15
AC17
AC16
Y6
AA18
AB15
W15
AB18
W17
AA17
W18
W16
AC19
Y16
AA5
AB19
Y18
AC18
AB17
AA9
V5
AC7
P1
R1
R4
T2
P4
R2
R5
N4
M2
N5
P2
N2
B20 P6 V17 F14 F10 F8 F7 V16 V15 V14 V10 V9 V8 V7 F17 F16
Y22 K11 K10 L14 L13 L12 L11 L10 M14 M13 M12 V18 M11 M10 N14 N13 N22 J22 Y19 C19 E22 K14 K13 K12
V6
U18
AB4
P5
ADS#
BNR#
BPRI#
DBSY#
DEFER#
DRDY#
GTLREFA
GTLREFB
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA3#
HA30#
HA31#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HD0#
HD1#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD2#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD3#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD4#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD5#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD6#
HD60#
HD61#
HD62#
HD63#
HD7#
HD8#
HD9#
HIT#
HITM#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HTRDY#
RESETB
RS0#
RS1#
RS2#
VCC1_8[0] VCC1_8[1]
VCC_CORE[0]
VCC_CORE[10] VCC_CORE[11] VCC_CORE[12] VCC_CORE[13]
VCC_CORE[1] VCC_CORE[2] VCC_CORE[3] VCC_CORE[4] VCC_CORE[5] VCC_CORE[6] VCC_CORE[7] VCC_CORE[8] VCC_CORE[9]
VSS[0] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[1] VSS[20] VSS[21] VSS[22] VSS[23] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9]
HTCLK
VCC1_8[2]
CPURST#
HLOCK#
18PF
C29A
R56A
X0
0.1UF
C27A
R55A
75
1%
.001UF
C28A
R57A
150
1%

A
A
A A
82810E, PART 2: SYSTEM MEMORY
AND HUB INTERFACE
as possible to GMCH
Place Resistor as Close
Place C369A as close
as possible to GMCH
Place HUBREF Generation
Circuit in the middle of
GMCH and ICH. Must be
within 4" of GMCH and
ICH2.
Intel® 810e2 Chipset Universal Socket370CRB
82810E, Part 2: System Memory and Hub
36
1.0
9/02/01
8
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
Last Revision Date:
Sheet:
of
Title:
intel
GHCOMP
SM_MD2
SM_MD33
SM_MD58
SM_MD61
SM_MD18
SM_MD42
SM_MD24
SM_MD23
SM_MD29
SM_MD21
SM_MD48
SM_MD50
SM_MD7
SM_MD0
SM_MD46
SM_MD12
SM_MD54
SM_MD39
SM_MD10
SM_MD5
SM_MD37
SM_MD35
SM_MD14
SM_MD59
SM_MD30
SM_MD3
SM_MD34
SM_MD19
SM_MD62
SM_MD49
SM_MD15
SM_MD8
SM_MD51
SM_MD22
SM_MD57
SM_MD55
SM_MD25
SM_MD47
SM_MD40
SM_MD31
SM_MD44
SM_MD60
SM_MD32
SM_MD36
SM_MD17
SM_MD1
SM_MD27
SM_MD20
SM_MD28
SM_MD63
SM_MD6
SM_MD16
SM_MD9
SM_MD52
SM_MD11
SM_MD53
SM_MD13
SM_MD38
SM_MD4
SM_MD56
SM_MD43
SM_MD26
SM_MD41
SM_MD45
SCLK
SM_MAB# 7
SM_MAB# 6
SM_MAB# 5
SM_MAB# 4
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
SM_BS0
SM_BS1
SM_CS# 3
SM_CS# 2
SM_CS# 1
SM_CS# 0
SM_CKE0
SM_CKE1
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL9
HL10
HL8
HL7
SM_MAA8
SM_MAA5
SM_MAA1
SM_MAA7
SM_MAA6
SM_MAA9
SM_MAA3
SM_MAA2
SM_MAA0
SM_MAA11
SM_MAA10
SM_MAA4
HUBREF
SM_MAB#[7:4]12
SM_RAS#11,12 SM_CAS#11,12 SM_WE#11,12
GMCH_3V666
HLSTB13 HLSTB#13
SM_DQM[7:0]11,12
SM_BS[1:0]11,12
SM_CS#[3:0]11,12
SM_CKE[1:0]11,12
SM_MD[63:0] 11,12
HL[10:0]13
SM_MAA[11:0]11,12
DCLK_WR6
HUBREF13
VCC1_8VCC3_3
VCC3_3SBY
VCC1_8
R60
300 1%
12
RP1A
10
1
2
3
4 5
6
7
8
R59A
0K
R61
300 1%
12
RP2A
10
1
2
3
4 5
6
7
8
18PF
C33A
22PF
C30A
AND
SYSTEM MEMORY
HUB INTERFACE
HUB I/F
U3B
INTEL 82810E
PART 2
D18
C21
B23
A19
B22
A23
B19
B18
C18
A18
A22
C20
D19
A21
A20
D20
C5
A11
A3
A2
E6
C4
C3
B3
C2
C10
A10
B1
D1
B10
D9
C1
D2
C9
E7
D5
A5
A9
D7
B8
A8
B7
A7
D6
C6
B6
A6
B4
A4
E17
C16
B14
A14
D13
C13
A13
A12
E1
F2
G4
G1
D15
D3
H2
H1
J4
J1
K2
K1
K3
L1
L2
D17
M3
K4
D16
E15
D14
E14
E13
E12
D12
B15
C17
B12
C12
D11
D10
E10
E9
E8
C8
F3
F1
A17
G2
H3
E4
E3
F4
J3
F5
G5
H5
H4
A16
H6
J5
K5
L5
B16
A15
C14
D8
B11
D4 B2 L21 F18 J18 R18 C11 C7 C15 L3 G3 F15 F9 K6 F6
N12 N11 N10 P14 P13 P12 P11 P10 AC1 AA4 AA8 AA12 AA16 W6 W10 W14 V3 R6 P3 M1 L4 J2
E5
G21
HCOMP
HL0
HL1
HL10
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HLCLK
HLSTB
HLSTB#
HUBREF
SBS0
SCAS#
SCKE0
SCKE1
SCLK
SCS0#
SCS1#
SCS2#
SCS3#
SDQM0
SDQM1
SDQM2
SDQM3
SDQM4
SDQM5
SDQM6
SDQM7
SMAA0
SMAA1
SMAA10
SMAA11
SMAA2
SMAA3
SMAA4
SMAA5
SMAA6
SMAA7
SMAA8
SMAA9
SMAB4#
SMAB5#
SMAB6#
SMAB7#
SMD0
SMD1
SMD10
SMD11
SMD12
SMD13
SMD14
SMD15
SMD16
SMD17
SMD18
SMD19
SMD2
SMD20
SMD21
SMD22
SMD23
SMD24
SMD25
SMD26
SMD27
SMD28
SMD29
SMD3
SMD30
SMD31
SMD32
SMD33
SMD34
SMD35
SMD36
SMD37
SMD38
SMD39
SMD4
SMD40
SMD41
SMD42
SMD43
SMD44
SMD45
SMD46
SMD47
SMD48
SMD49
SMD5
SMD50
SMD51
SMD52
SMD53
SMD54
SMD55
SMD56
SMD57
SMD58
SMD59
SMD6
SMD60
SMD61
SMD62
SMD63
SMD7
SMD8
SMD9
SRAS#
SWE#
VCC3_3[0]
VCC3_3[10] VCC3_3[11] VCC3_3[13] VCC3_3[14] VCC3_3[15]
VCC3_3[1] VCC3_3[2] VCC3_3[3] VCC3_3[4] VCC3_3[5] VCC3_3[6] VCC3_3[7] VCC3_3[8] VCC3_3[9]
VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45]
SBS1
VCC3_3[12]
0.01UF
C32A
C31
0.1 uF
12
R58A
40
1%

A
A
A A
Place as close as
Possible to GMCH
and via straight to
VSS plane.
GMCH RESET STRAPS
Place R242A within 0.5"
of the GMCH Ball.
Use Surface Mount Caps
placed as close as possible to
power pins with short,
wide direct connections
82810E, PART 3: DISPLAY CACHE
AND VIDEO INTERFACE
JumperComment Function
XOR
IN = XOR Tree
*OUT = Normal
Tri-state JP22A IN = Tri-state Mode
*OUT = Normal
System
bus fregN/A Reads System
Bus Freq.
IOQ Depth JP23A
IN = IOQ Depth of 1
*Out = IOQ Depth of 4
VCORE
Detect
RESVD
N/A
JP24A
Detects type of Processor
I/O Buffers
TBD
Do not Stuff C374A
Place site w / in 0.5"
of clock ball (AA21).
JP21A
Do Not Populate C375A
LMD26 Processor Auto-Detect Circuit
Intel® 810e2 Chipset Universal Socket370CRB
82810E, Part 3 : Display Cache andVideo
36
1.0
9/02/01
9
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
Last Revision Date:
Sheet:
of
Title:
intel
DC_MD 31
DC_MD30
DC_MD 28
DC_MD 26
GRS_PU26
GRS_PU28 GRS_PU30
DC_MD21
DC_MD29
VCCDACA
DC_MD14
DC_MD3
DC_MD6
DC_MD7
RCLK
FTD10
DC_MA2
DC_MD10
DC_MD15
DC_MD26
DC_MD12
DC_MD8
DC_MD9
FTD1
FTD2
DC_DQM1
DC_DQM2
DC_MA11
DC_MD0
DC_MD5
DC_MA10
DC_MA3
DC_MA5
DC_MD25
FTD8
DC_MD17
FTD3
DC_MA8
DC_MD4
R_LTCLK
FTD0
DC_DQM0
DC_MA0
DC_MD31
FTD9
DC_MA1
DC_MA6
DC_MD11
DC_MD20
DC_MD22
OCLK
DC_DQM3
DC_MD13
DC_MD27
DC_MD30
FTD11
FTD4
DC_MA9
DC_MD24
IREFPD
DC_MD1
DC_MD16
DC_MD18
DC_MD23
FTD7
DC_MD13
DC_MA7
DC_MD2
FTD6
DC_MD29
DOTCLK
DC_MA4
DC_MD19
DC_MD28
FTD5
FREQSEL6,31
FTBLNK# 24
SL_STALL 24
DC_CLK10
DC_RAS#10 DC_CAS#10 DC_WE#10
DC_CS#10
DC_DQM[3:0]10
DC_MA[11:0]10
DC_MD[31:0]10
FTD[11:0]24
R_REFCLK 31
CRT_HSYNC 25
3VFTSCL24,25
CRT_VSYNC 25
VID_RED 25
FTCLK1 24
DOTCLK 6
VID_BLUE 25
3VDDCCL 25
VID_GREEN 25
3VFTSDA24,25
FTCLK0 24
FTHSYNC24
FTVSYNC24
3VDDCDA25
VCC1_8VCC1_8
VCC3_3
VCC3_3
TUAL5
DC_MD26
L7A
68NH-0.3A
22PF
C38A
0.01UF
C34A
+
33UF
C36A
12
JP4A
0.1UF
C35A
RP4A
10K
1 2 3 4 5
6 7 8
JP5A
JP2A
R1
8.2K
JP3A
R63A
22
18PF
C37A
Q1
2N7002
R62A
174
1%
R65A
33
INTERFACE
VIDEO DIGITAL OUT
GRAPHICS INTERFACE
DISPLAY CACHE
U3C
AND
VIDEO INTERFACE
DISPLAYCACHE
INTEL 82810E
PART3
V19
AC23
V21
V22
AA21
W20
W19
AC22
AB20
AA23
Y23
K20
L20
P21
R23
C23
F20
M19
P19
M20
L19
P20
N19
J21
H19
H20
H18
G19
F19
M22
M21
P23
P22
N23
N21
N20
M23
F23
E20
E21
E23
L23
D22
D23
D21
C22
H21
H22
H23
G20
G22
G23
L22
F21
F22
K21
K23
R19
R20
R22
R21
J23
K19
J20
K22
T19
T20
Y21
Y20
T22
T21
W23
W22
W21
V23
U23
U22
U21
T23
J19
AC21
U20
U19
V20
E19 AC20 AB23 AB21 U6
E18 AA22 AB22 T6 J6 G6 E2 A1 B5 B9 E11 B13 E16 B17 B21 G18 K18 P18 T18 AA19
AA20
BLANK#
BLUE
CLKOUT0
CLKOUT1
DCLKREF
DDCCL
DDCDA
GREEN
HSYNC
IREF
IWASTE
LCAS#
LCS#
LDQM0
LDQM1
LDQM2
LDQM3
LMA0
LMA1
LMA10
LMA11
LMA2
LMA3
LMA4
LMA5
LMA6
LMA7
LMA8
LMA9
LMD0
LMD1
LMD10
LMD11
LMD12
LMD13
LMD14
LMD15
LMD16
LMD17
LMD18
LMD19
LMD2
LMD20
LMD21
LMD22
LMD23
LMD24
LMD25
LMD26
LMD27
LMD28
LMD29
LMD3
LMD30
LMD31
LMD4
LMD5
LMD6
LMD7
LMD8
LMD9
LOCLK
LRAS#
LRCLK
LTCLK
LTVCL
LTVDA
LTVDATA0
LTVDATA1
LTVDATA10
LTVDATA11
LTVDATA2
LTVDATA3
LTVDATA4
LTVDATA5
LTVDATA6
LTVDATA7
LTVDATA8
LTVDATA9
LWE#
RED
TVCLKIN/SL_STALL
TVHSYNC
TVVSYNC
VCCBA VCCDA
VCCDACA1 VCCDACA2
VCCHA
VSSBA VSSDA VSSDACA VSSHA VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61]
VSYNC
R64A
0K
RP3A
10K
1 2 3 4 5
6 7 8

A
A
A A
4MB Display
Cache
Intel® 810e2 Chipset Universal Socket370CRB
Display Cache
36
1.0
9/02/01
10
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
Last Revision Date:
Sheet:
of
Title:
intel
DC_DQM2
DC_DQM3
DC_DQM1
DC_DQM0
DC_MD 16
DC_MD 18
DC_MD 17
DC_MD 19
DC_MD 20
DC_MD 21
DC_MD 22
DC_MD 23
DC_MD 24
DC_MD 25
DC_MD 26
DC_MD 27
DC_MD 28
DC_MD 29
DC_MD 30
DC_MD 31
DC_MD 0
DC_MD 1
DC_MD 2
DC_MD 3
DC_MD 4
DC_MD 5
DC_MD 6
DC_MD 7
DC_MD 8
DC_MD 9
DC_MD10
DC_MD 11
DC_MD 12
DC_MD 13
DC_MD 14
DC_MD 15
DC_WE#
DC_CAS#
DC_RAS#
DC_CS#
DC_CLK
DC_MA[11:0]
DC_CKE
DC_CKE
DC_MA0
DC_MA1
DC_MA2
DC_MA3
DC_MA4
DC_MA5
DC_MA6
DC_MA7
DC_MA8
DC_MA9
DC_MA10
DC_MA11 DC_MA1 1
DC_MA1 0
DC_MA9
DC_MA8
DC_MA7
DC_MA6
DC_MA5
DC_MA4
DC_MA3
DC_MA2
DC_MA1
DC_MA0
DC_DQM[3:0] 9
DC_CS#9 DC_RAS#9DC_CAS#9DC_WE#9
DC_CLK9
DC_MA[11:0]9DC_MD[31:0]9
VCC3_3
VCC3_3
VCC3_3
50-PIN TSOP
SDRAM
U4A
21
22
20
19
23
24
27
28
29
30
31
32
35
2
3
42
43
45
46
48
49
5
6
8
9
11
12
39
40
14
33
37
36
7 13 38 44 1 25
47 41 10 4 50 26
34
16
17
18
15
A0
A1
A10
A11
A2
A3
A4
A5
A6
A7
A8
A9
CLK
DQ0
DQ1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
LDQM
NC_1
NC_2
UDQM
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4
VDD_1 VDD_2
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSS_1 VSS_2
CKE
CAS#
RAS#
CS#
WE#
R66A
4.7K
50-PIN TSOP
SDRAM
U5A
21
22
20
19
23
24
27
28
29
30
31
32
35
2
3
42
43
45
46
48
49
5
6
8
9
11
12
39
40
14
33
37
36
7 13 38 44 1 25
47 41 10 4 50 26
34
16
17
18
15
A0
A1
A10
A11
A2
A3
A4
A5
A6
A7
A8
A9
CLK
DQ0
DQ1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
LDQM
NC_1
NC_2
UDQM
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4
VDD_1 VDD_2
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSS_1 VSS_2
CKE
CAS#
RAS#
CS#
WE#