Xilinx KC705 Si5324 User manual
October 2012
KC705 Si5324 Design
XTP188
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Revision History
Date Version Description
10/23/12 4.0 Recompiled for 14.3.
07/25/12 3.0 Recompiled for 14.2. Added AR50886.
05/08/12 2.0 Recompiled for 14.1.
02/14/12 1.0 Initial version for 13.4.
Overview
Xilinx KC705 Board
Software Requirements
KC705 Setup
Reducing Jitter with the Si5324
Compile KC705 Si5324 Design
References
Note: This presentation applies to the KC705
KC705 Si5324 Design Description
Description
–The Si5324 application uses an EDK MicroBlaze system to change the settings
for the Si5324 chip on the KC705 board via IIC
–Note: This design illustrates the relative differences of a Jitter Attenuator device
in Bypass mode or in PLL mode. Neither the Evaluation board nor the design
are for characterization purposes. Please see the Silicon Labs web site for
Jitter Attenuator device data.
Reference Design Source
–rdf0177.zip
–Available through http://www.xilinx.com/kc705
Note: Presentation applies to the KC705
Xilinx KC705 Board
ISE Software Requirement
Xilinx ISE 14.3 software
Note: Presentation applies to the KC705
EDK Software Requirement
Xilinx EDK 14.3 software
Note: Presentation applies to the KC705
EDK Software Requirement
Xilinx SDK 14.3 software
Note: Presentation applies to the KC705
KC705 Setup
Connect a USB Type-A to Micro-B cable to the USB
JTAG (Digilent) connector on the KC705 board
–Connect this cable to your PC
–Power on the KC705 board
KC705 Si5324 Setup
Unzip the KC705 Si5324 Design Files (14.3 C)
–Available through http://www.xilinx.com/kc705
Note: Presentation applies to the KC705
Reducing Jitter with the Si5324
Reducing Jitter with the Si5324
A means of measuring
jitter is required for this
section
A LeCroy 816Zi-A Scope
was used (stock photo
shown)
Note: Presentation applies to the KC705
Reducing Jitter with the Si5324
Connect SMA cables to J13 and J14, USER_GPIO_P/N
Connect these cable to your oscilloscope
Reducing Jitter with the Si5324
Open ChipScope Pro and select JTAG Chain →Digilent USB Cable…
(1)
Verify 30 MHz operation and click OK (2)
Note: Presentation applies to the KC705
1
2
Reducing Jitter with the Si5324
Click OK (1)
Note: Presentation applies to the KC705
1
Reducing Jitter with the Si5324
Select Device → DEV:0 MyDevice0 (XC7K325T) → Configure…
Select <Design Path>\ready_for_download\si5324_bypass.bit
Note: Presentation applies to the KC705
Reducing Jitter with the Si5324
LeCroy Oscilloscope setup
Press the Default Setup followed by the Auto Setup twice
Reducing Jitter with the Si5324
Adjust the Horizontal knob until you have 5 μs/div
Reducing Jitter with the Si5324
From the LeCroy scope menu, select Analysis → Serial Data…
Reducing Jitter with the Si5324
Select “Quick View”
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