XMOS xCORE VocalFusion 4-Mic Kit for Amazon AVS User manual

xCORE VocalFusion 4-Mic Kit for Amazon AVS Hardware Manual
IN THIS DOCUMENT
·Features
·Introduction
·Clock sources and distribution
·Stereo DAC with headphone amplifier
·MEMS microphone board
·I2C bus
·General purpose user interface
·Extension headers
·USB port
·Flash memory
·xSYS connector
·xCORE VocalFusion BaseBoard portmap
·Operating requirements
·Dimensions
·RoHS and REACH
·Schematics
The xCORE VocalFusion 4-Mic Kit for Amazon AVS is an application specific
design targeted at far-field voice capture and processing for Amazon Alexa Voice
Service (AVS) applications.
The kit is based on the XMOS XVF3000 voice processor and integrates the xCORE
microphone capture and voice processing library with all the necessary hardware
building blocks including:
·linear array of 4 omni-directional microphones
·low-jitter audio clock
·configurable user input buttons and LEDs
·I2S audio and I2C control connectivity
·optional USB2.0 device audio and control connectivity
Publication Date: 2017/9/7 Document Number: XM011897A
XMOS © 2017, All Rights Reserved

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Figure 1:
xCORE
VocalFusion
BaseBoard
Figure 2:
xCORE
VocalFusion
Short Linear
microphone
board
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1 Features
A block diagram for the xCORE VocalFusion 4-Mic Kit for Amazon AVS is shown
in Figure 3below. It includes:
·xCORE VocalFusion XVF3000 voice processor
·Four MEMS microphones (on a separate board)
·A micro-USB connector for power (and optionally USB2.0 device connectivity)
·An extension header for I2S audio and I2C control connectivity
·Four general purpose push-button switches (not currently used)
·13 user-controlled LEDs (not currently used)
·Low-jitter audio clock source
·An xSYS connector for an xTAG debug adapter
xCORE
VocalFusion
XVF3000
TILE CLK to xCore
DAC-MCLK
PLL CLK
Device
BUFFERMCLK 25 MHz
DAC
CS43L21
Infineon
IM69D130
HP
USB
Type-B
1v3v3 2v5
XTAG(J2)
MIC2
MIC1
MIC0
MIC3
MIC-DATA[3:0]
MIC-CLK
Buffer
MIC CLK[3:0]
JTAG
LEDs
BUFFER
PUSH BUTTON
D-FF
3.5mm Jack
USB diff pair
Expansion
Header
Separate board with
4 microphones
I2C
I2S
EEPROM
I2C
I2S
Figure 3:
xCORE
VocalFusion
4-Mic Kit for
Amazon AVS
block
diagram
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2 Introduction
The xCORE VocalFusion 4-Mic Kit for Amazon AVS (XK-VF3000-L33-AVS) consists
of an xCORE VocalFusion BaseBoard (XP-VF3000-BASE, Figure 1) and a separate
linear microphone array (LINEAR MICROPHONE ARRAY E, Figure 2) using Infineon
IM69D1301MEMS microphones.
The VocalFusion BaseBoard is based on the XMOS XVF3000 device, running a
software which integrates the xCORE microphone capture and voice processing
library to provide: beamforming, acoustic echo cancellation, noise suppression,
de-reverberation and automatic gain control.
The XVF3000 device has 16 32-bit logical processing cores and integrates 2MBytes
Quad Serial Peripheral Interface (QSPI) flash in a TQ128 package.
For general information on the XVF3000 device see the xCORE-200 Architecture
Overview
2
. For device specific information on the XVF3000 device see the XVF3000
Datasheet3.
1http://www.infineon.com/microphones
2http://www.xmos.com/published/xcore-architecture
3http://www.xmos.com/published/xvf3000_3100-tq128-datasheet
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3 Clock sources and distribution
The BaseBoard includes a single clock generator (Si5351A-B04486-GT, U25) that
generates two clocks:
·XVF3000 reference clock - 24MHz oscillator
· Low jitter master audio clock - 24.576MHz oscillator, used for the DAC and
(indirectly) the microphones
The clock generator is controlled over the I2C bus (see §6, below).
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 4:
Clock and
oscillator
locations
4 Stereo DAC with headphone amplifier
A CS43L21 stereo DAC with integrated headphone amplifier is used to generate
audio output on a 3.5mm audio jack. The CS43L21 is connected to the XVF3000
device through an I2S interface and is configured using the I2C bus (see §6, below).
The CS43L21 stereo DAC/HPA device is connected to the following pins for its I2S
interface:
Pin Port Signal
X1D28 P4F0 DAC_RST_N
X1D36 P1M0 I2S_BCLK
X1D37 P1N0 I2S_LRCK
X1D38 P1O0 MCLK_TILE1
X1D39 P1P0 I2S_DAC_DATA
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USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 5:
DAC and
3.5mm audio
jack locations
5 MEMS microphone board
The microphone board is plugged into connector J3 on the BaseBoard using a
ribbon cable. A short ribbon cable should be used for signal integrity.
The microphones should not be plugged into the xSYS connector.
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 6:
Microphone
connector
location
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The microphone array consists of a linear array of four microphones (spaced
33mm apart), a clock buffer, voltage level shifters and an EEPROM for optional
identification.
The microphone signals are mapped onto the XVF3000 device as shown in Figure 7.
Microphone xCORE GPIO Port
MIC_CLK X0D12 P1E0
MCLK_IN X0D13 P1F0
MIC_0 X0D14 P8B0
MIC_1 X0D15 P8B1
MIC_2 X0D16 P8B2
MIC_3 X0D17 P8B3
Figure 7:
Linear MEMS
microphone
board xCORE
GPIO
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6 I2C bus
The BaseBoard has a main I2C bus that is used to control the DAC, clock generator,
and EEPROM. This main I2C bus is connected to tile 1 of the XVF3000, with the
XVF3000 acting as a master on this I2C bus.
Pin Port Signal
X1D26 P4E0 I2C_SCL
X1D27 P4E1 I2C_SDA
The addresses of devices on the I2C bus are shown below.
Device Address
Si5351A (Clock) 0b1100010 0x62
CS43L21 (DAC) 0b1001010 0x4A
24LC08B (EEPROM on microphone board) 0b1010Xxx 0x5x
Please refer to the 24LC08B datasheet for details on how to set the address of the
EEPROM.
The BaseBoard also has a secondary I2C bus, on which the XVF3000 is a slave -
so allowing the XVF3000 to be controlled by an external I2C host. This slave I2C
interface is wired up to the extension header (see §8, below).
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7 General purpose user interface
The BaseBoard has 13 LEDs that are controlled by the XVF3000 GPIO. LED_0 -
LED_11 (D2-D13) are positioned around the edge of the BaseBoard. LED_12 (D14)
is positioned in the middle of the BaseBoard. The LED GPIO output must be set low
to light the corresponding LED.
Four general purpose push-button switches are provided. When pressed, each
button creates a connection from the I/O to GND. To ensure correct behavior, the
port connected to the buttons (P4A) must always be defined as an input.
LED_1
LED_7
LED_11
LED_5
LED_10
LED_4
LED_9
LED_3
LED_0
LED_6
LED_2
LED_8
LED_12
BUT_A BUT_B BUT_C BUT_D
Figure 8:
General
purpose user
interface
components
The signal mapping of the user interface components is shown in Figure 9and
Figure 10
UI signal xCORE GPIO Port
BUTTON_A X0D02 P4A0
BUTTON_B X0D03 P4A1
BUTTON_C X0D08 P4A2
BUTTON_D X0D09 P4A3
Figure 9:
User interface
GPIO
A green LED (PGOOD) near the USB connector indicates 3V3 and 1V0 supplies are
up.
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UI signal xCORE GPIO Port
LED_0 X0D26 P16B0
LED_1 X0D27 P16B1
LED_2 X0D28 P16B2
LED_3 X0D29 P16B3
LED_4 X0D30 P16B4
LED_5 X0D31 P16B5
LED_6 X0D32 P16B6
LED_7 X0D33 P16B7
LED_8 X0D34 P1K0
LED_9 X0D35 P1L0
LED_10 X0D36 P16B8
LED_11 X0D37 P16B9
LED_12 X0D38 P16B10
Figure 10:
User interface
GPIO
8 Extension headers
The BaseBoard has a two extension headers, J5 and J6, containing: audio MCLK,
all I2S signals, the secondary I2C bus (see §6) and seven general purpose IOs
controlled by the XVF3000.
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 11:
Extension
header
location
The signal mapping of the extension header is shown in Figure 12 and Figure 13.
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