XMOS xCORE VocalFusion 4-Mic Kit for Amazon AVS User manual

xCORE VocalFusion 4-Mic Kit for Amazon AVS Hardware Manual
IN THIS DOCUMENT
·Features
·Introduction
·Clock sources and distribution
·Stereo DAC with headphone amplifier
·MEMS microphone board
·I2C bus
·General purpose user interface
·Extension headers
·USB port
·Flash memory
·xSYS connector
·xCORE VocalFusion BaseBoard portmap
·Operating requirements
·Dimensions
·RoHS and REACH
·Schematics
The
xCORE VocalFusion 4-Mic Kit for Amazon AVS
is an application specific
design targeted at far-field voice capture and processing for Amazon Alexa Voice
Service (AVS) applications.
The kit is based on the XMOS XVF3000 voice processor and integrates the xCORE
microphone capture and voice processing library with all the necessary hardware
building blocks including:
·linear array of 4 omni-directional microphones
·low-jitter audio clock
·configurable user input buttons and LEDs
·I2S audio and I2C control connectivity
·optional USB2.0 device audio and control connectivity
Publication Date: 2017/9/7 Document Number: XM011897A
XMOS © 2017, All Rights Reserved

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1 Features
A block diagram for the
xCORE VocalFusion 4-Mic Kit for Amazon AVS
is shown
in Figure 3below. It includes:
·xCORE VocalFusion XVF3000 voice processor
·Four MEMS microphones (on a separate board)
·A micro-USB connector for power (and optionally USB2.0 device connectivity)
·An extension header for I2S audio and I2C control connectivity
·Four general purpose push-button switches (not currently used)
·13 user-controlled LEDs (not currently used)
·Low-jitter audio clock source
·An xSYS connector for an xTAG debug adapter
xCORE
VocalFusion
XVF3000
TILE CLK to xCore
DAC-MCLK
PLL CLK
Device
BUFFERMCLK 25 MHz
DAC
CS43L21
Infineon
IM69D130
HP
USB
Type-B
1v3v3 2v5
XTAG(J2)
MIC2
MIC1
MIC0
MIC3
MIC-DATA[3:0]
MIC-CLK
Buffer
MIC CLK[3:0]
JTAG
LEDs
BUFFER
PUSH BUTTON
D-FF
3.5mm Jack
USB diff pair
Expansion
Header
Separate board with
4 microphones
I2C
I2S
EEPROM
I2C
I2S
Figure 3:
xCORE
VocalFusion
4-Mic Kit for
Amazon AVS
block
diagram
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2 Introduction
The
xCORE VocalFusion 4-Mic Kit for Amazon AVS
(XK-VF3000-L33-AVS) consists
of an xCORE VocalFusion BaseBoard (XP-VF3000-BASE, Figure 1) and a separate
linear microphone array (LINEAR MICROPHONE ARRAY E, Figure 2) using Infineon
IM69D1301MEMS microphones.
The VocalFusion BaseBoard is based on the XMOS XVF3000 device, running a
software which integrates the xCORE microphone capture and voice processing
library to provide: beamforming, acoustic echo cancellation, noise suppression,
de-reverberation and automatic gain control.
The XVF3000 device has 16 32-bit logical processing cores and integrates 2MBytes
Quad Serial Peripheral Interface (QSPI) flash in a TQ128 package.
For general information on the XVF3000 device see the xCORE-200 Architecture
Overview
2
. For device specific information on the XVF3000 device see the XVF3000
Datasheet3.
1http://www.infineon.com/microphones
2http://www.xmos.com/published/xcore-architecture
3http://www.xmos.com/published/xvf3000_3100-tq128-datasheet
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3 Clock sources and distribution
The BaseBoard includes a single clock generator (Si5351A-B04486-GT, U25) that
generates two clocks:
·XVF3000 reference clock - 24MHz oscillator
·
Low jitter master audio clock - 24.576MHz oscillator, used for the DAC and
(indirectly) the microphones
The clock generator is controlled over the I2C bus (see §6, below).
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 4:
Clock and
oscillator
locations
4 Stereo DAC with headphone amplifier
A CS43L21 stereo DAC with integrated headphone amplifier is used to generate
audio output on a 3.5mm audio jack. The CS43L21 is connected to the XVF3000
device through an I2S interface and is configured using the I2C bus (see §6, below).
The CS43L21 stereo DAC/HPA device is connected to the following pins for its I2S
interface:
Pin Port Signal
X1D28 P4F0 DAC_RST_N
X1D36 P1M0 I2S_BCLK
X1D37 P1N0 I2S_LRCK
X1D38 P1O0 MCLK_TILE1
X1D39 P1P0 I2S_DAC_DATA
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USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 5:
DAC and
3.5mm audio
jack locations
5 MEMS microphone board
The microphone board is plugged into connector J3 on the BaseBoard using a
ribbon cable. A short ribbon cable should be used for signal integrity.
The microphones should not be plugged into the xSYS connector.
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 6:
Microphone
connector
location
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The microphone array consists of a linear array of four microphones (spaced
33mm apart), a clock buffer, voltage level shifters and an EEPROM for optional
identification.
The microphone signals are mapped onto the XVF3000 device as shown in Figure 7.
Microphone xCORE GPIO Port
MIC_CLK X0D12 P1E0
MCLK_IN X0D13 P1F0
MIC_0 X0D14 P8B0
MIC_1 X0D15 P8B1
MIC_2 X0D16 P8B2
MIC_3 X0D17 P8B3
Figure 7:
Linear MEMS
microphone
board xCORE
GPIO
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6 I2C bus
The BaseBoard has a main I2C bus that is used to control the DAC, clock generator,
and EEPROM. This main I2C bus is connected to tile 1 of the XVF3000, with the
XVF3000 acting as a master on this I2C bus.
Pin Port Signal
X1D26 P4E0 I2C_SCL
X1D27 P4E1 I2C_SDA
The addresses of devices on the I2C bus are shown below.
Device Address
Si5351A (Clock) 0b1100010 0x62
CS43L21 (DAC) 0b1001010 0x4A
24LC08B (EEPROM on microphone board) 0b1010Xxx 0x5x
Please refer to the 24LC08B datasheet for details on how to set the address of the
EEPROM.
The BaseBoard also has a secondary I2C bus, on which the XVF3000 is a slave -
so allowing the XVF3000 to be controlled by an external I2C host. This slave I2C
interface is wired up to the extension header (see §8, below).
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7 General purpose user interface
The BaseBoard has 13 LEDs that are controlled by the XVF3000 GPIO. LED_0 -
LED_11 (D2-D13) are positioned around the edge of the BaseBoard. LED_12 (D14)
is positioned in the middle of the BaseBoard. The LED GPIO output must be set low
to light the corresponding LED.
Four general purpose push-button switches are provided. When pressed, each
button creates a connection from the I/O to GND. To ensure correct behavior, the
port connected to the buttons (P4A) must always be defined as an input.
LED_1
LED_7
LED_11
LED_5
LED_10
LED_4
LED_9
LED_3
LED_0
LED_6
LED_2
LED_8
LED_12
BUT_A BUT_B BUT_C BUT_D
Figure 8:
General
purpose user
interface
components
The signal mapping of the user interface components is shown in Figure 9and
Figure 10
UI signal xCORE GPIO Port
BUTTON_A X0D02 P4A0
BUTTON_B X0D03 P4A1
BUTTON_C X0D08 P4A2
BUTTON_D X0D09 P4A3
Figure 9:
User interface
GPIO
A green LED (PGOOD) near the USB connector indicates 3V3 and 1V0 supplies are
up.
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UI signal xCORE GPIO Port
LED_0 X0D26 P16B0
LED_1 X0D27 P16B1
LED_2 X0D28 P16B2
LED_3 X0D29 P16B3
LED_4 X0D30 P16B4
LED_5 X0D31 P16B5
LED_6 X0D32 P16B6
LED_7 X0D33 P16B7
LED_8 X0D34 P1K0
LED_9 X0D35 P1L0
LED_10 X0D36 P16B8
LED_11 X0D37 P16B9
LED_12 X0D38 P16B10
Figure 10:
User interface
GPIO
8 Extension headers
The BaseBoard has a two extension headers, J5 and J6, containing: audio MCLK,
all I2S signals, the secondary I2C bus (see §6) and seven general purpose IOs
controlled by the XVF3000.
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 11:
Extension
header
location
The signal mapping of the extension header is shown in Figure 12 and Figure 13.
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These signals allow the XVF3000 to be connected to an external applications
processor host. In the following descriptions:
·input means captured voice audio that is sent from the XVF3000 to the host.
·
output means audio sent from the host to the XVF3000, to be played out from
the DAC.
The software pre-flashed in to the
xCORE VocalFusion 4-Mic Kit for Amazon AVS
configures the XVF3000 device and BaseBoard hardware to use these extension
headers; to enable I2C audio input/output connectivity (XVF3000 is the I2S master)
and I2C control (XVF3000 is an I2C slave).
·XVF3000 as I2S master
Audio input and output connectivity is provided via I2S, via pins 1, 3, 6 of J6 and
pin 4 of J5.
I2S_DAC_DATA is the audio output from the host for the DAC far-end signal.
I2S_ADC_DATA is the audio input to the host from the XVF3000.
MasterClock is generated by the XVF3000 and provided on pin 7 of J6 for
connection to the host.
·XVF3000 as I2C slave
I2C control is provided via pins 9 and 12 on J5.
This is the secondary XVF3000 I2C bus, on which the XVF3000 is a slave (see §6).
Pull-up resistors should be put on I2C_SDA_EXT and I2C_SCL_EXT.
The XVF3000 device and BaseBoard hardware can support other modes of audio
connectivity and control. These modes are documented here for reference only -
their use requires a different XVF3000 software.
·XVF3000 as I2S slave.
Audio input and output connectivity is provided via I2S, via pins 1, 3, 6 of J6 and
pin 4 of J5.
I2S_DAC_DATA is the audio output from the host for the DAC far-end signal.
I2S_ADC_DATA is the audio input to the host from the XVF3000.
A 24.576 MHz MasterClock should be generated externally and connected to
the BaseBoard via pin 15 of J6. To use this mode, remove R67 and insert a 0R
link into R17.
·XVF3000 as USB audio and control device.
Input audio from the XVF3000 and output audio to the DAC is communicated
over USB, and the XVF3000 device is controlled over USB.
In this mode, extension headers should be left unconnected.
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Header pin J5 xCORE GPIO Port Signal
1 X0D22 P1G0
2 GND
3 X0D23 P1H0
4 X1D35 P1L0 I2S_ADC_DATA
5 X0D00 P1A0
6 GND
7 X0D11 P1D0
8 GND
9 X0D24 P1I0 I2C_SDA_EXT
10 X0D39 P1P0
11 GND
12 X0D25 P1J0 I2C_SCL_EXT
13 3V3
14 GND
15 EXT_MCLK
16 GND
Figure 12:
Extension
header GPIO
J5
Header pin J6 xCORE GPIO Port Signal
1 X1D37 P1N0 I2S_LRCK
2 GND
3 X1D39 P1P0 I2S_DAC_DATA
4 NC
5 GND
6 X1D36 P1M0 I2S_BCLK
7 X1D38 P1O0 MCLK_TILE1
8 GND
9 X1D11 P1D0
10 X1D10 P1C0
Figure 13:
Extension
header GPIO
J6
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9 USB port
The USB micro-B port (J1) provides power for all the on-board circuits and is used
to generate the following voltage rails:
·+1V0 (Core voltage to XMOS device)
·+2V5 (for headphone amplifier in DAC device)
·+3V3 for GPIOs and other accessory devices
Voltage tolerance should be as per USB VBUS specification values.
Proper power-on sequence is indicated by power good LED (D1) in bottom side of
the board.
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 14:
USB
components
The data lines from the USB micro-B port (J1) are connected to the XVF3000’s
integrated USB PHY, and so (with a different XVF3000 software) can be used to
provide USB audio and/or control connectivity to the XVF3000 and the BaseBoard.
Note:
·
the software pre-flashed in to the
xCORE VocalFusion 4-Mic Kit for Amazon
AVS does not provide any USB connectivity.
·
J1 must be connected at all times to provide power to the BaseBoard, even
though the USB interface is not used.
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10 Flash memory
The XVF3000 device includes 2MBytes of QSPI flash memory, which is interfaced
by the GPIO connections shown in Figure 15:
QSPI connection Pin Port
QSPI_SS X0D01 P1B
QSP_D0 X0D04 P4B0
QSP_D1 X0D05 P4B1
QSP_D2 X0D06 P4B2
QSP_D3 X0D07 P4B3
SPI_CLK X0D10 P1C
Figure 15:
QSPI Flash
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11 xSYS connector
A standard XMOS xSYS interface (J2) is provided to allow host debug of the board
via JTAG.
USB
Clock
DAC
3.5
mm
jack
25
Microphone array connector
XSYS connector
Extension header, J5
Extension header J6
Figure 16:
XSYS
connector
xSYS signal xCORE GPIO Header pin Description
TMS See note 7 JTAG Test Mode Select
TCK See note 9 JTAG Test Clock
TDI See note 5 JTAG Test Data In - from debug
adapter to xCORE
TDO See note 13 JTAG Test Data Out - from xCORE to
debug adapter
RST_N See note 15 System Reset - active low, resets
xCORE device
GND 4, 8, 12, 16, 20 Ground
XL_UP1 X0D43 6 XMOS link, uplink bit 1
XL_UP0 X0D42 10 XMOS link, uplink bit 0
XL_DN0 X0D40 14 XMOS link, downlink bit 0
XL_DN1 X0D41 18 XMOS link, downlink bit 1
Figure 17:
xSYS
Connector
Pinout
Notes:
·JTAG connections occupy dedicated connections
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12 xCORE VocalFusion BaseBoard portmap
The table below provides a full description of the port-pin mappings described
throughout this document for the xCORE VocalFusion BaseBoard.
Pin 1-bit 4-bit 8-bit 16-bit 32-bit Signal
X0D00 1A0
X0D01 1B0QSPI_CS
X0D02 4A08A016A032A20 BUTTON_A
X0D03 4A18A116A132A21 BUTTON_B
X0D04 4B08A216A232A22 QSPI_D0
X0D05 4B18A316A332A23 QSPI_D1
X0D06 4B28A416A432A24 QSPI_D2
X0D07 4B38A516A532A25 QSPI_D3
X0D08 4A28A616A632A26 BUTTON_C
X0D09 4A38A716A732A27 BUTTON_D
X0D10 1C0QSPI_CLK
X0D11 1D0
X0D12 1E0MIC_CLK
X0D13 1F0MCLK_IN
X0D14 4C08B016A832A28 MIC_0
X0D15 4C18B116A932A29 MIC_1
X0D16 4D08B216A10 MIC_2
X0D17 4D18B316A11 MIC_3
X0D18 4D28B416A12 MIC_4
X0D19 4D38B516A13 MIC_5
X0D20 4C28B616A14 32A30 MIC_6
X0D21 4C38B716A15 32A31 MIC_7
X0D22 1G0
X0D23 1H0
X0D24 1I0
X0D25 1J0
X0D26 4E08C016B0LED_0
X0D27 4E18C116B1LED_1
X0D28 4F08C216B2LED_2
X0D29 4F18C316B3LED_3
X0D30 4F28C416B4LED_4
X0D31 4F38C516B5LED_5
X0D32 4E28C616B6LED_6
X0D33 4E38C716B7LED_7
X0D34 1K0LED_8
X0D35 1L0LED_9
X0D36 1M08D016B8LED_10
X0D37 1N08D116B9LED_11
X0D38 1O08D216B10 LED_12
X0D39 1P08D316B11
X0D40 8D416B12 XL_DN1
X0D41 8D516B13 XL_DN0
X0D42 8D616B14 XL_UP0
X0D43 8D716B15 XL_UP1
Figure 18:
xCORE
VocalFusion
Base Board-
Portmap: Tile
0
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Pin 1-bit 4-bit 8-bit 16-bit 32-bit Signal
X1D00 1A0
X1D01 1B0
X1D02 4A08A016A032A20
X1D03 4A18A116A132A21
X1D04 4B08A216A232A22
X1D05 4B18A316A332A23
X1D06 4B28A416A432A24
X1D07 4B38A516A532A25
X1D08 4A28A616A632A26
X1D09 4A38A716A732A27
X1D10 1C0
X1D11 1D0
X1D14 4C08B016A832A28
X1D15 4C18B116A932A29
X1D16 4D08B216A10
X1D17 4D18B316A11
X1D18 4D28B416A12
X1D19 4D38B516A13
X1D20 4C28B616A14 32A30
X1D21 4C38B716A15 32A31
X1D26 4E08C016B0I2C_SCL
X1D27 4E18C116B1I2C_SDA
X1D28 4F08C216B2DAC_RST_N
X1D29 4F18C316B3
X1D30 4F28C416B4
X1D31 4F38C516B5
X1D32 4E28C616B6
X1D33 4E38C716B7
X1D35 1L0
X1D36 1M08D016B8I2S_BCLK
X1D37 1N08D116B9I2S_LRCK
X1D38 1O08D216B10 MCLK_TILE1
X1D39 1P08D316B11 I2S_DAC_DATA
X1D40 8D416B12
X1D41 8D516B13
X1D42 8D616B14
X1D43 8D716B15
Figure 19:
xCORE
VocalFusion
BaseBoard
Portmap: Tile
1
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13 Operating requirements
A USB 2.0 high-speed compliant cable of less than 3m in length should be used
when operating the
xCORE VocalFusion 4-Mic Kit for Amazon AVS
. XMOS cannot
guarantee correct operation of the base board should any other cable be used.
This product is, like most electronic equipment, sensitive to Electrostatic Discharge
(ESD) events. Users should operate the
xCORE VocalFusion 4-Mic Kit for Amazon
AVS with appropriate ESD precautions in place.
14 Dimensions
The BaseBoard is 90x90mm square with a board thickness of 1.6mm.
15 RoHS and REACH
The
xCORE VocalFusion 4-Mic Kit for Amazon AVS
complies with appropriate
RoHS2 and REACH regulations and is a Pb-free product.
The
xCORE VocalFusion 4-Mic Kit for Amazon AVS
is subject to the European
Union WEEE directive and should not be disposed of in household waste. Alternative
requirements may apply outside of the EU.
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16 Schematics
The schematics for the Base Board included in the kit, are shown in the first five
figures below, followed by the schematics for the linear array board.
For full reference schematics please contact XMOS:
·https://www.xmos.com/contact/enquiries
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Project Name
Build Sheet Name Rev
SheetDate 05/09/2017
1V1
1 5
Top Level.SchDoc
Mic Array Motherboard - Dual Tile
B
of
24M
TDI
TMS
TCK
TDO
RST_N
RST_N
GND
TDI
TMS
TCK
TDO
XSYS_RST_N
XL_UP1
XL_UP0
XL_DN0
XL_DN1
10
8
6
4
2
9
7
5
3
15
13
11 12
14
16
1
17
19
18
20
J2
30320-5002
POR
U_Power
Power.SchDoc
PORST_N
24M
A2
3
VCC 5
GND 2
Y1 6
Y2 4
A1
1
U6
NC7WZ07
3V3
GND
XSYS_RST_N
3V3
RST_N
3V3
FM1
FIDUCIAL
FM3
FIDUCIAL
FM5
FIDUCIAL
GND
USB_D_N
USB_D_P
GND
C8
1N
GND
DP 3
VBUS 1
DM 2
S1
S1
GND 5
S2
S2
ID 4
S3
S3
S4
S4
S5
S5
S6
S6
J1
10118193
USB_D_N
USB_D_P
R15
10K
R16
10K
SYSTEM
CLK
125
RST_N
124
TCK
128
TDI
2
TDO
1
TMS
127
TRST_N
123
U5A
XVF3000-TQ128-C
POWER
USB_VDD 49
USB_VDD33
44 VDD 11
VDD 16
VDD 17
VDD 24
VDD 36
VDD 41
VDD 56
VDD 60
VDD 73
VDD 80
VDD 81
VDD 87
VDD 101
VDD 102
VDD 120
VDD 126
VDDIOL
6
VDDIOL
14
VDDIOL
19
VDDIOL
29
VDDIOL
42
VDDIOR
52
VDDIOR
67
VDDIOR
78
VDDIOR
83
VDDIOR
92
VDDIOT
110
VDDIOT
111
OTP_VCC
105
PLL_AGND 104
PLL_AVDD 103
GND 129
NC
50
NC
65
U5B
XVF3000-TQ128-C
USB_DM
47 USB_DP
46
USB_ID
43
USB_RTUNE
48
USB_VBUS
45
USB
U5E
XVF3000-TQ128-C
3V3 1V0
GND
R13
4R7
C30
100N
GND
1V0
C9
100N
C10
100N
C11
100N
C12
100N
GND
3V3
C20
100N
C21
100N
C22
100N
C23
100N
GND
1V0
C24
100N
C13
100N
C25
100N
C26
100N
C27
100N
C28
100N
C29
100N
C14
100N
C15
100N
C16
100N
C17
100N
C18
100N
C19
100N
XL_UP0
XL_UP1
XL_DN0
XL_DN1
MCLK
EXT_MCLK
I2C_SDA
I2C_SCL
X1D35
U_Tile 0
Tile 0.SchDoc
XL_UP1
XL_UP0
XL_DN0
XL_DN1
MCLK
EXT_MCLK
I2C_SDA
I2C_SCL
PORST_N
24M
X1D35
U_Tile 1
Tile 1.SchDoc
FM2
FIDUCIAL
FM4
FIDUCIAL
FM6
FIDUCIAL
VCC 1
NC
2
IO1
3
GND 4
IO2 5
D15
TPD2E001
VBUS
GND
USB_D_N
USB_D_P
USB_D_N ON PIN 2 FOR FLOW THROUGH LAYOUT
USB_D_N
C71
100N
VBUS 5V
2A
FB2
120R C72
100N
GNDGND
C69
100N
C70
100N
C68
100N
R12 43R2
C74
100N
C75
100N
C76
100N
C77
100N
GND
3V3
PORST_N
GND
3V3
C34
100N
C35
100N
C36
100N
C37
100N
X1D35
PROD1
LABEL-XLAB-0001
Figure 20:
xCORE
VocalFusion
BaseBoard -
XVF3000
configuration
XM011897A
Table of contents
Other XMOS Motherboard manuals