Yamaha QY100 Data Filer User manual

QY100
1
SERVICE MANUAL
SY 011558
20001220-59000 1.494K-408 K Printed in Japan 2000.12
HAMAMATSU, JAPAN
This document is printed on chlorine free (ECF) paper with soy ink.
SPECIFICATIONS ................................................ 3/5
PANEL LAYOUT .................................... 7
BLOCK DIAGRAM ............................ 9
CIRCUIT BOARD LAYOUT ............... 10
DISASSEMBLY PROCEDURE ............................ 11
LSI PIN DESCRIPTION .............................. 13
IC BLOCK DIAGRAM ................................. 15
CIRCUIT BOARDS ........................................ 18
TEST PROGRAM ............................ 21/30
ERROR MESSAGES ....................... 39/42
MIDI DATA FORMAT ............................................................ 45
MIDI IMPLEMENTATION CHART......................................... 70
PARTS LIST
OVERALL CIRCUIT DIAGRAM
CONTENTS

QY100
22
2
IMPOR TANT NOTICE
This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed
that basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and under-
stood by the users, and have therefore not been restated.
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in per-
sonal injury, destruction of expensive components and failure of the product to perform as specified. For
these reasons, we advise all Yamaha product owners that all service required should be performed by an
authorized Yamaha Retailer or the appointed service representative.
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certifi-
cation, recognition of any applicable technical capabilities, or establish a principal-agent relationship of
any form.
The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and
service departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable
and changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to
exist, please contact the distributor’s Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have
accumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to
this bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power
to the unit.
WARNING: CHEMICAL CONTENT NOTICE!
The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (Where
applicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possibly
other entities) to cause cancer and/or birth defects or other reproductive harm.
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT
SO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose
eyes to solder/flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling
food.
WARNING
Components having special characteristics are marked and must be replaced with parts having specification equal to those
originally installed.
LITHIUM BA TTERY HANDLING
This product uses a lithium battery for memory back-up.
WARNING : Lithium batteries are dangerous because they can be exploded by improper handling. Observe the following pre-
cautions when handling or replacing lithium batteries.
Leave lithium battery replacement to qualified service personnel.
Always replace with batteries of the same type.
When installing on the PC board by soldering, solder using the connection terminals provided on the battery cells.
Never solder directly to the cells. Perform the soldering as quickly as possible.
Never reverse the battery polarities when installing.
Do not short the batteries.
Do not attempt to recharge these batteries.
Do not disasemble the batteries.
Never heat batteries or throw them into fire.
ADVARSEL!
Lithiumbatteri-Eksplosionsfare ved fejlagtig handtering. Udskiftning ma kun ske med batteri af samme fabrikat og type. lever det brugte
batteri tilbage til leverandren.
VARNING
Explosionsfara vid felaktigt batteribyte.
Anvand samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren.
Kassera anvant batteri enligt fabrikantens instruktion.
VAROITUS
Paristo voi rajahtaa, jos se on virheellisesti asennettu.
Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiiin.
Havita kaytetty paristo valmistajan ohjeiden mukaisesti.
The following information complies with Dutch official Gazette 1995. 45; ESSENTIALS OF ORDER ON THE COLLECTION OF BATTERIES.
• Please refer to the diassembly procedure for the removal of Back-up Battery.
• Leest u voor het verwijderen van de backup batterij deze beschrijving.

QY100
3
SPECIFICATIONS
Sequencer block
Data capacity approximately 32,000 notes
Note resolution 480 clocks per quarter note
Polyphony 64 notes
Tempo 25-300
Modes SONG mode (SONG, SONG VOICE, SONG EFFECT)
PATTERN mode
(PATTERN, PATTERN VOICE, PATTERN EFFECT)
Record modes Realtime replace, Realtime overdub, Step, Multi
Tracks Song: 16 sequencer tracks, pattern track(Pt),
chord track(Cd), tempo track(Tm)
Pattern: 8 pattern phrase tracks
Songs 20 songs + 3 demo songs
Patterns 768 preset patterns (128 preset styles x 6 sections)
384 user patterns (64 user styles x 6 sections)
Sections: Intro, Main A, Main B, Fill AB, Fill BA, Ending
Phrases 4,285 preset phrases
48 user phrases per user style
Chord types 26 types (including “non-ABC” type)
Chord templates 99 preset chord templates
1 user chord progression per song
Play effect Swing, Drum table remapping
Foot switch functions Start/Stop, Section change
Tone generator block
Type AWM2 tone generator
Maximum Polyphony 32 notes
Multi-timbral capability 24 timbers (last note priority with element reserve, DVA)
Preset voices 547 normal voices, 22 drum voices
Effects 3 blocks (Reverb, Chorus, Variation)
Reverb: 11 types
Chorus: 11 types
Variation 43: types
Amp Simulator
Setups 23 setups (18 Guitar Setups and 5 Microphone Setups)
Blocks Preamp Block (for Guitar) or Delay Block (for microphone)
Chorus Block
Reverb Block
Foot switch functions Block On/Off
Memory Card
Save ALL/SONG/STYLE/SMF(Format 0)/SMF+XG(Format 0)
Load ALL/SONG/STYLE/SMF(Format 0)/SMF+XG(Format 0)

QY100
4
Controllers & display
Micro keyboard 25 keys (2 octaves)
Octave buttons [OCT DOWN], [OCT UP]
Cursor buttons up, down, left, right
Sequencer buttons [ ], [ ], [ ], [ ], [ ], [ ]
[AMP SIMULATOR], [PARAMETER], [SONG], [PATTERN], [SHIFT], [EXIT], [CARD],
[MENU], [-1(NO)], [+1(YES)], [ENTER], Function buttons
Volume control
Contrast control
Gain control
HOST SELECT switch
Display 128 x 64 dots graphic LCD
Connectors
LINE OUT/PHONES stereo mini jack x 1
GUITAR/MIC INPUT standard monaural jack x1
MIDI IN x1, OUT x1
TO HOST
FOOT SW standard jack x 1
CARD slot 3.3 V SmartMedia memory cards
DC IN for PA-3B
Power supply
Optional PA-3B AC adapter
Out put level
See TEST PROGRAM page 27 and page 28
Six 1.5v AA size (LR6) or equivalent alkaline batteries
Power Reguirement
Dimensions
(W x D x H) 238 x 118 x 48 mm (9-3/8" x 4-5/8" x 1-7/8")
Weight
750g (1 lbs., 10 oz) without batteries
Included items
QY100 Data Filer for Win95/98/NT/2000/Me, Mac (Mac OS 7.5 or later)
CD-ROM x 1
Audio cable miniature stereo phone plug to dual RCA pin plugs
Owner’s manual set QY100 owner’s manual, Data List, QY100 Data Filer
Installation Guide
Rubber feet
* Specifications and descriptions in this owner’s manual are for information purposes only.
Yamaha Corp. reserves the right to change or modify products or specifications at any time
without prior notice. Since specifications, equipment or options may not be the same in
every locale, please check with your Yamaha dealer.
5.6W (AC100V)
Load resistance:33ohm
Volume at max.
Pattern reproduced

QY100
5

QY100
6

QY100
7
PANEL LAYOUT
Front Panel
Left Side Panel
Rear Panel
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
POWER Switch
LCD Display & CONTRAST Control
[SONG] Button
[PATTERN] Button
[SHIFT] Button
[EXIT] Button
Cursor Buttons
[-1/NO] and [+1/YES] Buttons
[MENU] and Function Buttons
[ENTER] Button
Sequencer Buttons
Micro Keyboard
Octave Buttons
VOLUME Control
GAIN Control & PEAK Indicator
[CARD] Button
[AMP SIMULATOR] Button & Indicator
[PARAMETER] Button

QY100
8
Right Side Panel
Rear Panel
1
2
3
4
5
6
7
DC IN Jack
MIDI IN & OUT Connectors
LINE OUT/PHONES Jack
TO HOST Connector & HOST SELECT Switch
FOOT SW Jack
GUITAR/MIC INPUT Jack
CARD Slot

QY100
9
BLOCK DIAGRAM
x8
x8
Battery monitor
P.bat monitor
Res
Bat
Res
Res
SMART
MEDIA
Port x3
Smart Media
I/F SW I/F LED I/F
LCDC
CONTRAST
(CN1-7,8)
(CN1-1~5)
(CN2-21)
(CN1-2)
(CN2-3~20)
(CN2-4~10,11~19)
(CN2-5~11,
12~19)
(CN1-4~19)
IC24
IC9IC8
IC6IC5
IC1
IC7
IC27 IC25
IC2
IC10
IC3
IC4
13,14,16
15
11
1
1
3
3
11
5
1
IC29
IC28 IC31
IC30
7
5
5
IC30
IC32
IC33
158
163
164
13
15
16
IC22 15
IC23 51,3
IC20 14
DC-DC converter
+5V →-10V
4.915MHz
CARD LCD UNIT
128 X 64dots
SRAM
256K/80ns
1MHz clock out
TxD0, RxD0
TxD1
RxD1
ready/busy
monitor
x16
S-bus
x16
x16 x16
Res
DAC
18bit VOLUME
+VA
P.bat monitor
Muting
DC IN
LINE OUT/
PHONES
GUITAR/MIC
INPUT
input
monitor
peak
LED
peak
indicate
GAIN
1.5Vx6
AMP
AMP
AMP
+10A(+9A)
Z-diode
+5D
SW-Regulator
+3.3D
regulator
+5D
+3.3D
ADC
20bit
BCLK,LRCK,Data
DRAM
4M/70ns
DSP
FlashROM
16M/110ns
main prog
FlashROM/
MaskROM
8M/110ns
style
FlashROM/
MaskROM
64M/110ns
TG_prog 8M
wave 56M
SRAM
1M/55ns
TG_work
DSP
OSCLK(192fs)
MELO SYW sub CPU
SWX00B
dual mode
x16
x16 x16
x8 Res Res
C-bus
ready/busy
monitor
x8 x8 x8 x3
x5
x8
CPU I/F
main
→
sub
x1
SYSCLK(384fs),QCLK,ADLR
ADIN(20bit)
sub → main x2
x2
FOOT SW
driver
Port
input
monitor
receiver
transceiver
Port x7(SW7x8)
* Memory access speed
→Requirements speed
Res
Host-sel monitor
8.4672MHz
main CPU
SWX00B
Separate mode SRAM
1M/110ns
main work
SRAM
1M/110ns
user data
S-bus
C-bus
x16 x16
DM PN
Battery backup
x52
x3 x1
PEAK
HOST SELECT
TO HOST
MIDI IN
MIDI OUT
28CA1-8817682

QY100
10
CIRCUIT BOARD LAYOUT
LCD Ass'y DM
PN
WIRING
LCD unit
CN1
CN1
CN1CN2
CN4
JK7
to Battery
DC IN
DM
PN
28CA2-8817683

QY100
11
DISASSEMBLY PROCEDURE
Fig.1
1. Bottom Cover
1-1. Remove the four (4) screws marked [80] and one
(1) screw marked [70].The Bottom cover can then
be removed. (Fig. 1)
[80] [70] [80]
[80] [80]
Fig.2
[70]: Bind Head Screw 2.6 X 8 MFZN2Y (EG320030)
[80]: Bind Head Tapping Screw-P 2.6 X 8 MFZN2BL (EP620120)
[150] [150]
[60] [60] [60]
Battery holder
Shield
Shield
Lithium Battery
DM
[60]:Bind Head Tapping Screw-P 2.6 X 6 MFZN2Y (EP320170)
[150]:Bind Head Tapping Screw-P 2.6 X 6 MFZN2Y (EP320170)
2. DM Circuit Board
2-1. Remove the bottom cover. (See Procedure1.)
2-2. Remove the two (2) screws marked [150].The DM
circuit board can then be removed. (Fig.2)
• Notice for back-up battery removal
Push the battery as shows in figure,
then the battery will pop up.
•Druk de batterij naar beneden zoals
aangeven in de tekening, de batterij
springt dan naar voren.

QY100
12
3. PN Circuit Board
3-1. Remove the bottom cover. (See Procedure1.)
2-2. Remove the DM circuit board. (See Procedure2.)
3-3. Remove the nine (9) screws marked [T80] and then
remove the shield bracket.(Fig. 3)
3-4. Remove the six (6) screws marked [T60].The PN
circuit board can then be removed. (Fig. 4)
[T80]
[T80]
[T80]
[T80][T80]
Shield plate
4. LCD Assembly
4-1. Remove the bottom cover. (See Procedure1.)
4-2. Remove the DM circuit board. (See Procedure2.)
4-3. Remove the PN circuit board. (See Procedure3.)
4-4. Remove the one (1) screw marked [T30].The LCD
assembly can then be removed.(Fig. 4)
5. Battery Holder
5-1. Remove the bottom cover. (See Procedure1.)
5-2. Remove the five (5) screws marked [60].The battery
holder can then be removed. (Fig. 2)
LCD Ass'y
[T60]
[T60]
[T60]
[T30]
PN
Fig.4
[T30]:Bind Head Tapping Screw-P 2.6 X 6 MFZN2Y (EP320170)
Fig.3
[T60]: Bind Head Tapping Screw-P 2.6 X 6 MFZN2Y (EP320170)
[T80]: Bind Head Tapping Screw-P 2.6 X 6 MFZN2Y (EP320170)

QY100
13
LSI PIN DESCRIPTION
HG73C205AFD (XU947C00) SWX00B TONE GENERATOR
PIN
NO. NAME I/O FUNCTION PIN NO. NAME I/O FUNCTION
1 ICN I Initial clear 85 CMA3 O Program address bus
2 RFCLKI I PLL Clock 86 CMA8 O Program address bus
3 TM2 I PLL Control 87 CMA2 O Program address bus
4 AVDD_PLL Power supply 88 CRD O read signal
5 AVSS_PLL Ground 89 CMA1 O Program address bus
6 MODE0 I SWX dual mode 90 CUB O high byte effective signal
7 VCC7 Power supply 91 VCC91 Power supply
8 GND8 Ground 92 GHND92 Ground
9 XIN I crystal oscillator 93 CS1 O CS signal
10 XOUT O crystal oscillator 94 CMA0 O Program address bus
11 MODE1 I SWX separate mode 95 CLB O low byte effective signal
12 TEST0 I TEST pin 96 CMA12 O Program address bus
13 TESTON I TEST pin 97 CMA11 O Program address bus
14 AN0-P40 I A/D converter 98 CMA10 O Program address bus
15 AN1-P41 I A/D converter 99 CMA9 O Program address bus
16 AN2-P42 I A/D converter 100 GND100 Ground
17 AN3-P43 I A/D converter 101 CWE O write signal
18 AVDD_AN Power supply 102 CMA16 O Program address bus
19 AVSS_AN Ground 103 CMA15 O Program address bus
20 TXD0 O for MIDI or TO-HOST 104 CMA14 O Program address bus
21 TXD1 O for MIDI 105 CMA13 O Program address bus
22 EXCLK I Crystal oscillator 106 CMD8 I/O Program memory Data bus
23 SMD11 I/O Wave memory data bus 107 CMD7 I/O Program memory Data bus
24 SMD4 I/O Wave memory data bus 108 CMD9 I/O Program memory Data bus
25 SMD3 I/O Wave memory data bus 109 CMD6 I/O Program memory Data bus
26 SMD12 I/O Wave memory data bus 110 CMD10 I/O Program memory Data bus
27 SMD10 I/O Wave memory data bus 111 CMD5 I/O Program memory Data bus
28 SMD5 I/O Wave memory data bus 112 CMD11 I/O Program memory Data bus
29 SMD2 I/O Wave memory data bus 113 CMD4 I/O Program memory Data bus
30 SMD13 I/O Wave memory data bus 114 CMD12 I/O Program memory Data bus
31 SMD9 I/O Wave memory data bus 115 CMD3 I/O Program memory Data bus
32 SMD6 I/O Wave memory data bus 116 CMD13 I/O Program memory Data bus
33 SMD1 I/O Wave memory data bus 117 CMD2 I/O Program memory Data bus
34 SMD14 I/O Wave memory data bus 118 CMD14 I/O Program memory Data bus
35 VCC35 Power supply 119 VCC119 Power supply
36 GND36 Ground 120 GND115 Ground
37 SMD8 I/O Wave memory data bus 121 CMD1 I/O Program memory Data bus
38 SMD7 I/O Wave memory data bus 122 CMD15 I/O Program memory Data bus
39 SMD0 I/O Wave memory data bus 123 CMD0 I/O Program memory Data bus
40 SMD15 I/O Wave memory data bus 124 CMA21 O Program address bus
41 SOE O read signal 125 PDT15 I/O SWX access data bus
42 SWE O write signal 126 PDT14 I/O SWX access data bus
43 SRAS O RAS signal 127 PDT13 I/O SWX access data bus
44 SCAS O CAS signal 128 PDT12 I/O SWX access data bus
45 REFRESH O REFRESH signal 129 PDT11 I/O SWX access data bus
46 CS0 O CS signal 130 PDT10 I/O SWX access data bus
47 SMA0 O Memory address bus 131 PDT9 I/O SWX access data bus
48 SMA16 O Memory address bus 132 PDT8 I/O SWX access data bus
49 VCC49 Power supply 133 VCC133 Power supply
50 GND50 Ground 134 GND134 Ground
51 SMA1 O Memory address bus 135 PDT7 I/O SWX access data bus
52 SMA15 O Memory address bus 136 PDT6 I/O SWX access data bus
53 SMA2 O Memory address bus 137 PDT5 I/O SWX access data bus
54 SMA14 O Memory address bus 138 PDT4 I/O SWX access data bus
55 SMA3 O Memory address bus 139 PDT3 I/O SWX access data bus
56 SMA13 O Memory address bus 140 PDT2 I/O SWX access data bus
57 SMA4 O Memory address bus 141 PDT1 I/O SWX access data bus
58 SMA12 O Memory address bus 142 PDT0 I/O SWX access data bus
59 SMA5 O Memory address bus 143 VCA143 Power supply
60 GND60 Ground 144 GND144 Ground
61 VCC61 Power supply 145 PAD2 I SWX access address bus
62 SMA11 O Memory address bus 146 PAD1 I SWX access address bus
63 SMA6 O Memory address bus 147 PAD0 I SWX access address bus
64 SMA10 O Memory address bus 148 VCC148 Power supply
65 SMA7 O Memory address bus 149 GND149 Ground
66 SMA9 O Memory address bus 150 PCS I Chip select
67 SMA17 O Memory address bus 151 PWR I write enable
68 SMA8 O Memory address bus 152 PRD I read enable
69 SMA18 O Memory address bus 153 RXD0 I for Midi or TO-HOST
70 SMA19 O Memory address bus 154 RXD1 I for Midi or Key scan
71 SMA20 O Memory address bus 155 SCLKI I EXT Clock
72 SMA21 O Memory address bus 156 ADIN I A/D converter
73 SMA22 O Memory address bus 157 ADLR O A/D converter LR clock
74 SMA23 O Memory address bus 158 DO0 O DAC
75 CMA20 O Program address bus 159 DO1 O DAC
76 CMA19 O Program address bus 160 SYSCLK O 1/2 clock
77 VCC77 Power supply 161 VCC161 Power supply
78 GND78 O Ground 162 GND162 Ground
79 CMA18 O Program address bus 163 WCLK O for DAC LR clock
80 CMA17 O Program address bus 164 QCLK O 1/12 clock
81 CMA5 O Program address bus 165 BCLK O IIS-DAC clock
82 CMA6 O Program address bus 166 SYI I Synch signal
83 CMA4 O Program address bus 167 IRQ0 I Interrupt request
84 CMA7 O Program address bus 168 NMI I Interrupt request
DM: IC1, IC2

QY100
14
PIN
No. NAME I/O FUNCTION
PIN
No. NAME I/O FUNCTION
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
ad1
ad2
ad3
ad4
ad5
ad6
ad7
ad8
ad9
ad10
ad11
ad12
ad13
ad14
ad15
/ce0 (LOD)
/ce1 (LSCP)
HOD
ED
HSCP
/DUAL
LP
CDATA
FR
CH1
CH2
DSPON
VDD
/SDSEL
VSS
/T2
/T1
XI
XO
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
O
O
O
O
O
O
-
I
-
I
I
I
O
T6963C (XL166A00) CPU (LCD Controller)
"H" : Normal
"L" : Clock oscillation stopped (Home
address and data of area digit number are
preserved.)
"H" : Normal (with built-in pull-up resistor)
"L" : T6963C initialized (Home address and
data of area digit number are preserved.)
Data input terminal with CPU I/F (D7 is MSB)
Write signal terminal. Data written into
T6963 when at "L".
Read signal terminal. Data read from
T6963C when at "L".
Chip enable terminal of T6963C. Set to "L" when
transmitting and receiving data with CPU I/F.
/WR = "L" : C/D = "H" : Command WRITE
C/D = "L" : Data WRITE
/RD = "L" : C/D = "H" : Status READ
C/D = "L" : Data READ
Data input/output terminal to/from display
memory ("H" -> ON data, "L" -> OFF data)
Power supply +5.0V
Data input/output terminal to/from display
memory ("H" -> ON data, "L" -> OFF data)
Read/write signal output terminal to display
memory ("H" -> Read, "L" -> Write)
Display memory chip enable terminal (All
address area)
Address output terminal to display memory
(ad15 = "L" -> Top face, ad15 = "H" ->
Bottom face)
When driving secondary face of LCD2
(DUAL = "L") : Top face and bottom face
switched at ad15.
/ce0 when /DUAL = "H" Display memory chip
enable terminal for addresses 0000 ~ 07FFH.
LSCP when /DUAL = "L" Serial data output terminal
for odd number segments of bottom face LCD.
/ce1 when /DUAL = "H" Display memory chip
enable terminal for addresses 0800 ~ 0FFFH.
LSCP when /DUAL = "L" Shift clock pulse
output terminal for X driver of bottom face LCD.
Serial data output terminal for odd number
segment of top face LCD
Serial data output terminal for even number
segment of top/bottom face LCD when
/SDSEL = "H".
Serial data output terminal for segments of
top/bottom face LCD when /SDSEL = "L".
Shift lock pulse for X driver of top face LCD
Latch pulse for X driver / Shift lock pulse for
Y driver
Synchronous signal for Y driver
Frame signal terminal
Output terminal for checking (Don't care)
Control terminal of external DC/DC. DSPON
= "L" when /HALT, /RESET become
"L". (X driver is cleared when "L" -> "H".)
Power supply +5.0V
Power supply 0V
Test input terminal. Should be normally
kept open.
Crystal oscillator terminal
Crystal oscillator terminal
DM: IC8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
/HALT
/RESET
MDS
MD0
MD1
MD2
MD3
FS0
FS1
D0
D1
D2
D3
D4
D5
D6
D7
/WR
/RD
/CE
C/D
d0
d1
d2
d3
d4
VDD
d5
d6
d7
r/w
/ce
ad0
I
I
I
I
I
I
I
I
I
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I
I
I
I
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
-
I/O/Z
I/O/Z
I/O/Z
O
O
O
/DUAL
MDS
MD1
MD0
Number of digits
Vertical dot number
H
L
H
H
2
16
H
L
H
L
4
32
H
L
L
H
6
48
H
L
L
L
8
64
H
H
H
H
10
80
H
H
H
L
12
96
H
H
L
H
14
112
H
H
L
L
16
128
L
L
H
H
4
32
L
L
H
L
8
64
L
L
L
H
12
96
L
L
L
L
16
128
L
H
H
H
20
160
L
H
H
L
24
192
L
H
L
H
28
224
L
H
L
L
32
256
Terminal to specify number of digits on display
Primary face CD drive Secondary face LCD drive
Terminal to specify number
of digits on display
MD2
MD3
Number of digits
H
H
32
L
H
40
H
L
64
L
L
80
FS0
FS1
Font
H
H
5X8
L
H
6X8
H
L
7X8
L
L
8X8
Terminal to specify
character font
/DUAL
/SDSEL H HL HH LL L
"H" : Primary face LCD drive
"L" :
Secondary face LCD drive
"H" : Odd number / even number segment separated
"L" : Normally serial input
H0D, ED
-H0D, ED L0D, ED
ED
-ED -
Top face LCD data
Bottom face LCD data

QY100
15
PD63200GS-E1 (XP867A00) DAC (Digital to Analog Converter)
PIN
No. NAME I/O FUNCTION
PIN
No. NAME I/O FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
4/8F
D. GND
16 BIT
D. VDD
A. GND
R. OUT
A. VDD
A. VDD
R. REF
L. REF
L. OUT
A. GND
WDCK
RSI
SI/LSI
CLK
I
I
O
O
I
I
I
I
µ
4/8 Fs selection
Digital ground
16 bit/18 bit selection
Digital power supply
Analog ground
Channel R output
Analog power supply
Channel R voltage reference
Channel L voltage reference
Channel L output
Analog ground
Word clock
Channel R series input
Series input/Channel L series input
Clock
PIN
No. NAME I/O FUNCTION
PIN
No. NAME I/O FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VINL
VREF1
REFCOM
VREF2
VINR
RSTB
BYPAS
FMT0
FMT1
MODE0
MODE1
FSYNC
LRCK
BCK
DOUT
SYSCK
DGND
VDD
CINNR
CINPR
CINNL
CINPL
VCC
AGND
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I
PCM1800 (XU770A00) A/D Converter
Analog input (L ch.)
Reference 1 decoupling cap.
Reference decoupling common
Reference 2 decoupling cap.
Analog input (R CH.)
Reset input active ìLî
LCF bypass control
Audio data format 0
Audio data format 1
Master/Slave mode selection 0
Master/Slave mode selection 1
Frame sync. input/output
Sampling clocl input/output
Bit clock input/output
Audio data output
System clock input
Digital ground
Power supply +5V
Anti-aliasing filter cap. (-) R ch.
Anti-aliasing filter cap. (+) R ch.
Anti-aliasing filter cap. (-) L ch.
Anti-aliasing filter cap. (+) L ch.
Analog power supply
Analog ground

QY100
16
IC BLOCK DIAGRAM
HD29051FP(XV708A00)
DM: IC22
Line Transceiver
TC74HC374FPEL(XL342A00)
DM: IC10
Octal 3-Stage D-FF
TC74LV164AFPEL(IS016400)
DM: IC44
Shift Resister
M5291FP-600C(XR858A00)
DM: IC24
DC-DC Converter
SC7SU04FEL(XI348A00)
TC7SH04FU(XS775A00)
DM: IC35, 37
Inverter
Q
DCK
OE
Q
DCK
OE
Q
DCK
OE
Q
DCK
OE
OUTPUT
CONTROL
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
Vcc
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLOCK
Q
DCK
OE
Q
DCK
OE
Q
DCK
OE
Q
DCK
OE
1
2
3
A
QA QA
4QB QB
5QC QC
6QD QD
7GND
BB
14
13
12
VCC
QGQG
11 QFQF
10 QEQE
9 CLEARCLEAR
8 CLOCK
QH
CK
QH
OUTPUTS
OUTPUTS
SIRIAL
INPUT A
A
3
Capacitor 6Power supply
5Input
Ground 4
2
1
Switch-Collector
Switch-Emitter
S
R
Q
+
Driver
8
7Peak current detect
Generator
Comparator
1.17V
reference
voltage
1
2
3
4
5
6
7
1B
1A
1R
1DE
2R
2A
2B
16
15
14
13
12
11
V
CC
1D
1Y
1Z
2DE
2Z
2Y
8
GND 9
10
2D
1
2
3
5
4
NC
VSS
VDD
OUT
IN
TC7W14FU(XN883A00)
TC7WH14FU(XY806A00)
DM: IC34, 43, 52
Inverter
TC74HC245AF(XS720A00)
TC74VHC245AF(XV242A00)
DM: IC11, 18
Buffer
1D1R
2
3
4
5
6
7
8
9
10
A1
A2
A3
A4
A5
A6
A7
A8
GND 11
12
13
14
15
16
17
18
19
20 V
CC
G
B1
B2
B3
B4
B5
B6
B7
B8
TC74HCT04AF-T1(XI297A00)
TC74VHCT04AF (XI297A00)
DM: IC16, 17, 20
Inverter
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
Vss
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y

QY100
17
TC74VHC244F(XT800A00)
TC74VHCT244AF-EL(XU230A00)
DM: IC12, 41
Buffer
TC74VHC273F(EL)(XY254A00)
DM: IC13, 19
Octal D-FF
TC7W74FU(XN243A00)
DM: IC39
D-FF
TC74VHC32F(EL)(XY537A00)
TC74VHCT32AFT-EL(XZ372A00)
DM: IC14, 15, 36, 40, 45
OR
TC7WH32FU(XY36A00)
DM: IC14, 15, 36, 40, 45
OR
M5216FP-600C(XP263A00)
DM: IC30
Operating Amplifier
UPC4570G2(XF291A00)
DM: IC31, 51
Operating Amplifier
NJM4556AMT1(XQ137A00)
DM: IC30
Operating Amplifier
1
2
3
4
5
6
7
813
14
15
16
17
18
19
20
9
10 11
12
VD(Vcc)
2G
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1(GND)Vss
2Y1
1A4
2Y2
1A3
2Y3
1A2
2Y4
1A1
1G
1CLEAR
2
3
4
5
6
7
8
9
10
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND 11
12
13
14
15
16
17
18
19
20 V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLOCK
QQ
DD
CK CK
CL CL
QQ
DDCK CK
CL CL
QQ
DD
CK CK
CL CL
QQ
DD CK CK
CL CL
1
2
3
4
8
7
6
5
CK
Q
GND
V
CC
PR
CLR
Q
D
_
__
___
1
2
3
4-V
+V 8
7
6
5
Output A
Non-Inverting
Input A
-DC Voltage Supply
+DC Voltage
Supply
Output B
Inverting
Input B
Non-Inverting
Input B
Inverting
Input A
+-
+-
1
2
3
4
8
7
6
5
Output A
Non-Inverting
Input A
Ground
+DC Voltage
Supply
Output B
Inverting
Input B
Non-Inverting
Input B
Inverting
Input A
+-
+-
1
2IN
1
3 + IN 1
4
8
7
6
5
IN
2
+ IN 2
OUT 1
V CC
+ V CC
OUT 2
+
+
Vcc
OUT
1
2
35
4
IN A
IN B
Vss
11A
2
3
4
5
6
7
1B
1Y
2A
2B
2Y
GND 8
9
10
11
12
13
14 V
CC
4B
4A
4Y
3B
3A
3Y

QY100
18
CIRCUIT BOARDS
CN2: to PN-CN1
CN1: to LCD unit
LINE OUT/
PHONES
DC IN
GAIN
INPUT
CONTRAST
FOOT SW
IN
OUT
TO HOST
MAC
MIDI
HOST SELECT
PC-2 PC-1
MIDI
GUITAR/
MIC
to Battery
VOLUME
3.3V CARD
ON STANDBY MINMAX
DM Circuit Board
Component side

19
QY100
Pattern side

QY100
20
to DM-CN2
Component side
AMP
SIMULATOR
PARAMETER
SONG
PATTERN
SHIFT
BASS 1
F#
G
OCT
DOWN OCT UP
+/-
Eadd9 Madd9 mm7(9) m7 mM7 m6
M7(9)
M7 aug 67(9) 7
F
INTRO MAIN
AMAIN BFILL AB FILL BA
ENDING BLANK SECTION
GABCD
EXIT
CARD
MENU -1
NO +1 YES
ENTER
2
G#
A
3
A#
B
4
C#
D
5
D#
E
6
7(#9)
7( 9)
m7(11)
m7( 5)
8
7(#11)
7(#5)
9
7SUS4
SUS4
0
---
dim
7
7( 13)
7(13)
PN Circuit Board
Pattern side