Aac microtec Sirius obc User manual

Document number

205065

Version

Rev E

Issue date

2017-03-07

Sirius OBC and TCM User Manual

www.aacmicrotec.com

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Sirius OBC and TCM User Manual

Rev E

ÅAC Microtec AB owns the copyright of this document which is supplied in confidence and which shall

not be used for any purpose other than for which it is supplied and shall not in whole or in part be

reproduced, copied, or communicated to any person without written permission from the owner.

Document number

205065

Version

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Issue date

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Sirius OBC and TCM User Manual

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REVISION LOG

Rev

Date

Change description

2016-10-25

First release, drafted from 204911 Sirius Breadboard User Manual

Rev L

2016-12-15

Updated after editorial updates

2017-01-03

Release with updates to the following sections:

Massmem (new API with DMA)

Error manager (IOCTL API)

ADC (channel table update, channel limitation)

Sirius TCM (TM/TC defaults, API updates {errno, MMStatus,

TMTSStatus, }, removed limitations)

Bootrom (extended description)

SCET (extended description, new API)

UART32 (removed)

CCSDS (interrupt API deprecation)

NVRAM (EDAC/non-EDAC modes described)

2017-02-01

Release with updates to the following sections:

Sirius TCM (Extra info sections, TMBRSet->TMBRControl)

Mass memory (IOCTL API, error inject info)

SCET (Clarify threshold)

2017-03-01

Release with updates to the following sections:

ADC (minor updates to clock div limits)

Setup and operation (find debugger serial, use of multiple

debuggers)

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TABLE OF CONTENT

1. INTRODUCTION............................................................................................................... 6

1.1. Applicable releases........................................................................................................................................ 6

1.2. Intended users................................................................................................................................................ 6

1.3. Getting support............................................................................................................................................... 6

1.4. Reference documents .................................................................................................................................... 7

2. EQUIPMENT INFORMATION........................................................................................... 8

2.1. System Overview with peripherals ............................................................................................................... 8

3. SETUP AND OPERATION...............................................................................................10

3.1. User prerequisites........................................................................................................................................ 10

3.2. Connecting cables to the Sirius products.................................................................................................. 11

3.3. Installation of toolchain ............................................................................................................................... 12

3.3.1. Supported Operating Systems................................................................................................................. 12

3.3.2. Installation Steps...................................................................................................................................... 12

3.4. Installing the Board Support Package (BSP) ............................................................................................. 13

3.5. Deploying a Sirius application .................................................................................................................... 13

3.5.1. Establish a debugger connection to the Sirius products........................................................................... 13

3.5.2. Setup a serial terminal to the device debug UART................................................................................... 14

3.5.3. Loading an application............................................................................................................................. 15

3.5.4. Using multiple debuggers on the same PC.............................................................................................. 15

3.6. Programming an application (boot image) to system flash...................................................................... 16

4. SOFTWARE DEVELOPMENT.........................................................................................18

4.1. RTEMS step-by-step compilation................................................................................................................ 18

4.2. Software disclaimer of warranty ................................................................................................................. 18

5. RTEMS.............................................................................................................................19

5.1. Introduction .................................................................................................................................................. 19

5.2. Watchdog...................................................................................................................................................... 20

5.2.1. Description............................................................................................................................................... 20

5.2.2. RTEMS API.............................................................................................................................................. 20

5.2.3. Usage....................................................................................................................................................... 21

5.3. Error Manager............................................................................................................................................... 23

5.3.1. Description............................................................................................................................................... 23

5.3.2. RTEMS API.............................................................................................................................................. 23

5.3.3. Usage....................................................................................................................................................... 28

5.3.4. Limitations................................................................................................................................................ 30

5.4. SCET.............................................................................................................................................................. 31

5.4.1. Description............................................................................................................................................... 31

5.4.2. General purpose triggers ......................................................................................................................... 31

5.4.3. Pulse-Per-Second (PPS) signals ............................................................................................................. 31

5.4.4. RTEMS API.............................................................................................................................................. 32

5.4.5. Usage....................................................................................................................................................... 37

5.4.6. PPS.......................................................................................................................................................... 37

5.4.7. Event callback via message queue.......................................................................................................... 37

5.4.8. RTEMS application example.................................................................................................................... 38

5.5. UART.............................................................................................................................................................. 41

5.5.1. Description............................................................................................................................................... 41

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5.5.2. RTEMS API.............................................................................................................................................. 41

5.5.3. Usage description .................................................................................................................................... 44

5.5.4. Limitations................................................................................................................................................ 45

5.6. Mass memory................................................................................................................................................ 45

5.6.1. Description............................................................................................................................................... 45

5.6.2. Data Structures........................................................................................................................................ 46

5.6.3. RTEMS API.............................................................................................................................................. 47

5.6.4. Usage....................................................................................................................................................... 53

5.6.5. Error injection........................................................................................................................................... 56

5.6.6. Limitations................................................................................................................................................ 56

5.7. Spacewire...................................................................................................................................................... 57

5.7.1. Description............................................................................................................................................... 57

5.7.2. RTEMS API.............................................................................................................................................. 57

5.7.3. Usage description .................................................................................................................................... 59

5.8. GPIO............................................................................................................................................................... 62

5.8.1. Description............................................................................................................................................... 62

5.8.2. RTEMS API.............................................................................................................................................. 62

5.8.3. Usage description .................................................................................................................................... 65

5.8.4. Limitations................................................................................................................................................ 66

5.9. CCSDS........................................................................................................................................................... 67

5.9.1. Description............................................................................................................................................... 67

5.9.2. RTEMS API.............................................................................................................................................. 67

5.9.3. Usage description .................................................................................................................................... 72

5.10. ADC.............................................................................................................................................................. 74

5.10.1. Description............................................................................................................................................. 74

5.10.2. RTEMS API............................................................................................................................................ 75

5.10.3. Usage description .................................................................................................................................. 78

5.10.4. Limitations.............................................................................................................................................. 79

5.11. NVRAM ........................................................................................................................................................ 80

5.11.1. Description............................................................................................................................................. 80

5.11.2. EDAC mode........................................................................................................................................... 80

5.11.3. Non-EDAC mode ................................................................................................................................... 80

5.11.4. RTEMS API............................................................................................................................................ 80

5.11.5. Usage description .................................................................................................................................. 83

6. SPACEWIRE ROUTER....................................................................................................85

7. SIRIUS TCM.....................................................................................................................86

7.1. Description.................................................................................................................................................... 86

7.2. Block diagram............................................................................................................................................... 87

7.3. TCM-S application overview........................................................................................................................ 87

7.4. Configuration................................................................................................................................................ 88

7.5. Telemetry....................................................................................................................................................... 90

7.6. Telecommands ............................................................................................................................................. 91

7.7. Pulse commands.......................................................................................................................................... 92

7.8. COP-1............................................................................................................................................................. 92

7.9. Time Management ........................................................................................................................................ 92

7.10. Error Management and System Supervision ........................................................................................... 92

7.11. Mass Memory Handling.............................................................................................................................. 93

7.12. ECSS standard service .............................................................................................................................. 93

7.12.1. PUS-1 Telecommand verification service .............................................................................................. 93

7.12.2. PUS-2 Device Command Distribution Service....................................................................................... 94

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7.13. Spacewire RMAP ........................................................................................................................................ 94

7.13.1. Input....................................................................................................................................................... 95

7.13.1. Output.................................................................................................................................................... 96

7.13.2. Status code in reply messages .............................................................................................................. 96

7.14. RMAP address details................................................................................................................................ 96

7.14.1. Input....................................................................................................................................................... 96

7.14.2. Output.................................................................................................................................................. 111

7.15. Handling of Rd/Wr-pointers and wrap-flags for partitions.................................................................... 111

7.16. Limitations ................................................................................................................................................ 112

8. SYSTEM-ON-CHIP DEFINITIONS.................................................................................113

8.1. Memory mapping........................................................................................................................................ 113

8.2. Interrupt sources........................................................................................................................................ 114

8.3. SCET timestamp trigger sources.............................................................................................................. 114

8.4. Boot images and boot procedure.............................................................................................................. 115

8.4.1. Description............................................................................................................................................. 115

8.4.2. Block diagram ........................................................................................................................................ 115

8.4.3. Usage description .................................................................................................................................. 115

8.4.4. Limitations.............................................................................................................................................. 116

8.5. Reset behaviour.......................................................................................................................................... 116

8.6. General synchronize method .................................................................................................................... 116

8.7. Pulse command inputs .............................................................................................................................. 116

8.8. SoC information map ................................................................................................................................. 117

9. CONNECTOR INTERFACES.........................................................................................118

9.1. JTAG-RTL, FPGA-JTAG connector........................................................................................................... 118

9.2. DEBUG-SW.................................................................................................................................................. 118

9.3. PWR –Power .............................................................................................................................................. 119

9.4. SPW1 –Spacewire 1................................................................................................................................... 119

9.5. SPW2 –Spacewire 2................................................................................................................................... 120

9.6. ANALOG, Analog input and 3xGPIO (Sirius OBC only) .......................................................................... 120

9.7. DIGITAL, PPS input and 12xGPIO............................................................................................................. 121

9.8. UART0-2 - RS422/485 ................................................................................................................................. 122

9.9. UART3-5 - RS422/485 (Sirius OBC only)................................................................................................... 122

9.10. TRX1 - RS422 Transceiver interface (Sirius TCM only)......................................................................... 124

9.11. TRX2 - LVDS Transceiver interface (Sirius TCM only) .......................................................................... 124

9.12. UMBI –Baseband Umbilical (Sirius TCM only)...................................................................................... 125

9.13. Pulse Command Outputs (Sirius TCM only) .......................................................................................... 126

10. UPDATING THE SIRIUS FPGA...................................................................................127

10.1. Prerequisite hardware.............................................................................................................................. 127

10.2. Prerequisite software............................................................................................................................... 127

10.3. Step by step guide.................................................................................................................................... 127

11. MECHANICAL DATA ..................................................................................................129

12. GLOSSARY.................................................................................................................130

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1. Introduction

This manual describes the functionality and usage of the ÅAC Sirius OBC and Sirius TCM

products. The Sirius OBCor Sirius TCM differ in certain areas such as the SoC, interfaces

etc. but can mostly be described with the same functionality and will throughout this

document be referred to as “the Sirius products” when both products are referred at the

same time.

1.1. Applicable releases

This version of the manual is applicable to the following software releases:

Sirius OBC 0.10.0

Sirius TCM 0.10.0

1.2. Intended users

This manual is written for software engineers using the ÅAC Sirius products. The electrical

and mechanical interface is described in more detail in the electrical and mechanical ICD

documents [RD10] and [RD11].

1.3. Getting support

If you encounter any problem using the Sirius products or another ÅAC product please use

the following address to get help:

Email: [email protected]

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1.4. Reference documents

RD#

Document ref

Document name

RD1

http://opencores.org/openrisc,architecture

OpenRISC 1000 Architecture

Manual

RD2

ECSS-E-ST-50-12C

SpaceWire –Links, nodes,

routers and networks

RD3

ECSS-E-ST-50-52C

SpaceWire –Remote memory

access protocol

RD4

ECSS-E-70-41A

Ground systems and

operations –Telemetry and

telecommand packet utilization

RD5

SNLS378B

PC16550D Universal

Asynchronous

Receiver/Transmitter with

FIFOs

RD6

AD7173-8, Rev. A

Low Power, 8-/16-Channel,

31.25 kSPS, 24-Bit, Highly

Integrated Sigma-Delta ADC

RD7

Edition 4.10.99.0

RTEMS BSP and Device

Driver Development Guide

RD8

CCSDS 132.0-B-2

TM Space Data Link Protocol

RD9

CCSDS 232.0-B-2

TC Space Data Link Prototcol

RD10

P2-2-96-ICD-014

Sirius OBC electrical and

mechanical ICD

RD11

P2-2-96-ICD-013

Sirius TCM electrical and

mechanical ICD

RD12

SS-EN 61340-5-1

Electrostatics - Part 5-1:

Protection of electronic

devices from electrostatic

phenomena - General

requirements

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2. Equipment information

The Sirius OBC and Sirius OBC products are depicted in Figure 3-1 and Figure 3-2.

The Sirius products also include both a debugger interface for downloading and debugging

software applications and a JTAG interface for programming the FPGA during

manufacturing.

The FPGA firmware implements a SoC centered around a 32 bit OpenRISC Fault Tolerant

processor [RD1] running at a system frequency of 50 MHz and with the following set of

peripherals:

Error manager, error handling, tracking and log of e.g. power loss and/or memory

error detection.

SDRAM 64 MB data + 64 MB EDAC running @100MHz

Spacecraft Elapsed Timer (SCET), including a PPS (Pulse Per Second) time

synchronization interface for accurate time measurement with a resolution of 15 µs

SpaceWire, including a three-port SpaceWire router, for communication with

external peripheral units

UARTs uses the RS422 and RS485 line drivers on the board with line driver mode

set by software.

GPIOs

Watchdog, a fail-safe mechanism to prevent a system lockup

System flash of 2 GB with EDAC-protection for storing boot images in multiple

copies

Pulse command inputs for reset to a specific software image

MRAM for storage of metadata and other data that requires a large number of

writes that shall survive loss of power

For the Sirius TCM the following additional peripherals are included in the SoC:

CCSDS, communications IP.

Mass memory of 16GB with EDAC-protection, NAND flash based, for storage of

mission critical data.

For the Sirius OBC an Analog interface is included.

The input power supply provided to the Sirius products shall be between +4.5 and +16 VDC.

The power consumption is highly dependent on peripheral loads and ranges from 0.8 W to

2 W.

2.1. System Overview with peripherals

Figure 2-1 depicts a System-on-Chip (SoC) overview including the related peripherals of the

Sirius OBC and Sirius TCMproducts. The figure shows what parts that are included for

which products.

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FPGA

FPU

OpenRISC

1200FT

I/D Cache

I2C

UART

GPIO

CCSDS

Memory

controller

System

flash

controller

Flash

controller

SpaceWire

DMA

Control

Watchdog

Debug

Unit

SCET

Error

manager

2x 64MB

SDRAM

2 GB System

Flash

Radio Interfaces

RS422/LVDS RS422/RS485 JTAG/DEBUG

Pulse CMDUMBI/EGSEETHERNET GPIO

ADC

(Housekeeping)

Ethernet

10/100

ADC

controller

OBC / TCM

NVRAM

Analog inputs

NVRAM

TCM TCM/OBC Future option

16 GB Flash

OBC

PPS

Figure 2-1 - The Sirius OBC / Sirius TCM SoC Overview

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3. Setup and operation

3.1. User prerequisites

The following hardware and software is needed for the setup and operation of the Sirius

products.

PC computer

1 GB free space for installation (minimum)

Debian 7 or 8 64-bit with super user rights

USB 2.0

JTAG debugger

ÅAC JTAG debugger hardware including harness

Recommended applications and software

Installed serial communication terminal, e.g. gtkterm or minicom

Host build system, e.g. the debian package build-essential

The following software is installed by the ÅAC toolchain package

oGCC, C compiler for OpenRISC

oGCC, C++ compiler for OpenRISC

oGNU binutils and linker for OpenRISC

oCustom openocd binary designed for OpenRISC

For FPGA update capabilities

Microsemi FlashPro Express v11.7, http://www.microsemi.com/products/fpga-

soc/design-resources/programming/flashpro#software

FlashPro5 programmer

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3.2. Connecting cables to the Sirius products

Figure 3-1 –ÅAC Sirius Sirius OBC with connector naming

Figure 3-2 - ÅAC Sirius Sirius TCM with connector naming

The instructions below refer to the connector names in Figure 3-1 and Figure 3-2.

JTAG-RTL

DEBUG-SW

SPW1

SPW2

UART0-2

PWR

UART3-5

DIGITAL

ANALOG

JTAG-RTL

DEBUG-SW

UMBI

SPW1

UART0-2

PWR

TRX2-LVDS

TRX1-RS422

DIGITAL

PULSE

SPW2

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All products and ingoing material shall be handled with care to prevent damage of

any kind.

ESD protection and other protective measures shall be considered. Handling

should be performed according to applicable ESD requirement standards such as

[RD12] or equivalent.

Ensure that all mating connectors have the same zero reference (ground) before

connecting.

Connect the nano-D connector to the PWR connector with 4.5 - 16 V DC. The units

will nominally draw about 260-300 mA @5V DC.

The ÅAC debugger is mainly used for development of custom software for the

Sirius OBC or Sirius TCM and has both a debug UART for monitoring and a JTAG

interface for debug capabilities. It is also used for programming an image to the

system flash memory. For further information refer to Chapter 3.6. When it is to be

used, connect the 104452 ÅAC Debugger to the DEBUG-SW connector. Connect

the adapter USB-connector to the host PC.

For FPGA updating only: Connect a FlashPro5 programmer to connector JTAG-

RTL using the 104470 FPGA programming cable assembly. For further information

how to update the SoC refer to Chapter 9.10.

For connecting the SpaceWire interface, connect the nano-D connector to

connector SPW1 or SPW2.

For more detailed information about the connectors, see Chapter 9.

3.3. Installation of toolchain

This chapter describes instructions for installing the aac-or1k-toolchain.

3.3.1. Supported Operating Systems

Debian 7 64-bit

Debian 8 64-bit

When installing Debian, we recommend using the “netinst” (network install) method. Images

for installing Debian 8 are available via https://www.debian.org/releases/jessie/debian-

installer/ and images for installing Debian 7 are available via

https://www.debian.org/releases/wheezy/debian-installer/

In order to install the toolchain below a Debian package server mirror must be added, either

in the installation procedure (also required during network install) or after installation. For

adding a package server mirror after installation, follow the instructions at

https://www.debian.org/doc/manuals/debian-faq/ch-uptodate.en.html

3.3.2. Installation Steps

1. Add the ÅAC Package Archive Server

Open a terminal and execute the following command:

sudo gedit /etc/apt/sources.list.d/aac-repo.list

This will open a graphical editor; add the following lines to the file and then save and

close it:

deb http://repo.aacmicrotec.com/archive/ aac/

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deb-src http://repo.aacmicrotec.com/archive/ aac/

Add the key for the package archive as trusted by issuing the following command:

wget -O - http://repo.aacmicrotec.com/archive/key.asc | sudo

apt-key add -

The terminal will echo "OK" on success.

2. Install the Toolchain Package

Update the package cache and install the toolchain by issuing the following commands:

sudo apt-get update

sudo apt-get install aac-or1k-toolchain

Note: The toolchain package is roughly 1GB uncompressed, downloading/installing it

will take some time.

3. Setup

In order to use the toolchain commands, the shell PATH variable needs to be set to

include them, this can be done either temporarily for the current shell via

source /opt/aac/aac-path.sh

or permanently by editing the ~/.profile file

gedit ~/.profile

and adding the following snippet at the end of the file, and then save and close it:

# AAC OR1k toolchain PATH setup

if [ -f /opt/aac/aac-path.sh ]; then

. /opt/aac/aac-path.sh >/dev/null

3.4. Installing the Board Support Package (BSP)

The BSP can be downloaded from http://repo.aacmicrotec.com/bsp. Simply extract the

tarball aac-or1k-xxx-x-bsp-y.tar.bz2 to a directory of your choice (xxx-x depends on your

intended hardware target - Sirius OBC or Sirius TCM and y matches the current version

number of that BSP).

The newly created directory aac-or1k-xxx-x-bsp now contains the drivers for both bare-metal

applications and RTEMS. See the included README and chapter 4.1 for build instructions.

3.5. Deploying a Sirius application

3.5.1. Establish a debugger connection to the Sirius products

The Sirius products are shipped with debuggers who connect to a PC via USB. To interface

the Sirius products, the Open On-Chip Debugger (OpenOCD) software is used. A script

called run_aac_debugger.sh is shipped with the toolchain package which starts an

OpenOCD server for gdb to connect to.

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1. Connect the Sirius products according to section 3.2 and switch on the power

supply.

2. Start the run_aac_debugger.sh script from a terminal.

3. If the printed message is according to Figure 3-3, the connection is working.

Figure 3-3 - Successful OpenOCD connection to the Sirius products

The line

target state: halted

must be displayed in the output, otherwise the OpenOCD connection has failed and the

board must be power-cycled.

3.5.2. Setup a serial terminal to the device debug UART

The device debug UART may be used as a debug interface for printf output etc.

A serial communication terminal such as minicom or gtkterm is necessary to communicate

with the Sirius product, using these settings:

Baud rate: 115200

Data bits: 8

Stop bits: 1

Parity: None

Hardware flow control: Off

On a clean system with no other USB-to-serial devices connected, the serial port will appear

as /dev/ttyUSB1. However, the numbering may change when other USB devices are

connected and you have to make sure you're using the correct device number to

communicate to the board's debug UART.

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On Debian 8, a more foolproof way of identifying the terminal to use is the by-id mechanism.

Once you've identified the serial number of your debugger (see 3.5.4.), you can connect to it

using the autocreated path at /dev/serial/by-id/. The debug UART is identified as

usb-AAC_Microtec_JTAG_Debugger_FTZ7QCMF-if01-port0, where FTZ7QCMF is

the serial number in this case. Make sure you use the if01 number and not if00 as this is

consumed by the OpenOCD server later.

3.5.3. Loading an application

An application can either be loaded only to the volatile memory, which is easier and typically

used during the development stages, or to NAND flash (see section 3.6). This is done using

gdb.

1.a) Start gdb with the following command from a shell for a bare-metal environment

or1k-aac-elf-gdb

1.b) Start gdb with the following command from a shell for an RTEMS environment

or1k-aac-rtems4.11-gdb

2. When gdb has opened successfully, connect to the hardware through the

OpenOCD server using the gdb command

target remote localhost:50001

3. To run an executable program in hardware, first specify its name using the gdb

command file. Make sure the application is in ELF format.

file path/to/binary_to_execute

4. Now it needs to be uploaded onto the target RAM

load

5. In the gdb prompt, type cto start to run the application

3.5.4. Using multiple debuggers on the same PC

In order to use multiple debuggers connected to the same PC, each instance of OpenOCD

must be configured to connect to the specific debugger serial number and to use unique

ports. Support for this is included in the run_aac_debugger.sh script.

In order to determine the serial number for a specific device, run the following command

before connecting the debugger

tail -f /var/log/kern.log

which initially prints the last 10 lines of the kernel log file (which can be ignored). When

plugging in the debugger USB cable into the PC, this should produce new output similar to

[363061.959120] usb 1-1.3.3.3: new full-speed USB device number 15

using ehci_hcd

[363062.058152] usb 1-1.3.3.3: New USB device found, idVendor=0403,

idProduct=6010

[363062.058176] usb 1-1.3.3.3: New USB device strings: Mfr=1,

Product=2, SerialNumber=3

[363062.058194] usb 1-1.3.3.3: Product: JTAG Debugger

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[363062.058207] usb 1-1.3.3.3: Manufacturer: AAC Microtec

[363062.058220] usb 1-1.3.3.3: SerialNumber: FTZ7QCMF

where FTZ7QCMF is the serial number for the debugger.

The GDB, telnet and TCL ports must be set to a unique value in the Linux user-available

range 1025-65535, the defaults are GDB: 50001, telnet: 4444, TCL: 6666.

For example, two debuggers with serial numbers FTZ7QCMF and FTZ7IB10 can be setup

via

run_aac_debugger.sh -s FTZ7QCMF -g 50001 -t 4444 -p 6666

run_aac_debugger.sh -s FTZ7IB10 -g 50002 -t 4445 -p 6667

Two instances of GDB can then be opened, and connected to the different debuggers via

target remote localhost:50001

and

target remote localhost:50002

respectively. Only the GDB port is used when connecting from GDB.

3.6. Programming an application (boot image) to system flash

This chapter describes how to program the NAND flash memory with a selected boot image.

To achieve this, the boot image binary is bundled together with the NAND flash

programming application during the latter's compilation. The NAND flash programming

application is then uploaded to the target and started just as an ordinary application using

gdb. The maximum allowed size for the boot image for is 16 MB. The nandflash_program

application can be found in the BSP.

The below instructions assume that the toolchain is in the PATH, see section 3.3 for how to

accomplish this.

1. Compile the boot image binary according to the rules for that program.

2. Ensure that this image is in a binary-only format and not ELF. This can be

accomplished with the help of the GCC objcopy tool included in the toolchain:

Note that Xis to be replaced according to what your application has been compiled

against, either elf for a bare-metal application or rtems4.11 for the RTEMS variant.

or1k-aac-X-objcopy -O binary boot_image.elf boot_image.bin

3. See chapter 3.4 for installing the BSP and enter

cd path/to/bsp/aac-or1k-xxx-x-bsp/src/nandflash_program/src

4. Now, compile the nandflash-program application, bundling it together with the boot image

binary.

make nandflash-program.elf PROGRAMMINGFILE=/path/to/boot_image.bin

5. Load the nandflash-program.elf onto the target RAM with the help of gdb and

execute it, see section 3.5.3. Follow the instructions on screen and when it's ready,

reboot the board by a reset or power cycle.

Document number

205065

Version

Rev E

Issue date

2017-03-07

Sirius OBC and TCM User Manual

www.aacmicrotec.com

Page 17 of 131

Document number

205065

Version

Rev E

Issue date

2017-03-07

Sirius OBC and TCM User Manual

www.aacmicrotec.com

Page 18 of 131

4. Software development

Applications to be deployed on the Sirius products can either use a bare-metal approach or

use the RTEMS OS. This corresponds to the two toolchain prefixes available: or1k-aac-elf-*

or or1k-aac-rtems4.11-*

Drivers for both are available in the BSP, see chapter 3.4 and the BSP README for more

information. However, the RTEMS OS is the recommended way and documentation for the

bare-metal layer is not included in this manual.

4.1. RTEMS step-by-step compilation

The BSP is supplied with an application example of how to write an application for RTEMS

and engage all the available drivers.

Please note that the toolchain described in chapter 3.3 needs to have been installed and the

BSP unpacked as described in chapter 3.4.

The following instructions detail how to build the RTEMS environment and a test application

1. Enter the BSP src directory

cd path/to/bsp/aac-or1k-xxx-x-bsp/src/

2. Type make to build the RTEMS target

make

3. Once the build is complete, the build target directory is librtems

4. Set the RTEMS_MAKEFILE_PATH environment variable to point to the librtems

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