NXP Semiconductors AN13707
Hardware Design Guidelines for LPC553x/LPC55S3x Microcontrollers
4.1 Introduction
The LPC553x/S3x has the following clock sources:
•Internal Free Running Oscillator (FRO). This oscillator provides a selectable 96 MHz output, and a 12 MHz
output (divided down from the selected higher frequency) that can be used as a system clock. The FRO
is trimmed to +/- 1 % accuracy over the entire voltage and 0 °C to 85 °C. The FRO is trimmed to +/- 2 %
accuracy over the entire voltage and -40 °C to 105 °C.
•32 kHz Internal Free Running Oscillator FRO. The FRO is trimmed to +/- 2 % accuracy over the entire voltage
and temperature range.
•Internal low-power oscillator (FRO 1 MHz) trimmed to +/- 15 % accuracy over the entire voltage and
temperature range.
•Crystal oscillator with an operating frequency of 12 MHz to 32 MHz, and an option for the external clock input
(bypass mode) for clock frequencies of up to 25 MHz.
•Crystal oscillator with 32.768 kHz operating frequency.
•PLL0 and PLL1 allow CPU operation up to the maximum CPU rate without the need for a high-frequency
external clock. PLL0 and PLL1 can run from the internal FRO 12 MHz output the external oscillator, internal
FRO 1 MHz output, or the 32.768 kHz RTC oscillator.
•Clock output function with a divider to monitor internal clocks.
•Frequency measurement unit for measuring the frequency of any on-chip or off-chip clock signal.
•Each crystal oscillator has one embedded capacitor bank, where each can be used as an integrated
load capacitor for the crystal oscillators. Using APIs, the capacitor banks on each crystal pin can tune the
frequency for crystals with a Capacitive Load (CL) leading to conserving board space and reducing costs.
Note: For external crystal oscillator and RTC oscillator, LPC553x/S3x have a capacitor bank feature. It means
that the stabilizing capacitors can be unsoldered on both 32 kHz and 16 MHz XTAL. We also suggest the user
keep the two stabilizing capacitors as “DNP/Do Not Populate” on PCB.
4.2 Capacitor bank
Each crystal oscillator has one embedded capacitor bank, which is always enabled, and its capacitance can
be adjusted in certain range (IEC equivalent capacitive load: 6 - 10 pF). The capacitor bank can be used as
integrated load capacitors for the crystal oscillators. It helps save external load capacitors of the crystal and
therefore the system BOM cost.
For the capacitor bank usage, refer to Understanding Cap Bank in LPC55(S)xx (document AN13057).
4.3 Crystal oscillator
The crystal oscillator has one embedded capacitor bank that can be used as an integrated load capacitor for the
crystal oscillators. The capacitor bank on each crystal pin can tune the frequency for crystals with a Capacitive
Load (CL) between 6 to 10 pF (IEC equivalent). Simple APIs can be used to configure the capacitor bank based
on the crystal Capacitive Load (CL) and measured PCB parasitic capacitances on the XIN and XOUT pins.
In the crystal oscillator circuit, only the crystal (XTAL) must be connected while the CX1 and CX2 on
XTAL32M_P and XTAL32M_N pins can optionally be connected. No additional capacitance needs to be added
to the PCB when the computation of the required Capacitance Load is less than 20 pF (10 pF equivalent IEC),
When the aforesaid load is greater than 20 pF (10 pF equivalent IEC), additional capacitance is required. (see
Figure 4.) For more information, refer to the Cap Bank API chapter in the LPC553x/S3x Reference Manual.
In bypass mode, an external clock (maximum frequency of up to 25 MHz) can also be connected to
XTAL32M_P if XTAL32M_N is left open. The external [0 – VH] square signal can be applied on the XTAL32M_P
pin from 0 V to 850 mV.
AN13707 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.
Application note Rev. 1 — 4 September 2023
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