ABOV SEMICONDUCTOR MC81F4204 User manual

MC81F4204
April 24, 2012 Ver.1.41 1
ABOV SEMICONDUCTOR
8-BIT SINGLE-CHIP MICROCONTROLLERS
MC81F4204
MC81F4204 R/M/V/D/B/W/U
User’s Manual (Ver. 1.41)

MC81F4204
2 April 24, 2012 Ver.1.41
Version 1.41
Published by FAE Team
©2008 ABOV Semiconductor Co., Ltd. All rights reserved.
Additional information of this manual may be served by ABOV Semiconductor offices in Korea or
Distributors.
ABOV Semiconductor reserves the right to make changes to any information here in at any time
without notice.
The information, diagrams and other data in this manual are correct and reliable; however, ABOV
Semiconductor is in no way responsible for any violations of patents or other rights of the third
party generated by the use of this manual.

MC81F4204
April 24, 2012 Ver.1.41 3
REVISION HISTORY
VERSION 1.41 (April 24, 2012) This book
Add the chapter ’ 7.10 POR Electrical CHARACTERISTICS’.
VERSION 1.40 (May 21, 2011) This book
Update 20QFN pin assignment and package diagram.
VERSION 1.39 (December 28, 2010) This book
Change ‘5.5v’ to “VDD level” in DC Electrical Characteristics description(page 27/28).
Change ‘5.0v’ to “External RC Condition” in DC Electrical Characteristics description(page 34).
Change ‘5.0v’ to “Internal RC Condition” in DC Electrical Characteristics description(page 35).
VERSION 1.38 (November 10, 2010) This book
Update 20TSSOP pin assignment and package diagram.
VERSION 1.37 (December 23, 2009) This book
Update the chapter ’ 22.3 Reset circuit’.
Add Reset pin information.
VERSION 1.36 (December 15, 2009) This book
Update the chapter ’ 22.3 Reset circuit’.
VERSION 1.35 (October 19, 2009) This book
Add a note about SCK port at R0CONM register description.
Change EVA.board picture. (the board’s color is changed from blue to green)
VERSION 1.34 (September 30, 2009)
Correct the duty equation of PMW0/1.
Add more tools at “1.3 Development Tools”.
VERSION 1.33 (September 18, 2009)
Add more descriptions at PWM function descriptions.
VERSION 1.32 (September 4, 2009)
Remove rising/falling time at LVR electrical characteristics.
Change ‘1.83v’ to “POR level” in POR description.
Add POR level at “DC CHARACTERISTICS”.
Add ROM option read timing information.
Add “Typical Characteristics”.
VERSION 1.22 (August 12, 2009)

MC81F4204
4 April 24, 2012 Ver.1.41
Add “16TSSOP” at 16pin pin assignment page.
Remove fxt(sub-clock source) at block diagrams and register descriptions of T0/1/2 and Buzzer.
VERSION 1.21 (July 7, 2009)
“25.3 Hardware Conditions to Enter the ISP Mode” is updated.
Notes of R35 port control registers are updated.
R3CONH, R3CONL register’s address are corrected at “Table 9-4 Control Register 4/4”
“R1 PORT PULL-UP ENABLE REGISTER table” is corrected.
VERSION 1.2 (June 29, 2009)
Remove ‘WDT’ at “Stop release” description. ‘WDT’ is not a release source of STOP mode.
Change “fxin” to “fbuz” at buzzer frequency calculation in “BUZZER” chapter.
VERSION 1.1 (June 17, 2009)
Add rom writing endurance at features.
Remove 16 bit mode at Timer0.
VERSION 1.0 (June 15, 2009)
Remove “preliminary”.
Some errata are fixed.
Add “Buzzer frequency table”.
VERSION 0.81 Preliminary (April 28, 2009)
Delete a note1 at ’20.5 recommended circuit’.
VERSION 0.8 Preliminary (April 16, 2009)
Add a sub-chapter ‘Changing the stabilizing time’ at the chapter ‘Power down operation’.
Add a note for R33/R34 ports after R3CONH description.
One of BIT’s clock source ‘2048’ is changed to ‘1024’.
VERSION 0.7 Preliminary (April 7, 2009)
Description of SIO procedure is updated.
Description of ISP chapter is updated.
VERSION 0.6 Preliminary (April 1, 2009)
Chapter ‘7.ELECTICAL CHARICTORISTICS’ is updated.
VERSION 0.5 Preliminary (March 5, 2009)
The SCLK pin for ISP is moved to R11 port.
Note for ADC recommended circuit is changed.
VERSION 0.4 Preliminary (February 12, 2009)
Correct 16 SOP package diagram.

MC81F4204
April 24, 2012 Ver.1.41 5
Update the chapter ‘6. PORT STRUCTURE’.
Update the chapter ‘7. ELECTRICAL CHARACTERISTICS’.
Update the chapter ’25. IN SYSTEM PROGRAMMING’.
VERSION 0.3 Preliminary (December 19, 2008)
Block diagrams of Timer 2/3 and PWM are corrected.
VERSION 0.2 Preliminary (November 17, 2008)
Some errata are corrected.
VERSION 0.1 Preliminary (November 12, 2008)
Change some bit and symbol names about interrupts.
VERSION 0.0 Preliminary (October 31, 2008)

MC81F4204
6 April 24, 2012 Ver.1.41
TABLE OF CONTENTS
REVISION HISTORY ..............................................................................................................................3
TABLE OF CONTENTS ..........................................................................................................................6
1. OVERVIEW.........................................................................................................................................9
1.1 Description.................................................................................................................................... 9
1.2 Features........................................................................................................................................9
1.3 Development Tools.....................................................................................................................10
1.4 Ordering Information................................................................................................................... 11
2. BLOCK DIAGRAM ............................................................................................................................12
3. PIN ASSIGNMENT ...........................................................................................................................13
3.1 20 pin- PDIP/SOP/TSSOP..........................................................................................................13
3.2 20 pin- QFN ................................................................................................................................14
3.3 16 pin- PDIP/SOP/TSSOP..........................................................................................................14
3.4 Summary.....................................................................................................................................15
4. PACKAGE DIAGRAM .......................................................................................................................16
4.1 20 PDIP- MC81F4204B ..............................................................................................................16
4.2 20 SOP - MC81F4204D..............................................................................................................16
4.3 20 TSSOP - MC81F4204W ........................................................................................................17
4.4 20 QFN - MC81F4204U..............................................................................................................18
4.5 16 PDIP - MC81F4204V .............................................................................................................18
4.6 16 SOP - MC81F4204M .............................................................................................................19
4.7 16 TSSOP - MC81F4204R .........................................................................................................19
5. PIN DESCRIPTION...........................................................................................................................20
6. PORT STRUCTURE .........................................................................................................................23
7. ELECTRICAL CHARACTERISTICS.................................................................................................26
7.1 Absolute Maximum Ratings ........................................................................................................26
7.2 Recommended Operating Conditions ........................................................................................26
7.3 A/D Converter Characteristics ....................................................................................................27
7.4 DC Electrical Characteristics ......................................................................................................28
7.5 DC Electrical Characteristics (Continued) ..................................................................................29
7.6 Input/Output Capacitance ...........................................................................................................29
7.7 Serial I/O Characteristics ............................................................................................................ 30
7.8 Data Retention Voltage in Stop Mode ........................................................................................32
7.9 LVR (Low Voltage Reset) Electrical Characteristics ..................................................................33
7.10 POR (Power on Reset) Electrical Characteristics ....................................................................33
7.11 Main clock Oscillator Characteristics........................................................................................34
7.12 External RC Oscillation Characteristics....................................................................................35
7.13 Internal RC Oscillation Characteristics .....................................................................................36
7.14 Main Oscillation Stabilization Time...........................................................................................36
7.15 Operating Voltage Range .........................................................................................................37
7.16 Typical Characteristics..............................................................................................................38
8. ROM OPTION ...................................................................................................................................42
8.1 Rom Option.................................................................................................................................42
8.2 Read Timing................................................................................................................................43
9. MEMORY ORGANIZATION .............................................................................................................44
9.1 Registers.....................................................................................................................................44

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April 24, 2012 Ver.1.41 7
9.2 Program Memory ........................................................................................................................48
9.3 Data Memory ..............................................................................................................................51
9.4 User Memory ..............................................................................................................................51
9.5 Stack Area ..................................................................................................................................52
9.6 Control Registers ( SFR ) ...........................................................................................................52
9.7 Addressing modes ......................................................................................................................57
10. I/O PORTS ......................................................................................................................................64
10.1 R0 Port Registers .....................................................................................................................65
10.2 R1 Port Registers .....................................................................................................................69
10.3 R3 Port Registers .....................................................................................................................73
11. INTERRUTP CONTROLLER..........................................................................................................75
11.1 Registers...................................................................................................................................76
11.2 Interrupt Sequence ...................................................................................................................78
11.3 BRK Interrupt ............................................................................................................................81
11.4 Shared Interrupt Vector ............................................................................................................81
11.5 Multi Interrupt............................................................................................................................82
11.6 Interrupt Vector & Priority Table ...............................................................................................83
12. EXTERNAL INTERRUPTS .............................................................................................................84
12.1 Registers...................................................................................................................................84
12.2 Procedure .................................................................................................................................87
13. OSCILLATION CIRCUITS ..............................................................................................................88
13.1 Main Oscillation Circuits ...........................................................................................................88
13.2 PCB Layout...............................................................................................................................89
14. BASIC INTERVAL TIMER ..............................................................................................................90
14.1 Registers...................................................................................................................................91
15. WATCH DOG TIMER......................................................................................................................93
15.1 Registers...................................................................................................................................94
16. Timer 0/1 .........................................................................................................................................95
16.1 Registers...................................................................................................................................95
16.2 Timer 0 8-Bit Mode ...................................................................................................................99
16.3 Timer 1 8-Bit Mode .................................................................................................................101
17. Timer 2 ..........................................................................................................................................103
17.1 Registers.................................................................................................................................103
17.2 Timer 2 8-Bit Mode .................................................................................................................105
18. High Speed PWM..........................................................................................................................107
18.1 Registers.................................................................................................................................109
19. BUZZER........................................................................................................................................111
19.1 Registers.................................................................................................................................112
19.2 Frequency table ......................................................................................................................113
20. 12-BIT ADC...................................................................................................................................115
20.1 Registers.................................................................................................................................116
20.2 Procedure ...............................................................................................................................117
20.3 Conversion Timing..................................................................................................................117
20.4 Internal Reference Voltage Levels .........................................................................................118
20.5 Recommended Circuit ............................................................................................................118
21. SERIAL I/O INTERFACE ..............................................................................................................119
21.1 Registers.................................................................................................................................120
21.2 Procedure ...............................................................................................................................121

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8 April 24, 2012 Ver.1.41
22. RESET ..........................................................................................................................................122
22.1 Reset Process ........................................................................................................................122
22.2 Reset Sources ........................................................................................................................123
22.3 Reset Circuit ...........................................................................................................................123
22.4 Watch Dog Timer Reset .........................................................................................................124
22.5 Power On Reset .....................................................................................................................125
22.6 Low Voltage Reset..................................................................................................................125
23. POWER DOWN OPERATION......................................................................................................126
23.1 Sleep Mode.............................................................................................................................126
23.2 Stop Mode...............................................................................................................................128
23.3 Sleep vs Stop..........................................................................................................................131
23.4 Changing the stabilizing time..................................................................................................132
23.5 Minimizing Current Consumption ...........................................................................................132
24. EMULATOR ..................................................................................................................................134
25. IN SYSTEM PROGRAMMING......................................................................................................137
25.1 Getting Started........................................................................................................................137
25.2 Basic ISP S/W Information .....................................................................................................138
25.3 Hardware Conditions to Enter the ISP Mode..........................................................................140
25.4 Entering ISP mode at power on time......................................................................................141
25.5 USB-SIO-ISP Board ...............................................................................................................142
26. INSTRUCTION SET......................................................................................................................143
26.1 Terminology List .....................................................................................................................143
26.2 Instruction Map .......................................................................................................................144
26.3 Instruction Set.........................................................................................................................145

MC81F4204
April 24, 2012 Ver.1.41 9
MC81F4204
8 bit MCU with 12-bit A/D Converter
1. OVERVIEW
1.1 Description
MC81F4204 is a CMOS 8 bit MCU which provides a 4K bytes FLASH-ROM and 192 bytes RAM.
It has following major features,
12 bit ADC : It has 10 ch A/D Converter which can be used to measure minute electronic voltage and
currents.
810 Core : Same with ABOV’s 800 Core but twice faster. 800 Core use a divided system clock but
810 Core use a system clock directly
1.2 Features
ROM (FLASH) : 4K Bytes
(Endurance: 100 cycle)
SRAM :192 Bytes
Minimum instruction execution time
166n sec at 12MHz (NOP instruction)
12-bit A/D converter : 10 ch
General Purpose I/O (GPIO)
20-pin PKG: 18
16-pin PKG: 14
Timer/counter
8Bit x 3ch
SIO : 1ch
PWM
8Bit x 2ch
10Bit x 2ch (High Speed PWM)
Basic Interval Timer (BIT) : 8Bit x 1ch
One Watchdog timer (WDT) : 8Bit x 1ch
Buzzer : 1ch
244 ~ 250kHz @8MHz
Power On Reset(POR)
Low Voltage Reset (LVR)
4 level detector (2.4/2.7/3.0/4.0V)
Interrupt sources : 21ch
External Interrupt : 12ch
Timer : 8ch
SIO : 1ch
Power Down Mode
Stop mode
Sleep mode
Operating Voltage & Frequency
2.2V – 5.5V (at 1.0 – 4.2MHz)
2.7V – 5.5V (at 1.0 – 8.0MHz)
4.0V – 5.5V (at 1.0 – 12.0MHz)
Operating Temperature
- 40°C ~ 85°C
Oscillator Type
Crystal, Ceramic, RC for main clock
Internal Oscillator
(8MHz/4MHz/2MHz/1MHz)
Package
20PDIP, 20SOP, 20TSSOP
16PDIP, 16SOP, 16TSSOP
Available Pb free package

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10 April 24, 2012 Ver.1.41
1.3 Development Tools
The MC81F4204 is supported by a full-featured macro assembler, C-Compiler, an in-circuit emulator
CHOICE-Dr.TM , FALSH programmers and ISP tools. There are two different type of programmers
such as single type and gang type. For more detail, Macro assembler operates under the MS-
Windows 95 and up versioned Windows OS. And HMS800C compiler only operates under the MS-
Windows 2000 and up versioned Windows OS.
Please contact sales part of ABOV semiconductor. And you can see more information at
( http://www.abov.co.kr )
Figure 1-1 PGMplusUSB ( Single Writer )
Figure 1-2 SIO ISP ( In System
Programmer )
Figure 1-3 StandAlone ISP
(VDD power is not supplied)
Figure 1-4 Ez-ISP
(VDD supplied Standalone type ISP)
Figure 1-5 StandAlone Gang4
( for Mass Production )
Figure 1-6 StandAlone Gang8
( for Mass Production )
Figure 1-7 Choice-Dr ( Emulator )

MC81F4204
April 24, 2012 Ver.1.41 11
1.4 Ordering Information
Device Name FLASH ROM RAM Package
MC81F4204R 16_TSSOP
MC81F4204M 16_SOP
MC81F4204V 16_PDIP
MC81F4204D 20_SOP
MC81F4204B 20_PDIP
MC81F4204W 20_TSSOP
4K Bytes 192 Bytes

MC81F4204
12 April 24, 2012 Ver.1.41
2. BLOCK DIAGRAM
Figure 2-1 System Block Diagram

MC81F4204
April 24, 2012 Ver.1.41 13
3. PIN ASSIGNMENT
3.1 20 pin- PDIP/SOP/TSSOP

MC81F4204
14 April 24, 2012 Ver.1.41
3.2 20 pin- QFN
3.3 16 pin- PDIP/SOP/TSSOP

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April 24, 2012 Ver.1.41 15
3.4 Summary
Pin number
alternative functions 20pin 16pin
Pin status
at RESET
R00 EXT10/SXin 17 13 input
R01 EXT11/SXout 18 14 input
R02 AN0/EXT0/EC0 19 15 input
R03 AN1/EXT1/T0O/PWM0O 20 16 input
R04 AN2/EXT2/EC1/SCK 1 1 input
R05 AN3/EXT3/T1O/PWM1O/SI 2 2 input
R06 AN4/EXT4/EC2/SO 3 3 input
R07 AN5/EXT5/T2O 4 4 input
R10 Vref/EXT6 6 6 input
R11 AN6/EXT7/PWM2O 7 7 input
R12 AN7/EXT8/PWM3O/BUZO 8 8 input
R13 AN8/EXT9/PWM4O 9 x Open-drain output
R14 - 10 x Open-drain output
R31 AN14 11 x Open-drain output
R32 - 12 x Open-drain output
R33 Xout 13 9 input
R34 Xin 14 10 input
R35 RESETB 15 11 input
VDD - 5 5 -
VSS - 16 12 -
Note :
Some pins are initialized by open-drain output mode, when the device is reset. Because the
pins are hided in 16 pin package and it is stable that hided pins are be in open-drain-output
mode.

MC81F4204
16 April 24, 2012 Ver.1.41
4. PACKAGE DIAGRAM
4.1 20 PDIP- MC81F4204B
4.2 20 SOP - MC81F4204D

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April 24, 2012 Ver.1.41 17
4.3 20 TSSOP - MC81F4204W

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18 April 24, 2012 Ver.1.41
4.4 20 QFN - MC81F4204U
4.5 16 PDIP - MC81F4204V

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April 24, 2012 Ver.1.41 19
4.6 16 SOP - MC81F4204M
4.7 16 TSSOP - MC81F4204R

MC81F4204
20 April 24, 2012 Ver.1.41
5. PIN DESCRIPTION
Pin Names I/O Pin Description Alternative
Functions
R00 EXT10
R01 EXT11
R02 AN0/EC0/EXT0
R03 AN1/T0O/
PWM0O/EXT1
R04 AN2/EC1/SCK/
EXT2
R05 AN3/SI/EXT3/
T1O/PWM1O
R06 AN4/EC2/SO/
EXT4
R07
I/O This port is a 1-bit programmable I/O pin.
Schmitt trigger input, Push-pull, or Open-drain output port.
When used as an input port, a Pull-up resistor can be
specified in 1-bit.
AN5/T2O/EXT5
R10 Vref/EXT6
R11 AN6/PWM2O/
EXT7
R12 AN7/PWM3O/
BUZO/EXT8
R13 AN8/EXT9
R14
I/O This port is a 1-bit programmable I/O pin.
Schmitt trigger input, Push-pull, or Open-drain output port.
When used as an input port, a Pull-up resistor can be
specified in 1-bit.
–
R31 AN14
R32
I/O This port is a 1-bit programmable I/O pin.
Input, Push-pull, or Open-drain output port.
When used as an input port, a Pull-up resistor
can be specified in 1-bit.
–
R33 Xout
R34 Xin
R35
I/O This port is a 1-bit programmable I/O pin.
Schmitt trigger input, Push-pull, or Open-drain output port.
When used as an input port, a Pull-up resistor can be
specified in 1-bit. RESETB
EXT0 I/O External interrupt input R02/AN0/EC0
EXT1 I/O External interrupt input/Timer 0 capture input R03/AN1/T0O/
PWM0O
EXT2 I/O External interrupt input R04/AN2/SCK/
EC1
EXT3 I/O External interrupt input/Timer 1 capture input R05/AN3/SI/
T1O/PWM1O
EXT4 I/O External interrupt input R06/AN4/SO/
EC2