ADLINK Technology PCIe-FIW Series User manual

Advance Technologies; Automate the World.
Manual Rev. 2.01
Revision Date: November 22, 2008
Part No: 50-11159-1000
PCIe-FIW Series
1394b PCI Express
Frame Grabber
User’s Manual

Copyright 2008 ADLINK TECHNOLOGY INC.
All Rights Reserved.
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, spe-
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the possibility of such damages.
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without prior written permission of the manufacturer.
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NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK
TECHNOLOGY INC.
Product names mentioned herein are used for identification pur-
poses only and may be trademarks and/or registered trademarks
of their respective companies.

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Table of Contents i
Table of Contents
Table of Contents..................................................................... i
List of Tables.......................................................................... iii
List of Figures........................................................................ iv
1 Introduction ........................................................................ 1
1.1 Features............................................................................... 2
1.2 Applications ......................................................................... 2
2 Hardware Reference........................................................... 3
2.1 PCIe-FIW64 Specifications.................................................. 3
PCIe-FIW64 Outline ........................................................4
PCIe-FIW64 Connectors and Pin Definitions ..................5
2.2 PCIe-FIW62 Specifications................................................ 14
PCIe-FIW62 Appearance ..............................................15
PCIe-FIW62 Connectors and Pin Definitions ................16
3 Installation Guide............................................................. 19
3.1 Hardware Installation......................................................... 19
3.2 Driver Installation............................................................... 20
4 Function Library............................................................... 29
4.1 Function List ...................................................................... 29
4.2 Functions........................................................................... 30
FIW64_Initialize ............................................................30
FIW64_GetTotalDeviceNum .........................................31
FIW64_GetTotalDeviceID .............................................32
FIW64_ResetDevice .....................................................33
FIW64_GetFirmwareVersion ........................................34
FIW64_SetDO ..............................................................35
FIW64_GetDI ................................................................36
FIW64_GetTriggerDelayTime .......................................37
FIW64_SetTriggerDelayTime .......................................38
FIW64_GetTriggerWidth ...............................................39
FIW64_SetTriggerWidth ...............................................40
FIW64_GetTriggerPolarity ............................................41
FIW64_SetTriggerPolarity ............................................42

ii Table of Contents
FIW64_GetErrorMessage .............................................43
4.3 Error Codes........................................................................ 44

ii List of Tables
List of Tables
Table 2-1: 1394b Pinout ............................................................ 5
Table 2-2: Additional 12 V Power Input Port .............................. 6
Table 2-3: IEEE1394 Connection Status LEDs ......................... 6
Table 2-4: Card ID Select .......................................................... 7
Table 2-5: Card ID Select Table ................................................ 7
Table 2-6: GPIO & Trigger ......................................................... 8
Table 2-7: Specifications .......................................................... 10
Table 2-8: Trigger Control Timing ............................................ 11
Table 2-9: Extension Cable Connector .................................... 13
Table 2-10: 1394b Pinout .......................................................... 16
Table 2-11: Status LED ............................................................. 16
Table 2-12: Disk Power Pinout .................................................. 17

List of Figures iii
List of Figures
Figure 2-1: PCIe-FIW64 Outline .................................................. 4
Figure 2-2: PCIe-FIW62 Diagram .............................................. 15

iv List of Figures

Introduction 1
1 Introduction
The PCIe-FIW series are IEEE 1394b (FireWire 800) interface
cards based on the PCI Express form factor and designed for high
speed computer-based machine vision applications. This series
consists of two main product families:
PCIe-FIW62: two 1394b (FireWire 800) ports
PCIe-FIW64: four 1394b (FireWire 800) ports
The PCIe-FIW series supports multiple 1394b device connections
with data transfer rates up to 800 Mb/s, like most of the IEEE
1394b cameras. The IEEE 1394b standard also supports a power
over cable feature to reduce wiring.
The 4-pin ATX power connector on the PCIe-FIW series allows the
1394 cameras that are connected to draw power. The LEDs on the
front panel of the PCIe-FIW series will illuminate when a PCIe-FIW
card is connected to a 1394b camera, thus making it is easy to
identify the channel connection status.
The PCIe-FIW64 provides four isolated digital inputs and outputs
for connecting to external devices such as position sensors. The
PCIe-FIW64 also includes four isolated programmable trigger out-
put pulses to manage trigger events such as activating a strobe
light.

2 Introduction
1.1 Features
PCI Express compliant
PCIe-FIW62: x1 PCI Express
PCIe-FIW64: x4 PCI Express
High-speed image transfer rates up to 800 Mb/s
Provides industrial screw lock connector
Status LED for channel activation
Four isolated digital inputs/outputs
Four isolated TTL level programmable trigger output pulses
Supports Windows XP/XP Embedded/Vista
1.2 Applications
Machine vision inspection systems
Scientific research instrumentation
Medical research instrumentation

Hardware Reference 3
2 Hardware Reference
2.1 PCIe-FIW64 Specifications
IEEE1394b Port
Four IEEE1394b fully compliant cable ports at
100 Mbits/s, 200 Mbits/s, 400 Mbits/s, and 800 Mbits/s.
Fully supports provisions of IEEE P1394b-2002.
Fully compliant with provisions of IEEE std 1394-1995
for a high performance serial bus and IEEE std 1394a-
2000.
Fully compliant with the 1394 Open Host Controller Inter-
face Specification, revision 1.1 and revision 1.2 draft.
Digital I/O and Trigger I/O Functions
Four isolated digital inputs
Four isolated digital outputs
Four isolated trigger inputs
Four isolated trigger outputs
Isolated Voltage
Rated isolation voltage: 1000 V @ 60 seconds
Form Factor
x4 PCI-express interface (PCI Express Base Specifica-
tion, Revision 1.1 compliant)
Dimensions
W x L: 129.5 x 111.15 mm
Operating Environment
Temperature: 0 to 55°C
Humidity: 5 to 90% RHNC
Storage Environment
Temperature: 0 to 85°C
Humidity: 0 to 95% RHNC

4 Hardware Reference
PCIe-FIW64 Power Requirements
+12 V max, 200 mA
+3.3 V max, 2.5 A
2.1.1 PCIe-FIW64 Outline
Figure 2-1: PCIe-FIW64 Outline

Hardware Reference 5
2.1.2 PCIe-FIW64 Connectors and Pin Definitions
CN1-CN4: IEEE1394b Port
Pin Signal Pin Signal
1 TPB- 6 VG
2 TPB+ 7 SC
3TPA-8 VP
4 TPA+ 9 TPB(R)
5TPA(R)
Table 2-1: 1394b Pinout

6 Hardware Reference
CN5: Additional 12 V Power Input Port
LED19-LED22: IEEE1394 Connection Status LEDs
Pin Signal
1 +12 V
2GND
3GND
4NC
Table 2-2: Additional 12 V Power Input Port
Component Function Description
LED19 CN1 IEEE1394 bus connection
status display. Green light: Normal connection
LED20 CN2 IEEE1394 bus connection
status display. Green light: Normal connection
LED21 CN3 IEEE1394 bus connection
status display. Green light: Normal connection
LED22 CN4 IEEE1394 bus connection
status display. Green light: Normal connection
Table 2-3: IEEE1394 Connection Status LEDs

Hardware Reference 7
SW1: Card ID Select
Card ID: up to four cards supported
Pin Signal Name Default
1 Board ID Select 0 ON
2 Board ID Select 1 ON
3 Non use ON
4 Non use ON
Table 2-4: Card ID Select
Card ID Board ID Select 0 Board ID Select 1
0ON ON
1OFF ON
2ON OFF
3OFF OFF
Table 2-5: Card ID Select Table

8 Hardware Reference
CN5: GPIO & Trigger
Pin Pin Name Type Pin Pin Name Type
1 System Power(+12V) OUT 2 System GND
3 Digital input 1 IN 4 Digital input common 1 IN
5 Digital input 2 IN 6 Digital input common 2 IN
7 Digital input 3 IN 8 Digital input common 3 IN
9 Digital input 4 IN 10 Digital input common 4 IN
11 Digital output 1 OUT 12 Digital output common 1 OUT
13 Digital output 2 OUT 14 Digital output common 2 OUT
15 Digital output 3 OUT 16 Digital output common 3 OUT
17 Digital output 4 OUT 18 Digital output common 4 OUT
19 Trigger input 1 IN 20 Trigger input common 1 IN
21 Trigger input 2 IN 22 Trigger input common 2 IN
23 Trigger input 3 IN 24 Trigger input common 3 IN
25 Trigger input 4 IN 26 Trigger input common 4 IN
27 Trigger output 1 OUT 28 Trigger output 2 OUT
29 Trigger output 3 OUT 30 Trigger output 4 OUT
31 Frame GND 32 Frame GND
33 Frame GND 34 Frame GND
Table 2-6: GPIO & Trigger

Hardware Reference 9
Digital Input Circuit
Digital Output Circuit
Trigger Input Circuit
Trigger Output Circuit

10 Hardware Reference
Function Electronic Specification
Isolated Digital Input Photo Coupled Input x 4 ch
Input voltage range 0 to 25 V
Low level 0 to 0.5 V
High Level 2 to 25 V
Isolated Digital Output Photo Coupled Output x 4 ch
Load voltage range 3 to 24 V
Output sink current 80 mA (Max)
Output voltage drop 1.0 V (Max)
Leak current 0.1 mA (Max)
Reverse voltage -6 V
Isolated Trigger Input Photo Coupled Trigger input x 4 ch
Input voltage range 0 to 25 V
Low level 0 to 0.5 V
High level 2.4 to 25 V
Polarity Positive / Negative Selectable
Minimum pulse width 0.1 msec
Isolated Trigger out Photo Coupled Trigger output x 4 ch
Load voltage range 0 to 5 V
Output sink current 40 mA (Max)
Output voltage drop 0.4 V Max (@16 mA)
Trigger Out Control
Trigger delay 0 msec to 1000 msec selectable (1 msec step.)
Trigger out pulse width 0.1 msec to 50 msec selectable (0.1 msec step)
Polarity Positive / Negative Selectable
Enable Control Enable/Disable
Table 2-7: Specifications

Hardware Reference 11
Trigger Control Timing Chart
Trigger Busy Control
Symbol Characteristic Specification
T1 Trigger input pulse width 0.1 msec (min.)
T2 Trigger delay 0 to 1000 msec selectable (1 msec step)
Actual delay = Selected delay time
T3 Output trigger pulse width 0.1 to 50 msec selectable (0.1 msec step)
Table 2-8: Trigger Control Timing
Symbol Characteristic Specification
T4 Trigger busy timer
T3 + 0.1 msec.
The busy flat is set and the trigger busy
timer starts counting when the Trigger In
signal is detected.
The Trigger Busy flag is reset when the
trigger busy timer is done counting
When the Trigger Busy flag is set, the Trig-
ger In signal is ignored.