Analog Devices SSM2304 Series User manual

2 W Filterless Class-D
Stereo Audio Amplifier
SSM2304
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.
FEATURES
Filterless Class-D amplifier with built-in output stage
2 W into 4 Ω and 1.4 W into 8 Ω at 5.0 V supply with <10% THD
85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 98 dB SNR (signal-to-noise ratio)
Available in 16-lead, 3 mm × 3 mm LFCSP
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 18 dB gain and user-adjustable
APPLICATIONS
Notebooks and PCs
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2304 is a fully integrated, high efficiency, Class-D stereo
audio amplifier. It is designed to maximize performance for
portable applications. The application circuit requires a mini-
mum of external components and operates from a single 2.5 V
to 5.0 V supply. It is capable of delivering 2 W of continuous
output power with less than 10% THD + N driving a 4 Ω load
from a 5.0 V supply.
The SSM2304 features a high efficiency, low noise modulation
scheme. It operates with 85% efficiency at 1.4 W into 8 Ω from a
5.0 V supply and has a signal-to-noise ratio (SNR) that is better
than 98 dB. PDM modulation is used to provide lower EMI-
radiated emissions compared with other Class-D architectures.
The SSM2304 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The architecture of the device allows it to achieve a very low level
of pop and click. This minimizes voltage glitches at the output
during turn-on and turn-off, thus reducing audible noise on
activation and deactivation.
The fully differential input of the SSM2304 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The SSM2304 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification.
The SSM2304 has a preset gain of 18 dB, which can be reduced
by using external resistors.
The SSM2304 is specified over the commercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 16-lead, 3 mm × 3 mm
lead-frame chip scale package (LFCSP).
FUNCTIONAL BLOCK DIAGRAM
FET
DRIVER
MODULATOR
0.1µF
VDDVDD
INTERNAL
OSCILLATOR
OUTR+
OUTR–
OUTL+
OUTL–
BIAS
FET
DRIVER
MODULATOR
INR+
VBATT
2.5V TO 5.0V
INR–
SHUTDOWN
INL+
INL–
GNDGND
10µF
22nF
1
1
INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY V
DD
/2.
22nF
1
300kΩ
300kΩ
GAIN = 300kΩ/(47kΩ+ Rext)
47kΩ
47kΩ
47kΩ
47kΩ
Rext
Rext
Rext
Rext
300kΩ
300kΩ
22nF
1
22nF
1
SD
LEFT IN+
LEFT IN–
RIGHT IN–
RIGHT IN+
SSM2304
06162-001
Figure 1.
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SSM2304
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TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Typical Application Circuits.......................................................... 12
Application Notes ........................................................................... 13
Overview...................................................................................... 13
Gain Selection............................................................................. 13
Pop-and-Click Suppression ...................................................... 13
EMI Noise.................................................................................... 13
Layout .......................................................................................... 14
Input Capacitor Selection.......................................................... 14
Proper Power Supply Decoupling ............................................ 14
Evaluation Board Information...................................................... 15
Introduction................................................................................ 15
Board Description...................................................................... 15
Getting Started............................................................................ 18
What to Test ................................................................................ 18
PCB Layout Guidelines.............................................................. 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
12/06—Revision 0: Initial Version
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SSM2304
Rev. 0 | Page 3 of 20
SPECIFICATIONS
VDD = 5.0 V; TA= 25oC; RL= 4 Ω, 8 Ω; gain = 18 dB; unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
DEVICE CHARACTERISTICS
Output Power PORL= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.8 W
R
L= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.4 W
R
L= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.9 W
R
L= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.615 W
R
L= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.35 W
R
L= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.275 W
R
L= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 2.4 W
R
L= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.53 W
R
L= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.1 W
R
L= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.77 W
R
L= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.45 W
R
L= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.35 W
Efficiency η POUT = 2 W, 4 Ω, VDD = 5.0 V 75 %
P
OUT = 1.4 W, 8 Ω, VDD = 5.0 V 85 %
Total Harmonic Distortion + Noise THD + N PO= 2 W into 4 Ω each channel, f = 1 kHz, VDD = 5.0 V 0.2 %
P
O= 1 W into 8 Ω each channel, f = 1 kHz, VDD = 3.6 V 0.25 %
Input Common-Mode Voltage Range VCM 1.0 VDD − 1 V
Common-Mode Rejection Ratio CMRRGSM VCM = 2.5 V ± 100 mV at 217 Hz 60 dB
Channel Separation XTALK PO= 100 mW , f = 1 kHz 78 dB
Average Switching Frequency fSW 1.8 MHz
Differential Output Offset Voltage VOOS 2.0 mV
POWER SUPPLY
Supply Voltage Range VDD Guaranteed from PSRR test 2.5 5.0 V
Power Supply Rejection Ratio PSRR VDD = 2.5 V to 5.0 V, 70 85 dB
PSRRGSM VRIPPLE = 100 mV rms at 217 Hz, inputs ac GND,
CIN = 0.01 μF, input referred
68 dB
Supply Current ISY VIN = 0 V, no load, VDD = 5.0 V 7.0 mA
V
IN = 0 V, no load, VDD = 3.6 V 6.5 mA
V
IN = 0 V, no load, VDD = 2.5 V 5.2 mA
Shutdown Current ISD SD = GND 20 nA
GAIN
Closed-Loop Gain Av Rext = 0 18 dB
Differential Input Impedance ZIN SD = VDD 47 kΩ
SHUTDOWN CONTROL
Input Voltage High VIH ISY ≥ 1 mA 1.2 V
Input Voltage Low VIL ISY ≤ 300 nA 0.5 V
Turn-On Time tWU SD rising edge from GND to VDD 30 ms
Turn-Off Time tSD SD falling edge from VDD to GND 5 μs
Output Impedance ZOUT SD = GND >100 kΩ
NOISE PERFORMANCE
Output Voltage Noise en VDD = 3.6 V, f = 20 Hz to 20 kHz, inputs are ac
grounded, AV= 6 dB, RL= 4 Ω, A weighting
22 μV
Signal-to-Noise Ratio SNR POUT = 2.0 W, RL= 4 Ω 102 dB
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SSM2304
Rev. 0 | Page 4 of 20
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter Rating
Supply Voltage 6 V
Input Voltage VDD
Common-Mode Input Voltage VDD
ESD Susceptibility 4 kV
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature Range
(Soldering, 60 sec)
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA θJC Unit
16-lead, 3 mm × 3 mm LFCSP 44 31.5 °C/W
ESD CAUTION
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SSM2304
Rev. 0 | Page 5 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
NC = NO CONNECT
1OUTL+
2OUTL–
3SD
4INL+
11 OUTR–
12 OUTR+
10 NC
9INR+
5
INL–
6
NC
7
NC
8
INR–
15 VDD
16 GND
14 VDD
13 GND
TOP VIEW
(Not to Scale)
SSM2304
0
6162-002
Figure 2. SSM2304 LFCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 OUTL+ Inverting Output for Left Channel.
2 OUTL− Noninverting Output for Left Channel.
3 SD Shutdown Input. Active low digital input.
4 INL+ Noninverting Input for Left Channel.
5 INL− Inverting Input for Left Channel.
6 NC No Connect.
7 NC No Connect.
8 INR− Inverting Input for Right Channel.
9 INR+ Noninverting Input for Right Channel.
10 NC No Connect
11 OUTR− Noninverting Output for Right Channel.
12 OUTR+ Inverting Output for Right Channel.
13 GND Ground for Output Amplifiers.
14 VDD Power Supply for Output Amplifiers.
15 VDD Power Supply for Output Amplifiers.
16 GND Ground for Output Amplifiers.
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SSM2304
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TYPICAL PERFORMANCE CHARACTERISTICS
100
0.001
0.01
0.00010.00001 10
OUTPUT POWER (W)
THD + N (%)
10
1
0.1
0.001 0.01 0.1 1
06162-020
V
DD
= 3.6V
V
DD
= 5V
V
DD
= 2.5V
R
L
= 4Ω, 33µH
GAIN = 18dB
Figure 3. THD + N vs. Output Power into 4 Ω, AV= 18 dB
100
0.001
0.01
0.000001 0.00010.00001 10
OUTPUT POWER (W)
THD + N (%)
10
1
0.1
0.001 0.01 0.1 1
06162-003
VDD = 3.6V
VDD = 5V
VDD = 2.5V
RL= 8Ω, 33µH
GAIN = 18dB
Figure 4. THD + N vs. Output Power into 8 Ω, AV= 18 dB
100
0.01
0.0000001
0.000001 0.0001
0.00001 10
OUTPUT POWER (W)
THD + N (%)
10
1
0.1
0.001
0.01
0.1
1
R
L
= 4Ω, 33µH
GAIN = 6dB
V
DD
= 2.5V
V
DD
= 3.6V
V
DD
= 5V
06162-021
Figure 5. THD + N vs. Output Power into 4 Ω, AV= 6 dB
100
0.001
0.01
0.000010.0000001 10
OUTPUT POWER (W)
THD + N (%)
10
1
0.1
0.001 0.1
06162-004
V
DD
= 5V
V
DD
= 2.5V
R
L
= 8Ω, 33µH
GAIN = 6dB
V
DD
= 3.6V
Figure 6. THD + N vs. Output Power into 8 Ω, AV= 6 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
V
DD
= 5V
R
L
= 8Ω, 33µH
GAIN = 6dB
0.5W
0.25W
1W
10
1
0.1
0.01
0.001
100 1k 10k
06162-005
Figure 7. THD + N vs. Frequency, VDD = 5 V, RL= 8 Ω, AV= 6 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
V
DD
= 3.6V
R
L
= 8Ω, 33µH
GAIN = 6dB
0.125W 0.25W
0.5W
10
1
0.1
0.01
0.001
100 1k 10k
06162-006
Figure 8. THD + N vs. Frequency, VDD = 3.6 V, RL= 8 Ω, AV= 6 dB
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SSM2304
Rev. 0 | Page 7 of 20
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
V
DD
= 2.5V
R
L
= 8Ω, 33µH
GAIN = 6dB
0.075W
0.125W
0.25W
10
1
0.1
0.01
0.001
100 1k 10k
06162-007
Figure 9. THD + N vs. Frequency, VDD = 2.5 V, RL= 8 Ω, AV= 6 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 5V
RL= 4Ω, 33µH
GAIN = 6dB
0.5W
1W
10
1
0.1
0.01
0.001
100 1k 10k
06162-022
2W
Figure 10. THD + N vs. Frequency, VDD = 5 V, RL= 4 Ω, AV= 6 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 3.6V
RL= 4Ω, 33µH
GAIN = 6dB
0.25W
0.5W
10
1
0.1
0.01
0.001
100 1k 10k
06162-023
1W
Figure 11. THD + N vs. Frequency, VDD = 3.6 V, RL= 4 Ω, AV= 6 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 2.5V
RL= 4Ω, 33µH
GAIN = 6dB
0.25W
0.125W
10
1
0.1
0.01
0.001
100 1k 10k
06162-024
0.5W
Figure 12. THD + N vs. Frequency, VDD = 2.5 V, RL= 4 Ω, AV= 6 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 5V
RL= 8Ω, 33µH
GAIN = 18dB
0.5W
0.25W
10
1
0.1
0.01
0.001
100 1k 10k
06162-025
1W
Figure 13. THD + N vs. Frequency, VDD = 5 V, RL= 8 Ω, AV= 18 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 3.6V
RL= 8Ω, 33µH
GAIN = 18dB
0.25W
0.125W
10
1
0.1
0.01
0.001
100 1k 10k
06162-026
0.5W
Figure 14. THD + N vs. Frequency, VDD = 3.6 V, RL= 8 Ω, AV= 18 dB
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SSM2304
Rev. 0 | Page 8 of 20
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 2.5V
RL= 8Ω, 33µH
GAIN = 18dB
0.125W
0.075W
10
1
0.1
0.01
0.001
100 1k 10k
06162-027
0.25W
Figure 15. THD + N vs. Frequency, VDD = 2.5 V, RL= 8 Ω, AV= 18 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 5V
RL= 4Ω, 33µH
GAIN = 18dB
1W
0.5W
10
1
0.1
0.01
0.001
100 1k 10k
06162-028
2W
Figure 16. THD + N vs. Frequency, VDD = 5 V, RL= 4 Ω, AV= 18 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 3.6V
RL= 4Ω, 33µH
GAIN = 18dB
0.5W
0.25W
10
1
0.1
0.01
0.001
100 1k 10k
06162-029
1W
Figure 17. THD + N vs. Frequency, VDD = 3.6 V, RL= 4 Ω, AV = 18 dB
100
0.0001
20 20k
FREQUENCY (Hz)
THD + N (%)
VDD = 2.5V
RL= 4Ω, 33µH
GAIN = 18dB
0.25W
0.125W
10
1
0.1
0.01
0.001
100 1k 10k
06162-041
0.5W
Figure 18. THD + N vs. Frequency, VDD = 2.5 V, RL= 4 Ω, AV= 18 dB
9
0
2.5 5.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
8
7
6
5
4
3
2
1
3.0 3.5 4.0 4.5 5.0
06162-008
Figure 19. Supply Current vs. Supply Voltage, No Load
12
0
00
SHUTDOWN VOLTAGE (V)
SHUTDOWN CURRENT (µA)
.8
10
8
6
4
2
0.1 0.2 0.3 0.4 0.5 0.6 0.7
VDD = 2.5V
VDD = 3.6V
VDD = 5V
06162-009
Figure 20. Supply Current vs. Shutdown Voltage
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SSM2304
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1.8
1.6
0
3.6 5.0
10%
1%
4.84.64.44.24.03.8
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
06162-010
f = 1kHz
GAIN = 6dB
R
L
= 8Ω, 15µH
Figure 21. Maximum Output Power vs. Supply Voltage, RL= 8 Ω, AV= 6 dB
3.0
2.5
2.0
1.5
1.0
0.5
0
3.6 5.0
10%
1%
4.84.64.44.24.03.8
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
06162-060
f = 1kHz
GAIN = 6dB
R
L
= 4Ω, 15µH
Figure 22. Maximum Output Power vs. Supply Voltage, RL= 4 Ω, AV= 6 dB
1.8
1.2
1.6
1.4
1.0
0.8
0.6
0.4
0.2
0
3.6 5.0
10%
1%
4.84.64.44.24.03.8
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
06162-061
f= 1kHz
GAIN = 18dB
R
L= 8Ω, 15µH
Figure 23. Maximum Output Power vs. Supply Voltage, RL= 8 Ω, AV= 18 dB
3.0
2.5
2.0
1.5
1.0
0.5
0
3.6 5.0
10%
1%
4.84.64.44.24.03.8
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
06162-062
f= 1kHz
GAIN = 18dB
R
L= 4Ω, 15µH
Figure 24. Maximum Output Power vs. Supply Voltage, RL= 4 Ω, AV= 18 dB
100
0
0
2.1
OUTPUT POWER (W)
EFFICIENCY (%)
RL= 4Ω, 15µH
90
80
70
60
50
40
30
20
10
0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9
0.2 0.60.4 0.8 1.0 1.2 1.4 1.6 2.01.8
VDD = 2.5V
VDD = 3.6V
VDD = 5V
06162-042
Figure 25. Efficiency vs. Output Power into 4 Ω
100
0
02
OUTPUT POWER (W)
EFFICIENCY (%)
.0
RL= 8Ω, 15µH
90
80
70
60
50
40
30
20
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VDD = 2.5V
VDD = 3.6V
VDD = 5V
06162-011
Figure 26. Efficiency vs. Output Power into 8 Ω
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SSM2304
Rev. 0 | Page 10 of 20
1.0
0
00
.8
3.0
2.5
2.0
1.5
1.0
0.5
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
OUTPUT POWER (W)
POWER DISSIPATION (W)
06162-063
VDD = 5V
RL= 4Ω, 15µH
OUTPUT POWER (W)
POWER DISSIPATION (W)
VDD = 3.6V
RL= 8Ω, 33µH
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.1 0.2 0.3 0.4 0.5 0.6 0.7
06162-012
Figure 27. Power Dissipation vs. Output Power at VDD = 3.6 V, RL= 8 Ω
1.8
0
01
.3
OUTPUT POWER (W)
POWER DISSIPATION (W)
VDD = 5V
RL= 8Ω, 33µH
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
06162-013
Figure 28. Power Dissipation vs. Output Power at VDD = 5.0 V, RL= 8 Ω
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
OUTPUT POWER (W)
POWER DISSIPATION (W)
06162-064
VDD = 3.6V
RL= 4Ω, 15µH
Figure 29. Power Dissipation vs. Output Power at VDD = 3.6 V, RL= 4 Ω
Figure 30. Power Dissipation vs. Output Power at VDD = 5.0 V, RL= 8 Ω
400
0
01.6
OUTPUT POWER (W)
SUPPLY CURRENT (mA)
VDD = 3.6V
VDD = 2.5V
VDD = 5V
350
300
250
200
150
100
50
0.2 0.4 0.6 0.8 1.0 1.2 1.4
RL= 8Ω, 33µH
06162-014
Figure 31. Output Power vs. Supply Current, One Channel
0
–100
10 100k
FREQUENCY (Hz)
PSRR (dB)
–10
–20
–30
–40
–50
–60
–70
–80
–90
100 1k 10k
06162-015
Figure 32. Power Supply Rejection Ratio vs. Frequency
OBSOLETE