Analog Devices SSM2319 User manual

Filterless, High Efficiency,
Mono 3 W Class-D Audio Amplifier
SSM2319
Rev. 0
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Tel: [phone] www.analog.com
Fax: [phone] ©2008 Analog Devices, Inc. All rights reserved.
FEATURES
Filterless Class-D amplifier with ultraefficient spread-
spectrum Σ-Δ modulation
Internal modulator synchronization (SYNC)
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion (THD)
90% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Signal-to-noise ratio (SNR): 98 dB
Single-supply operation: 2.5 V to 5.5 V
Ultralow shutdown current: 20 nA
Short-circuit and thermal protection with autorecovery
Available in 9-ball, 1.5 mm × 1.5 mm WLCSP
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 12 dB or user-adjustable gain setting
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2319 is a fully integrated, high efficiency Class-D
audio amplifier. It is designed to maximize performance for
mobile phone applications. The application circuit requires a
minimum of external components and operates from a single
2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous
output power with <1% THD + N driving a 3 Ω load from a
5.0 V supply.
The SSM2319 features a high efficiency, low noise modulation
scheme that does not require any external LC output filters. The
modulation continues to provide high efficiency even at low output
power. It operates with 90% efficiency at 1.4 W into 8 Ω or 85%
efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR
of 98 dB. Spread-spectrum pulse density modulation is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures.
SYNC can be activated in the event that end users are concerned
about clock intermodulation (beating effect) of several amplifiers in
close proximity.
The SSM2319 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The device also includes pop-and-click suppression circuitry.
This minimizes voltage glitches at the output during turn-on and
turn-off, reducing audible noise on activation and deactivation.
The default gain of the SSM2319 is 12 dB, but users can reduce
the gain by using a pair of external resistors (see the Gain section).
The SSM2319 is specified over the industrial temperature range
of −40°C to +85°C. It has built-in thermal shutdown and output
short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm
wafer level chip scale package (WLCSP).
FUNCTIONAL BLOCK DIAGRAM
S
HUTDOWN
0.1µF
VDD
POP/CLICK
SUPPRESSION
OUT+
OUT–
IN–
VBATT
2.5V TO 5.5V
IN+ MODULATOR
(Σ-Δ)
GND
SYNC OUTPUT
10µF
0.1µF*
*INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
0.1µF*
SD
AUDIO IN+
AUDIO IN–
SSM2319
40kΩ
160kΩ
160kΩ
40kΩFET
DRIVER
BIAS INTERNAL
OSCILLATOR
07550-001
SYNCI
SYNCO
SYNC INPUT
SYNC
Figure 1.

SSM2319* PRODUCT PAGE QUICK LINKS
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DOCUMENTATION
Data Sheet
•SSM2319: Filterless, High Efficiency, Mono 3 W Class-D
Audio Amplifier Data Sheet
DESIGN RESOURCES
•ssm2319 Material Declaration
•PCN-PDN Information
•Quality And Reliability
•Symbols and Footprints
DISCUSSIONS
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SSM2319
Rev. 0 | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Typical Application Circuits.......................................................... 12
Theory of Operation ...................................................................... 14
Overview ..................................................................................... 14
Gain.............................................................................................. 14
Pop-and-Click Suppression ...................................................... 14
Output Modulation Description .............................................. 14
Layout .......................................................................................... 15
Input Capacitor Selection.......................................................... 15
Power Supply Decoupling ......................................................... 15
Syncronization (SYNC) Operation.......................................... 15
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
8/08—Revision 0: Initial Version

SSM2319
Rev. 0 | Page 3 of 20
SPECIFICATIONS
VDD = 5.0 V, TA= 25oC, RL= 8 Ω +33 μH, SYNCI = GND (standalone mode), unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
DEVICE CHARACTERISTICS
Output Power POUT RL= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.41 W
R
L= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.72 W
R
L= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.33 W
R
L= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.77 W
R
L= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.91 W
R
L= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.42 W
R
L= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 2.53 W
R
L= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.28 W
R
L= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.56 W
R
L= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 3.171W
R
L= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.6 W
R
L= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.72 W
R
L= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 3.11
W
R
L= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.52 W
R
L= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.68 W
R
L= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 3.71
W
R
L= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.9 W
R
L= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.85 W
Efficiency η POUT = 1.4 W, 8 Ω, VDD = 5.0 V 93 %
Total Harmonic Distortion + Noise THD + N POUT = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V 0.06 %
P
OUT = 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V 0.02 %
Input Common-Mode Voltage Range VCM 1.0 VDD − 1 V
Common-Mode Rejection Ratio CMRRGSM VCM = 2.5 V ± 100 mV at 217 Hz, output referred 57 dB
Average Switching Frequency fSW 300 kHz
Differential Output Offset Voltage VOOS G = 12 dB 2.0 mV
POWER SUPPLY
Supply Voltage Range VDD Guaranteed from PSRR test 2.5 5.5 V
Power Supply Rejection Ratio PSRR VDD = 2.5 V to 5.0 V, dc input floating/ground 70 85 dB
PSRRGSM VRIPPLE = 100 mV at 217 Hz, inputs ac GND, CIN = 0.1 μF 60 dB
Supply Current ISY VIN = 0 V, no load, VDD = 5.0 V 3.6 mA
V
IN = 0 V, no load, VDD = 3.6 V 3.2 mA
V
IN = 0 V, no load, VDD = 2.5 V 2.7 mA
V
IN = 0 V, load = 8 Ω + 33 μH, VDD = 5.0 V 3.7 mA
V
IN = 0 V, load = 8 Ω + 33 μH, VDD = 3.6 V 3.3 mA
V
IN = 0 V, load = 8 Ω + 33 μH, VDD = 2.5 V 2.8 mA
Shutdown Current ISD SD = GND 20 nA
GAIN CONTROL
Closed-Loop Gain Av 12 dB
Differential Input Impedance ZIN SD = VDD 40 kΩ
SHUTDOWN CONTROL
Input Voltage High VIH ISY ≥ 1 mA 1.2 V
Input Voltage Low VIL ISY ≤ 300 nA 0.5 V
Turn-On Time tWU SD rising edge from GND to VDD 28 ms
Turn-Off Time tSD SD falling edge from VDD to GND 5 μs
Output Impedance ZOUT SD = GND >100 kΩ

SSM2319
Rev. 0 | Page 4 of 20
Parameter Symbol Conditions Min Typ Max Unit
NOISE PERFORMANCE
Output Voltage Noise enVDD = 3.6 V, f = 20 Hz to 20 kHz, inputs are ac grounded,
AV= 12 dB, A weighting
40 μV
Signal-to-Noise Ratio SNR POUT = 1.4 W, RL= 8 Ω 98 dB
SYNC OPERATIONAL FREQUENCY 5 12 MHz
1Although the SSM2319 has good audio quality above 3 W, continuous output power beyond 3 W must be avoided due to device packaging limitations.

SSM2319
Rev. 0 | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter Rating
Supply Voltage 6 V
Input Voltage VDD
Common-Mode Input Voltage VDD
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature (Soldering, 60 sec) 300°C
ESD Susceptibility 4 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3.
Package Type PCB θJA θ
JB Unit
9-Ball, 1.5 mm × 1.5 mm WLCSP 1S0P 162 39 °C/W
2S0P 76 21 °C/W
ESD CAUTION

SSM2319
Rev. 0 | Page 6 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SSM2319
TOP VIEW
BALL SIDE DOWN
(Not to Scale)
BALL A1
CORNER
A
321
B
C
07550-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1A IN− Inverting Input.
1B IN+ Noninverting Input.
1C GND Ground.
2A SD Shutdown Input. Active low digital input.
2B SYNCI SYNC Input.
2C VDD Power Supply.
3A SYNCO SYNC Output.
3B OUT− Inverting Output.
3C OUT+ Noninverting Output.

SSM2319
Rev. 0 | Page 7 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-006
FREQUENCY (Hz)
THD + N (%)
R
L
= 8Ω+ 33µH
GAIN = 12dB
V
DD
= 5V
1W
0.5W
0.25W
VDD = 2.5V
VDD = 3.6V
VDD = 5V
0.001
0.01
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10
0
7550-003
OUTPUT POWER (W)
THD + N (%)
RL= 8Ω+ 33µH
GAIN = 12dB
Figure 3. THD + N vs. Output Power into RL= 8 Ω + 33 μH, Gain = 12 dB Figure 6. THD + N vs. Frequency, RL= 8 Ω + 33 μH, Gain = 12 dB, VDD = 5 V
V
DD
= 2.5V
V
DD
= 3.6V
V
DD
= 5V
0.001
0.01
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10
07550-004
OUTPUT POWER (W)
THD + N (%)
R
L
= 4Ω+ 33µH
GAIN = 12dB
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-007
FREQUENCY (Hz)
THD + N (%)
R
L
= 4Ω+ 33µH
GAIN = 12dB
V
DD
= 5V
1W
0.5W
2W
Figure 4. THD + N vs. Output Power into RL= 4 Ω + 33 μH, Gain = 12 dB Figure 7. THD + N vs. Frequency, RL= 4 Ω + 33 μH, Gain = 12 dB, VDD = 5 V
V
DD
= 2.5V
V
DD
= 3.6V
V
DD
= 5V
0.01
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10
0
7550-005
OUTPUT POWER (W)
THD + N (%)
R
L
= 3Ω+ 33µH
GAIN = 12dB
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-008
FREQUENCY (Hz)
THD + N (%)
R
L
= 3Ω+ 33µH
GAIN = 12dB
V
DD
= 5V
1.5W
0.75W
3W
Figure 5. THD + N vs. Output Power into RL= 3 Ω + 33 μH, Gain = 12 dB
Figure 8. THD + N vs. Frequency, RL= 3Ω + 33 μH, Gain = 12 dB, VDD = 5 V

SSM2319
Rev. 0 | Page 8 of 20
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-009
FREQUENCY (Hz)
THD + N (%)
R
L
= 8Ω+ 33µH
GAIN = 12dB
V
DD
= 3.6V
0.25W
0.125W
0.5W
Figure 9. THD + N vs. Frequency, RL= 8 Ω + 33 μH, Gain = 12 dB, VDD = 3.6 V
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-010
FREQUENCY (Hz)
THD + N (%)
R
L
= 4Ω+ 33µH
GAIN = 12dB
V
DD
= 3.6V
1W
0.5W
0.25W
Figure 10. THD + N vs. Frequency, RL= 4 Ω + 33 μH, Gain = 12 dB, VDD = 3.6 V
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-011
FREQUENCY (Hz)
THD + N (%)
R
L
= 3Ω+ 33µH
GAIN = 12dB
V
DD
= 3.6V
0.75W
0.38W
1.5W
Figure 11. THD + N vs. Frequency, RL= 3 Ω + 33 μH, Gain = 12 dB, VDD = 3.6 V
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-012
FREQUENCY (Hz)
THD + N (%)
R
L
= 8Ω+ 33µH
GAIN = 12dB
V
DD
= 2.5V
0.125W
0.0625W
0.25W
Figure 12. THD + N vs. Frequency, RL= 8 Ω + 33 μH, Gain = 12 dB, VDD = 2.5 V
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-013
FREQUENCY (Hz)
THD + N (%)
R
L
= 4Ω+ 33µH
GAIN = 12dB
V
DD
= 2.5V
0.25W
0.125W
0.5W
Figure 13. THD + N vs. Frequency, RL= 4 Ω + 33 μH, Gain = 12 dB, VDD = 2.5 V
10 100 1k 10k 100k
0.001
0.01
0.1
1
10
100
07550-014
FREQUENCY (Hz)
THD + N (%)
R
L
= 3Ω+ 33µH
GAIN = 12dB
V
DD
= 2.5V
0.38W
0.2W
0.75W
Figure 14. THD + N vs. Frequency, RL= 3 Ω + 33 μH, Gain = 12 dB, VDD = 2.5 V

SSM2319
Rev. 0 | Page 9 of 20
NO LOAD
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
2.5 3.0 3.5 4.0 4.5 5.0 5.5
07550-015
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
R
L
= 8Ω+ 33µH
R
L
= 3Ω+ 33µH
R
L
= 4Ω+ 33µH
Figure 15. Supply Current vs. Supply Voltage
2.5 3.0 3.5 4.0 4.5 5.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
10%
1%
R
L
= 3Ω+ 33µH
GAIN = 12dB
f = 1kHz
07550-016
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
DO NOT EXCEED 3W
CONTINUOUS OUTPUT POWER
Figure 16. Maximum Output Power vs. Supply Voltage,
RL= 3 Ω + 33 μH, Gain = 12 dB
2.53.03.54.04.55.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
10%
1%
R
L
= 4Ω+ 33µH
GAIN = 12dB
f = 1kHz
DO NOT EXCEED 3W
CONTINUOUS OUTPUT POWER
07550-017
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
Figure 17. Maximum Output Power vs. Supply Voltage,
RL= 4 Ω + 33 μH, Gain = 12 dB
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.53.03.54.04.55.0
10%
1%
R
L
= 8Ω+ 33µH
GAIN = 12dB
f = 1kHz
0
7550-018
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
Figure 18. Maximum Output Power vs. Supply Voltage,
RL= 8 Ω + 33 μH, Gain = 12 dB
0
10
20
30
40
50
60
70
80
90
100
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
V
DD
= 5V
R
L
= 8Ω+ 33µH
07550-019
OUTPUT POWER (W)
EFFICIENCY (%)
V
DD
= 3.6V
V
DD
= 2.5V
Figure 19. Efficiency vs. Output Power into RL= 8 Ω + 33 μH
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
0
10
20
30
40
50
60
70
80
90
100
V
DD
= 5V
R
L
= 4Ω+ 33µH
07550-020
OUTPUT POWER (W)
EFFICIENCY (%)
V
DD
= 3.6V
V
DD
= 2.5V
Figure 20. Efficiency vs. Output Power into RL= 4 Ω + 33 μH