Analog Devices EVAL-ADGM1144SDZ User manual

User Guide | EVAL-ADGM1144
UG-2056
Evaluating the ADGM1144 0 Hz/DC to 18 GHz, SP4T, MEMS Switch
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | 1 of 18
FEATURES
►Single-supply voltage: 3.3 V
►Wide frequency range: DC to 18 GHz
►SMA connectors for RF signals
►Parallel interface and SPI
►On-board calibration thru transmission line for analyzer calibra-
tion
EVALUATION KIT CONTENTS
►EVAL-ADGM1144SDZ evaluation board
ADDITIONAL EQUIPMENT NEEDED
►3.3 V DC power supply
►Vector network analyzer (VNA)
►EVAL-SDP-CB1Z (SDP-B) controller board
►Analysis | Control | Evaluation (ACE) Software with EVAL-
ADGM1144SDZ plugin
GENERAL DESCRIPTION
This user guide describes the EVAL-ADGM1144SDZ for the
ADGM1144, a dual-chip, RF switching solution containing a single-
pole, four-throw (SP4T), microelectromechanical systems (MEMS)
switch, and a control chip copackaged in a compact, 5.00 mm ×
4.00 mm × 1.0 mm, LGA package.
The SP4T switch uses Analog Devices, Inc., MEMS switch tech-
nology, providing optimum performance in terms of bandwidth,
power handling capability, and linearity for RF applications. The
control chip generates the high-voltage signals needed for the
MEMS switch and allows the user to control its operation through
a simple and flexible complementary metal-oxide semiconductor
(CMOS)/low voltage transistor to transistor logic (LVTTL)-compliant
parallel-interface as well as through a serial-peripheral interface
(SPI). It is possible to daisy-chain multiple ADGM1144 devices
together to enable the configuration of multiple devices with a
minimal number of digital lines.
For SPI, the EVAL-ADGM1144SDZ connects to the USB port of
a PC via the SDP board. The EVAL-SDP-CB1Z board (SDP-B con-
troller board) is available to order at the Analog Devices website.
The EVAL-ADGM1144SDZ comes fitted with connectors for RF and
control signals as well as links to control the operation of the switch
and evaluate its performance.
For full details on the ADGM1144, see the ADGM1144 data sheet,
which must be consulted in conjunction with this user guide when
using the EVAL-ADGM1144SDZ.
EVAL-ADGM1144SDZ PHOTOGRAPH
Figure 1.

User Guide EVAL-ADGM1144
TABLE OF CONTENTS
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Features................................................................ 1
Evaluation Kit Contents......................................... 1
Additional Equipment Needed............................... 1
General Description...............................................1
EVAL-ADGM1144SDZ Photograph....................... 1
Evaluation Board Hardware...................................3
Power Supply..................................................... 3
RF Connectors................................................... 3
Switch Control Connectors.................................3
Evaluation Board Software for the SPI.................. 5
Installing the Software........................................5
Initial Setup.........................................................5
EVAL-ADGM1144SDZ Block Diagram and
Descriptions.........................................................6
Memory Map...................................................... 7
Measuring Switch Performance.............................8
Network Analyzer Calibration Procedure.............10
Handling Guidelines.............................................11
Layout Recommendations...................................12
Soldering Recommendations.............................. 13
Evaluation Board Schematics and Artwork......... 14
Ordering Information............................................18
Bill of Materials.................................................18
REVISION HISTORY
10/2022—Revision 0: Initial Version

User Guide EVAL-ADGM1144
EVALUATION BOARD HARDWARE
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The EVAL-ADGM1144SDZ evaluation kit contains a fully fitted
printed circuit board (PCB).
The EVAL-ADGM1144SDZ allows the user to connect RF signals
to the MEMS switch. The user controls the switch operation using
the on-board links or by applying the correct control signals to the
appropriate connectors.
The EVAL-ADGM1144SDZ provides an additional transmission line
to facilitate the calibration of the network analyzer to minimize the
effects of the PCB tracks that connect the RF signals to the MEMS
switch. See the Network Analyzer Calibration Procedure section for
more information on the calibration process.
POWER SUPPLY
To operate the EVAL-ADGM1144SDZ, the user must provide an
external power supply either through a Mini-USB connector (M1)
or through the power block (P7). When JP7 is in the A position,
the EVAL-ADGM1144SDZ is powered by the Mini-USB connector,
and when JP7 is in the B position, the EVAL-ADGM1144SDZ is
powered by the external 3.3 V power supply through the power
block (see Table 1). The power-supply voltage required for the
EVAL-ADGM1144SDZ is 3.3 V, and it must be positive with respect
to the ground of the EVAL-ADGM1144SDZ. The ground of the
EVAL-ADGM1144SDZ is marked with GND on the silkscreen (see
Figure 24).
Table 1. JP7 Link Position
Position Power Supply Selection
A EVAL-ADGM1144SDZ powered by the Mini-USB
B EVAL-ADGM1144SDZ powered by the external 3.3 V power
supply
RF CONNECTORS
The 3.5 mm end launch connectors on the EVAL-ADGM1144SDZ
(RF1, RF2, RF3, RF4, and RFC) connect to each switch in
the ADGM1144 for performance evaluation purposes. The RFC1
and RFC2 connectors connect to a transmission line to estimate
the loss associated with the PCB (see the Measuring Switch Per-
formance section). Table 2 describes the RF connectors to the
ADGM1144.
Table 2. Connecting the RF Connectors to the ADGM1144
Connector Description
RF1 Port RF1 of the ADGM1144
RF2 Port RF2 of the ADGM1144
RF3 Port RF3 of the ADGM1144
RF4 Port RF4 of the ADGM1144
RFC Common RF port of the ADGM1144
RFC1, RFC2 Calibration thru transmission lines used for calibration
SWITCH CONTROL CONNECTORS
The ADGM1144 comes with a standard LVTTL parallel-interface
consisting of four input pins (IN1, IN2, IN3, and IN4) controlled by
the P1, P2, P3, and P4 links. See Table 5 for more details on the
logic control when using the parallel-interface.
The ADGM1144 also has an SPI that can be controlled by the
K1 to K4 links. When the P5 link is set to the PIN position, the
SPI is enabled. When the P5 link is set to the SPI position, the
parallel-interface is enabled (see Table 3).
Table 3. P5 Link Position
Position Reference Clock Setting
SPI (Default) Parallel-interface enabled
PIN SPI enabled, parallel-interface disabled
The control IC packaged with the MEMS switch internally generates
the voltage required to drive the switch. The internal control IC
contains a reference clock signal at a nominal 10 MHz. In normal
operation, set the P6 link to INT, enabling the built-in 10 MHz
oscillator to enable the internal driver IC voltage boost circuitry (see
Table 4). Set the P6 link to EXT to disable the internal 10 MHz oscil-
lator and drive the VCP pin with 80 V DC from the external voltage
supply. The VCP pin is connected to the EXT_VCP Subminiature
Version B (SMB) connector on the EVAL-ADGM1144SDZ, which
can be used for applying 80 V DC to the external voltage supply.
Disabling the internal oscillator eliminates the associated 10 MHz
noise feedthrough into the switch. With the oscillator disabled, the
logic interface pins (P1 to P4) still control the switch.
Table 4. P6 Link Position
Position Reference Clock Setting
INT (Default) Built-in 10 MHz oscillator enable
EXT Disables the internal oscillator
Table 5. Link Settings (Per PCB Label) for Parallel-Interface Use (See Figure 7)
Controlled RF Switch RF Switch Status Link Name Link Position
RF1 to RFC Off P1 Off (default)
K1 IN-1 (default)
On P1 On
K1 IN-1
RF2 to RFC Off P2 Off (default)
K2 IN-2 (default)
On P2 On
K2 IN-2

User Guide EVAL-ADGM1144
EVALUATION BOARD HARDWARE
analog.com Rev. 0 | 4 of 18
Table 5. Link Settings (Per PCB Label) for Parallel-Interface Use (See Figure 7)
Controlled RF Switch RF Switch Status Link Name Link Position
RF3 to RFC Off P3 Off (default)
K3 IN-3 (default)
On P3 On
K3 IN-3
RF4 to RFC Off P4 Off (default)
K4 IN-4 (default)
On P4 On
K4 IN-4

User Guide EVAL-ADGM1144
EVALUATION BOARD SOFTWARE FOR THE SPI
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INSTALLING THE SOFTWARE
The EVAL-ADGM1144SDZ uses the Analog Devices ACE software.
ACE is a desktop software application that allows the evaluation
and control of multiple evaluation systems.
The ACE software installer installs the necessary SDP drivers
and .NET Framework 4 by default. Install the ACE software before
connecting the SDP driver. The ACE software and access to full
instructions on how to install and use the ACE software can be
found on the Analog Devices website.
After the installation completes, the EVAL-ADGM1144SDZ plugins
appear when opening the ACE software.
INITIAL SETUP
To set up the EVAL-ADGM1144SDZ, complete the following steps:
1. Change the position of the K1 through the K4 links to SDI, CS,
SCLK, and SDO, respectively.
2. Change the position of the P1 through the P4 links to the off
position.
3. Change the P5 link position from PIN to SPI and keep the P6
link position at INT.
4. Connect the EVAL-ADGM1144SDZ to the SDP board and con-
nect the SDP board to the computer via a USB cable.
5. Power the EVAL-ADGM1144SDZ as described in the Power
Supply section.
6. Run the ACE software. The EVAL-ADGM1144SDZ plugins ap-
pear in the Attached Hardware window of the Start tab (see
Figure 2).
7. Double-click the EVAL-ADGM1144SDZ plug-ins to open the
evaluation board view in Figure 3.
8. The chip block diagram can be accessed by double-clicking
the ADGM1144 chip (see Figure 3). The view after clicking the
ADGM1144 chip provides a basic representation of functionality
of the EVAL-ADGM1144SDZ. The main functions are labeled in
Figure 4.
Figure 2. EVAL-ADGM1144SDZ Plugin Start-Up Window
Figure 3. Evaluation Board View of the EVAL-ADGM1144SDZ
Figure 4. Chip Block Diagram View for the ADGM1144
Table 6. SPI Interface Links Description
Links Position Description
K1 SDI Serial data Input pin
K2 CS Chip select pin
K3 SCLK Clock input pin
K4 SDO Serial data output pin

User Guide EVAL-ADGM1144
EVAL-ADGM1144SDZ BLOCK DIAGRAM AND DESCRIPTIONS
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The EVAL-ADGM1144SDZ software is organized so that it appears
similar to the functional block diagram shown in the ADGM1144
data sheet.. A full description of each block and register, as well as
their respective settings, are given in the ADGM1144 data sheet.
Some of the blocks and their functions are described in Table 7
because these blocks pertain to the EVAL-ADGM1144SDZ. The full
screen block diagram, shown in Figure 5, describes the functionality
of each block.
All changes to the blocks correspond to the block diagram in the
software. For example, if the internal register bit is enabled, it
displays as enabled on the block diagram. If any bits or registers
have modified values that have not been transferred to the EVAL-
ADGM1144SDZ, they appear in bold in Figure 5. After clicking Ap-
ply Changes, the data is transferred to the EVAL-ADGM1144SDZ.
Figure 5. EVAL-ADGM1144SDZ Block Diagram with Labels
Table 7. EVAL-ADGM1144SDZ Block Diagram Function Descriptions (See Figure 5)
Label Function Description
A Click the switch symbol to open and close the RF1 to RFC switch
B Click the switch symbol to open and close the RF2 to RFC switch
C Click the switch symbol to open and close the RF3 to RFC switch
D Click the switch symbol to open and close the RF4 to RFC switch
E Click Apply Changes to apply all the modified values to the devices

User Guide EVAL-ADGM1144
EVAL-ADGM1144SDZ BLOCK DIAGRAM AND DESCRIPTIONS
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MEMORY MAP
Click Proceed to Memory Map for full accessibility to all of the
registers (see Figure 5). This access allows registers to be edited at
a bit level (see Figure 6). The bits shaded in dark gray in Figure 6
are read only bits and cannot be accessed from ACE, and all other
bits are toggled. Clicking the Apply Changes button transfers data
to the ADGM1144.
All changes made in the memory map correspond to the block
diagram. For example, if the internal register bit is enabled, the
bit displays as enabled in the block diagram. Any bits or registers
that are bold in Figure 6 are modified values that have not been
transferred to the EVAL-ADGM1144SDZ. Click Apply Changes to
transfer data to the EVAL-ADGM1144SDZ.
Figure 6. ADGM1144 Memory Map

User Guide EVAL-ADGM1144
MEASURING SWITCH PERFORMANCE
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Figure 7 shows the connection diagram of the EVAL-
ADGM1144SDZ in parallel-interface. Apply a VDD supply to the
EVAL-ADGM1144SDZ to measure the performance of the switch.
The links are set according to the switch under test (see Table
6). After selecting the desired channel and its state, the switch
performance data can be collected using a network analyzer. Termi-
nate the RFx edge connectors of the unused switch channels into
50 Ω loads to achieve the full performance of the channel under
test.
Figure 7. EVAL-ADGM1144SDZ Connection Diagram for Parallel-Interface
The EVAL-ADGM1144SDZ, shown in Figure 7, comes with a cali-
bration transmission line, calibration thru, on the PCB. This calibra-
tion line removes the insertion loss and phase offset of the PCB
transmission lines connecting to the switch from the measurement.
Figure 8 shows the calibration transmission line and Figure 9 shows
its insertion loss and return loss up to 20 GHz. The calibration
line is exactly the same length as the distance from any one RFx
connector to the RFx pin of the ADGM1144 plus the distance from
the RFC connector to the RFC pin of the ADGM1144.
Figure 8. EVAL-ADGM1144SDZ Calibration Transmission Line Used for PCB
Insertion Loss and Phase Offset Correction
Figure 9. Calibration Transmission Line Insertion Loss and Return Loss
Figure 10 shows the calibration line length. All RF traces connect-
ing to the ADGM1144 are of equal length.
Figure 10. Calibration Transmission Line Length Equal to the A + B Length
To de-embed the PCB transmission line insertion loss from the
entire switch insertion loss board measurement (the RF1 to RFC
path), divide the S(2,1) insertion loss of the measured data by the
|S(2,1)| of the calibration thru line. Perform this de-embedding by
using the network analyzer at the time of the measurement or after
the measurement using individual measurement data files. Refer
to the Network Analyzer Calibration Procedure section for more
information.
Use the network analyzer port extension function to de-embed
any phase offset introduced by the PCB transmission lines. The
port extension method uses time delay offset values to correct
for phase. Enter the time delays into the port extension menu on
the network analyzer corresponding to any phase offset introduced
from an RF edge connector to the switch pin. Figure 10 shows an
example of these phase offsets on a typical switch measurement,
labeled as A and B. Both A and B are identical in length and can be
calculated by measuring the time delay of the calibration line and
dividing it by two.

User Guide EVAL-ADGM1144
MEASURING SWITCH PERFORMANCE
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Figure 11 shows the ADGM1144 switch insertion loss measurement
results of all four channels that are de-embedded with respect to
the PCB transmission line losses.
Figure 11. PCB De-Embedded ADGM1144 Insertion Loss Performance
Figure 12 shows the ADGM1144 switch return loss performance
measurement results for all four channels.
Figure 12. ADGM1144 Return Loss Performance
Figure 13 shows the ADGM1144 switch off isolation performance
measurement results for all four channels.
Figure 13. ADGM1144 Off-Isolation Performance

User Guide EVAL-ADGM1144
NETWORK ANALYZER CALIBRATION PROCEDURE
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Use the following procedure in conjunction with the EVAL-
ADGM1144SDZ for two-port measurements, assuming the user has
a set of manual calibration standards or an electric calibration type
unit to perform a short load open through (SLOT) calibration of the
network analyzer. The maximum value for the network analyzer fre-
quency sweep for the EVAL-ADGM1144SDZ PCB can be up to 20
GHz. Perform the following steps for the two-port measurements:
1. Perform a full, two-port standard SLOT calibration of the net-
work analyzer.
2. Connect the calibration thru calibration line (Connector RFC1
and Connector RFC2) to the analyzer and measure its insertion
loss, S(2,1).
3. Save the measured data to the network analyzer memory for
later use.
4. Configure the EVAL-ADGM1144SDZ links and power up the
EVAL-ADGM1144SDZ with a 3.3 V DC power supply.
5. Connect the network analyzer to the desired MEMS switch RF
connectors and apply the external control signals, if needed.
6. Measure the complete insertion loss of the EVAL-
ADGM1144SDZ. Include the insertion loss of the MEMS switch
and test fixture (PCB transmission lines and RF connectors).
7. De-embed the PCB losses from the complete evaluation board
measurement using the data saved at Step 3 and the measured
data at Step 6. Because the extraction method is dependent on
the network analyzer, consult the network analyzer user manual
before performing the extraction. Typically, the divide function
divides the complete S(2,1) insertion loss measurement data
by the calibration thru line S(2,1) insertion loss data stored in
memory.
8. Use the network analyzer port extension function to de-embed
the phase offset introduced by the PCB transmission lines. The
port extension method uses time delay offset values to correct
for phase. Enter the time delay values into the port extension
menu on the network analyzer for each RF edged connector
to switch the pin path equal to the electrical length of the
calibration line divided by two.

User Guide EVAL-ADGM1144
HANDLING GUIDELINES
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Adhere to the following handling guidelines for the EVAL-
ADGM1144SDZ:
►Always treat the ADGM1144 as a static sensitive device and
observe normal handling precautions, including working only on
static dissipative surfaces, wearing wrist straps, or other electro-
static discharge (ESD) control devices.
►Take care when connecting signals. Hold the EVAL-
ADGM1144SDZ from the edges to avoid any damage to the
device under test (DUT).
►Avoid connecting live signal sources. Ensure that outputs are
switched off (preferably grounded) before connecting to the DUT.
In addition, ensure all instrumentation shares a common chassis
ground.
►Avoid running measurement instruments (for example, digital
multimeters (DMMs) in autorange modes). Some instruments
can generate large transient compliance voltages when switch-
ing ranges.
►Use the highest practical range (that is, lowest resolution) setting
for resistance measurements to minimize compliance voltages.

User Guide EVAL-ADGM1144
LAYOUT RECOMMENDATIONS
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The EVAL-ADGM1144SDZ is a 4-layer board. The EVAL-
ADGM1144SDZ uses 8 mil Roger RO4003C dielectric. The outer
copper layers have 2.2 mil finish thickness with electroless nickel
immersion gold (ENIG) finish. The RF transmission lines were
designed using a micro strip model with a width of 17 mil and
ground spacing of 50 mil to have a characteristic impedance of 50
Ω (see Figure 14 and Figure 15). It is recommended to use plenty
of vias under the ADGM1144 and along the RF traces to provide
good grounding and to avoid any resonance at high frequencies.
To achieve optimum RF performance, Rosenberger right angle jack
connectors (32K243-40ML5) are used.
Figure 14. EVAL-ADGM1144SDZ Board Stackup
Figure 15. EVAL-ADGM1144SDZ Additional Board Manufacturing Information

User Guide EVAL-ADGM1144
SOLDERING RECOMMENDATIONS
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To avoid solder voids under the ADGM1144, it is recommended to
use a 0.0767 mm (3 mil) thick solder stencil with nano coating. The
aperture size for the solder stencil must be 1:1, and divide the paste
mask with multiple pads, as shown in Figure 16. Poor soldering
may impact the RF performance of the ADGM1144.
Figure 16. Solder Stencil Recommendations in Millimeters

User Guide EVAL-ADGM1144
EVALUATION BOARD SCHEMATICS AND ARTWORK
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Figure 17. Schematic of the EVAL-ADGM1144SDZ

User Guide EVAL-ADGM1144
EVALUATION BOARD SCHEMATICS AND ARTWORK
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Figure 18. Schematic of the EVAL-ADGM1144SDZ with an SDP Connector
Figure 19. EVAL-ADGM1144SDZ Component Side PCB Drawing (Layer 1)

User Guide EVAL-ADGM1144
EVALUATION BOARD SCHEMATICS AND ARTWORK
analog.com Rev. 0 | 16 of 18
Figure 20. EVAL- ADGM1144SDZ Component Side Ground Plane PCB Drawing (Layer 2)
Figure 21. EVAL- ADGM1144SDZ Component Side Ground Plane PCB Drawing (Layer 3)
Figure 22. EVAL- ADGM1144SDZ Component Side, Bottom Side PCB Drawing (Layer 4)

User Guide EVAL-ADGM1144
EVALUATION BOARD SCHEMATICS AND ARTWORK
analog.com Rev. 0 | 17 of 18
Figure 23. EVAL-ADGM1144SDZ Component Side Silkscreen PCB Drawing (Top)
Figure 24. EVAL-ADGM1144SDZ Soldermask Top
Figure 25. EVAL-ADGM1144SDZ Paste Top

User Guide EVAL-ADGM1144
ORDERING INFORMATION
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary
protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of
functionality.
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conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the
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(“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation
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registered trademarks are the property of their respective owners.
One Analog Way, Wilmington, MA 01887-2356, U.S.A.
Rev. 0 | 18 of 18
BILL OF MATERIALS
Table 8.
Reference Designator Description Manufacturer Manufacturer Number
C5 10 μF ceramic capacitor, 10 V, 20%, X5R, 0603, low effective series
resistance (ESR)
TDK C1608X5R1A106M080AC
C6, C7 1 μF ceramic capacitors, 16 V, 10%, X7R, 0603 AVX 0603YC105KAT2A
DS1 630 nm light emitting diode (LED), surface-mount device (SMD), red Broadcom Limited HSMS-C170
EXT_VCP, J1 to J4 PCB connectors, Subminiature Version B (SMB), coaxial straight jack Amphenol SMB1251B1-3GT30G-50
M1 PCB connector, USB connector USB Type C Amphenol 12401598E4#2A
JP7, K1 to K4, P1 to P6 PCB connectors, 3-position, male header, unshrouded single row, 2.54
mm pitch, 3 mm solder tail
Harwin M20-9990345
P7 2-pin terminal block (5 mm pitch) Lumberg KRM 02
P8 120-way, 0.6 mm pitch, 2 row straight PCB connector HRS FX8-120S-SV(21)
R1 to R6 10 kΩ resistors, SMD, 0.01%, 1/16 W, 0603 Multicomp (SPC) MCTF0603TTX1002
R7, R9 100 kΩ resistors, SMD, 1%, 1/10 W, 0603 Yageo RC0603JR-07100KL
R8 100 kΩ resistor, SMD, 1%, 1/10 W, 0603, do not insert (DNI) Yageo RC0603JR-07100KL
R11 750 Ω resistor, SMD, 1%, 1/10 W, 0603, AEC-Q200 Vishay CRCW0603750RFKEA
R10, R12 5.1 kΩ resistors, SMD, 0.1%, 1/10 W, 0603, AEC-Q200 Panasonic ERA-3AEB512V
RF1 to RF4, RFC,
RFC1, RFC2
Coaxial connectors, Subminiature Version A (SMA) right angle jack PCB Southwest Microwave 32K243-40ML5
U1 IC, 32 kb serial EEPROM Microchip Technology 24LC32A-I/MS
U8 IC, 50 mA, high voltage, micropower linear regulator Analog Devices ADP1720ARMZ-3.3-R7
U2 IC, 0 Hz to 18 GHz, SP4T MEMS switch Analog Devices ADGM1144BCCZ
Not applicable1Wideband 50 Ω termination SMA loads Pasternack PE6081
1Screwed on at measurement time (see Figure 7).