the of Q4. Q4 and Q5 are 0linear voltage to
exponential currant corrverter. Capacitor C7 is
initially charged to +15 volts and di:Echarges toward
ground through Q5, Z3A and Q7 follow the\x:i(tage
level on C7 and supply it to the oomoarator and the
sawtooth to pulse converter. The output of the
comparator {pin 13, 8J will switch to +15 volts (logic
1) when the sawtooth voltage falls below +7,5 volts.
The comparator output Is supplied to the one shot
which reset cacocitor C7 to +15 volts.
Sawtooth To Pulse Corrverter: Voltages from the
Pulse Width Modulation jack and the Pulse Width
slider are applied to Z4A and Z4B tz> set the dock
pulse width. The collector of 08 will be apulse wave
with apul&e width from 20% to 100% depending on
the pQsitk>n of the pulse width slider. The pulse
output of the choc< oscillator fe routed to the Gate
Output Processing urcuit {schematic 2
L
34 Randomize!, Skip &Reset
Z1 IB is ahigh speed oscillator Uppiox. 5mi{7osecJ.
Whan Z16A pin 3is alogcc 1, ZllB producesa high
frepuency pulse chain or\ pin 9. When 21 6Z pin 3is
at alogic 0(ground) 21 IB stops oscfllBting. With
slide switch S21 in the Random posrtkin, Z10C pin
10 will enable (turn on] the high speed oscillator
(Z11B) through 21 6A. Z11B will then provide a
pulse diain to Mask circuit. When pulsed by the
clock ccscMIator, the one shot will momentarily turn
off the high speed oscillator through ZtOC (pin 12 &
13) to allow the left»:rh in the Counter/Latch circuit to
memorize a{random) position, Duf ng this mode,
Z7B generates random voltage levels tg vary the fre>
quency of 2116 to insure arandom sampling of
positions. With S21 mthe Sequential mode, ZIGC
will not affect the frequency of the high speed
osciiEator, When S22 is in the skip position, pin 8
of Z9C is at logic 0. When the Jpoint Is also at a
logic 0, Z9C pin 10 the«n turns on the h’qh speed
Oscillator which quickly advances; the sequencer
to the next position (via 216C).
In the reset position, the gate signal on the Jpoint
is supplied through S22 to Z9D. When the Jpoint
is at logic 0, 290 supplies alogic 1which resets the
a>untcf to position 1via ZI6B. External reset gates
may be applied to 027 amf by depressing the reset
push button {S23).
3.5 Mask Circurt
Z15A pin 3is logic 1when the sequencer is in the
"sequentbl" mode which allows the latch (Z8) in
the Counter/Latch circuit to transmit data con*
tinuously. When pin 3of Z1SA es logic 0. (random
mode only) Z8 in the Counter/Latch circuit holds or
stores the dats on the counter output.
The one shot pulse will cause the Qand Qbar out-
puts of 22A to momenterily reverse 'state. The
output of the high speed oscillator (ZllB) and the
Qbar outpHJt of Z2A are then combined on Z16C
which advances the counter in the Counter/Lateh
circuit. A''mask^' pulse is generated by combinina
the one shot puMs (4 msec, duratoon) and the pulse
from Z2A (8 mkrosec, duration) on the output of
Z15B (pin 4) to turn off all the gate outputs during
the time the counter is advanced from one position
to the next.
3.6 Step
When gate sigrials are applied to the step jack or ftcm
the step push button, 26A pin 3provides apulse to
the One Shot circuit and the Gate Output Processing
circuit.
3«7 FcMit Switch Jack
The foot switch jack on the fror^t panel provides a
+10 volts gate for as long as the foot switch is held
and can be patched to any of the input jacks on the
front panel
3.8 Counter/Latch
Z7A kadivide by 16 counter providing a4bit code
to 28. 28 is alatch circuit but normally transmits
cfcjta to the Decoder circuit unaffected. Z9B and Z9A
are connected to the Qand Qbar outputs of ZB to
enable Z13 and Z14 in the Decoder circuit one at a
time (sequentiaily).
3.9 Decoder
213 and 214 decode the hcnary number from the
Latch circuit tc one of 16 positions, WhenS4fi is in
the 16 X1mode, Oil through 26 wilt turn on one at
atime sequentially (1 through 16). In the 8X2
mode, 213 and Z14 decode in paraliei (position
1-8 and 9-16). In the random mode, tha courier
advances at th<? rate of the High Speed Oscil^tor
(ZllB, schematic 1) but in this mode, Z8 holds
the code which is supplied to the decoders constant.
The strobe input of the 28 allows arandom binary
number to be memorized on each dock pulse which
is sjjpplied to the decoder.
Ql 1and 026 are turned on one at atime and supply
voltages to one of the three gate bus lines through the
three posieksn gate switohes. At the same time, the
LED is lit indicating which position is OfJ. The three
position sfide switches provide the path to ground
for the LEOs.
