ARP 1601 User manual

ILm,SEQUENCER MODEL 1601
SERVICE MANUAL
ARP INSTRUMENTS, INC.
320 Needham Street,
Newton, MA. 02164
617 965-9700
Document Number 9001901
©September 1976, ARP INSTRUMENTS, INC.
THE INFORMATION CONTAINED HEREIN IS CONFIDENTIAL AND PROPRIETARY TO ARP INSTRUMENTS, INC. IT IS
DISCLOSED TO YOU SOLELY FOR PURPOSES OF INSTRUCTION AS TO OPERATION OF THE EQUIPMENT AND
MAINTENANCE AS APPROPRIATE. IT IS NOT TO BE USED BY YOU FOR ANY OTHER PURPOSE, NOR IS IT TO BE
DISCLOSED TO OTHERS WITHOUT THE EXPRESS PERMISSION OF ARP INSTRUMENTS, INC.

to
r
SEQUENCER MODEL 1601
SERVICE MANUAL
TABLE OF CONTENTS
1. INTRODUCTION
1.1 Product Description 2
1.2 Specifications 2
1.3 Function Description 3
2. THEORY OF OPERATION
2.1 Sequencer 4
2.2 Quantizer 4
3. CIRCUIT DESCRIPTIONS
SEQUENCER
3.1 Clock On/Off 5
3.2 One Shot 5
3.3 Clock Oscillator 5
3.4 Randomizer, Skip &Reset 6
3.5 Mask Circuit 6
3.6 Step 6
3.7 Foot Switch Jack 6
3.8 Counter/Latch 6
3.9 Decoder 6
3.10 Gate Output Processing 7
QUANTIZER
3.1
1
Current Source &Semitone Shift 7
3.12 CV Generator &Scanner 7
3.13 Counter 7
3.14 Comparator 7
3.15 Sample Control 7
3.16 External CV Input 7
4. SEQUENCER TEST POINTS 8,9
5. CALIBRATIONS 10,11
6. ASSEMBLY/DISASSEMBLY 11
7. BLOCK DIAGRAM 12
8. GENERAL INFORMATION (COS/MOS Integrated Circuits) ... 13
9. SCHEMATICS &LAYOUTS 14,15,16,17,18,19
10. PARTS LIST 22
L

SECTION 1INTRODUCTION
1.1 Product Description
The ARP Sequencer, model 1601, is a16 step se-
quential voltage generator. Avoltage level slider is
provided for each of the 16 steps to adjust the volt-
age output from to +10 volts. The sequencer may
be used in a"8 X2" mode so that outputs 1through
8(bank A) and 9through 16 (bank B) sequence in
parallel. The outputs of banks Aand Bare prewired
to avoltage quantizer which effectively "rounds
off" the sequencer's voltage to the nearest whole
twelfth of avolt. This allows precise tuning since all
ARP products are tuned to a1volt per octave stand-
ard (1/12 volt per semitone).
Alow frequency voltage controlled clock governs the
stepping speed of the sequencer and can be started,
stopped, gated, or speeded up either manually or
externally.
Position gates provide aconstant voltage output
(+10 volts) for as long as the sequencer is on a
selected position. The position gate outputs are
bused to one of the position gate outputs (Gate 1,
2, or 3).
1.2 Specifications
SEQUENCER
Number of positions 16
Maximum (unquantizedj control
voltage output +12 V
Maximum Gate output voltage +14 V
16X1 Mode ..Channels Aand Bare common
8X2 Mode ...Channels Aand Bare separate
Step, Reset, Start, Stop and Start/Stop
jack inputs Accepts +3 Vto +10 VGate
CLOCK
Type Voltage Controlled
Pulse Width 10% to 100% (less 5msec.)
PWM (Pulse Width Modulation)
Input jack Accepts to +10 volts
Frequency Range 0.2 Hz. to 100 Hz.
FM Input Sensitivity 2V/OCT max.
Clock Output +14 Vpulse wave
Warm Up Drift
QUANTIZER
Function "Rounds off" voltages to
nearest 1/12 V(semitone)
Maximum Input Voltage (A &B) +10 V
Maximum Quantized CV
Output (A&B) +2 V
Range 2octaves
POWER REQUIREMENTS
Line Voltage 100 to 130 VAC
Line Frequency 50-60 Hz.
Power 20 Watts
FIG. 1.1 CONNECTIONS TO SYNTHESIZER
Use these controls to "tune" each position.
From "CV Out'
To "Gate in'
[IsW^ Sequencer

1.3 Function Description
r^2 n±±
25
f&ML Sequencer
-rj-a- ±=±
2 3
-n- -p-
24 23
12 13 14 15 16
-j --r
J
:- --
19^ <^
'f^® 16 ;—g^-
22
®s—7—*©
8
®—
18 15 14
1Position Gate Assignment Switches:
Supplies a+14 volt gate to one of three
(bused )outputs.
2Foot Switch Input: (Rear Panel) Sup-
plies a+14 volt gate to the "Foot Switch
Out" jack on the front panel.
3Position Gate Bus Ou!pufs;+14 volt gate
outputs which are usually connected to
external envelope generators.
4Position 1Output: Supplies a+14 volt
gate on position 1(only) to synchronize
additional sequencers or synthesizers.
5Clocked Gate Out: Allows the selection
of particular position gates (Gate Bus 1)
with control of the pulse width (Clock).
6Clock Out: Supplies a+14 volt clock
pulse which can trigger external envelope
generators.
7Quantized CV Oufputs.-Provides acon-
trol voltage in 1/12 volt increments (0 to
+2 volt range) which controls the pitch
of external oscillators. The Aand Bout-
puts are common in the 16 X1mode,
but separate in the 8X2 mode.
8CV In: Allows external control voltages
(from akeyboard for example) to be
summed with the sequencer's voltage to
shift the key in which the sequencer
plays.
9Quantizer Inputs: Allows voltages to be
"quantized" (rounded to nearest 1/12
volt). Prepatched to the sequencer out-
puts.
10 Sequencer Outputs: Provides ato +10
volt analog control voltage.
11Common convenience jacks.
12 Pulse Width: Varies the pulse width of
the clock.
13 Clock FM: Allows external control volt-
ages to increase the speed of the clock
(prewired to Gate Bus 1).
14 Clock Frequency: Manually varies the
clock rate from .2Hz to approx. 100 Hz.
15 Start/Stop: Alternately starts and stops
the sequencer.
16 Trig/Gate Switch: Trigger mode allows
the sequencer to be "triggered" on. In
the Gate mode, the sequencer is on
while the start button is held.
1/Externally starts the sequencer.
18 Externally stops the sequencer.
19 Step: Advances the sequencer to the
next position.
20 Reset: Resets the sequencer to position
1(sequential mode only).
21 Skip/Reset: Allows particular positions
(from gate bus 3) to either skip past or
reset on particular positions.
22 Sequential/Random Mode: Allows clock
to advance to each successive position or
advance to arandom position.
23 Mode Switch: Steps the sequencer 16
times, or steps banks Aand B8times in
parallel.
24 LEDs: (Light Emitting Diodes) Indicates
which position is on.
25 Position Tuning Sliders: Tunes individual
positions (adjusts CV level).

SECTION 2THEORY OF OPERATION
2.1 Sequencer
The heart of the sequencer is the Counter/Latch
circuit which produces afour bit binary number.
When initially reset, the output of the counter
is 0000 (Position 1code), or zero. Each time the
counter receives apulse from the Mask circuit, the
counter advances to the next binary number (0001,
0010, 0011, 0100... 1111). The highest binary
number, 1111, corresponds to position 16.
This code is supplied to the Decoder circuit which
decodes the binary number to one of 16 outputs. For
example, when the code 0000 is present on the
output of the counter, the decoder will turn on the
position 1output (only); when the code 0001 is
present on the output of the counter, the decoder
will turn on only the position 2output, etc.
When in the "8 X2" mode, athree bit code is
supplied from the counter instead of four. Positions
1through 8and 9through 16 in the Decoder circuit
simultaneously decode so that bank A(1-8) and
B(9-16) sequence in parallel.
The Voltage Controlled Low Frequency Clock
determines when the counter is advanced to
the next position by pulsing aone shot circuit.
The one shot in turn supplies apulse to the Mask
circuit which advances the counter and disables
(masks) the gate outputs during the count advance.
When the sequencer is in the random mode, the
Randomizer circuit advances the counter at an
extremely high frequency. For each cycle of the
low frequency clock, aposition number on the
output of the counter is memorized and held until
the next clock pulse. Since the counter is being
advanced so fast, the position numbers which are
memorized will be random.
2.2 Quantizer
Voltages which are to be quantized to the nearest
whole twelfth of avolt are applied to the "A" or
"B" input of the quantizer." One quantizer circuit
is multiplexed by switching between one of the two
inputs (A and B) to provide two independent quan-
tized control voltage outputs. The voltages are
quantized and stored extremely quickly, so that
two different voltages are quantized (one at atime)
faster than can be detected by the ear. As in a
standard keyboard, aresistor chain of equal value
resistors make up avoltage divider to generate a
voltage reference. The voltages produced by this
reference CV generator are volts, 1/12V, 2/1 2V,
3/12V...2V (2 octave range). Ahigh frequency
oscillator steps acounter which enables the CV
generator voltages to be "scanned" one at atime
(0 volts to 2volts).
The input voltage which is to be "quantized" is
compared to the reference CV on the scanner output;
if the scanner output is lower than the input voltage,
the counter advances until the scanner voltage is just
higher than the input voltage. The counter is then
stopped (by the Comparator circuit) and the voltage
on the output of the scanner is memorized. The
counter is then reset to zero so that the voltage on
other input may be quantized next.
IWI\ ULIL
vco
(LOW
FREQ.)
ONE
SHOT
JUHL
RAN-
DOMIZER
r-Oi
MASK
oV
SEQ/RAND. SWITCH
(IN SEQUENTIAL
POSITION)
FIG. 2.1 SIGNAL FLOW
COUNTER
uu<r
ABCD
DECODER
•r <r
ABCD
DECODER
nil 11ii mini
oooooooo oooooo o o
1234567 8 910 1112 13 14 1516
POSITION OUTPUTS (DRIVES LEDS &CV SLIDERS)

UL
;;
1
:i
M(1 ;fl i-l M(1 ;il :1
MM
~l
CV Output
Clock
Clocked Gate 1
Pos.
18 9 10 11 12 13 14 15
POSITIONS
f&Ml Sequencer
u—...—l-—n—1. 1—n—^j lj—.j———j—i_,— .,—i,-
~*» :T"
1
i'!
i. -J- -|j- -Ij. .J. -b-.
MINI i
j- -u-
1
F/G. 2.2 SEQUENCER OUTPUTS
SECTION 3CIRCUIT DESCRIPTIONS
3.1 Clock On/Off 3.2 One Shot
Gate signals applied to the start jack set the Qoutput
of Z2B to logic 1(+15 volts) and Qbar to logic
(0 volts). Gate signals applied to the stop jack set
the Qoutput of Z2B to logic and the Qbar to logic
1.Each time agate signal is applied to the start/stop
jack or when the start/stop button is depressed, the
Qoutput of Z2B assumes the logic level of the Qbar
output so that the Qand Qbar outputs reverse state.
When the Gate/Trigger switch (S2) is in the gate
position, the Qoutput will assume alogic 1state for
as long as agate is present on the start/stop jack.
Summary: For aclock "on" state, the Qoutput of
Z2B (B point) will be alogic 1. For aclock "off"
state, the Qoutput is alogic 0.
A4millisecond pulse occurs on the Qoutput of
Z11A when pulsed on the Ainput (pin 5). The
pulse on the output of the one shot is supplied to:
1) the Clock Oscillator to reset the sawtooth: 2) the
Reset circuit to lengthen the external reset pulse (if
applied) when the E point is at alogic 1; and 3)
the Randomizer circuit to momentarily disable the
high frequency oscillator (random mode only).
3.3 Clock Oscillator
Three circuits comprise the Clock Oscillator: the
Voltage Controlled Oscillator, Sawtooth to Pulse
Converter, and Comparator.
Sawtooth Oscillator: Voltages from the clock FM
input jack and the clock rate slider are summed on

the base of Q4. Q4 and Q5 are alinear voltage to
exponential current converter. Capacitor C7 is
initially charged to +15 volts and discharges toward
ground through Q5. Z3A and Q7 follow the voltage
level on C7 and supply it to the comparator and the
sawtooth to pulse converter. The output of the
comparator (pin 13, 8) will switch to +15 volts (logic
1) when the sawtooth voltage falls below +7.5 volts.
The comparator output is supplied to the one shot
which reset capacitor C7 to +1 5volts.
Sawtooth To Pulse Converter: Voltages from the
Pulse Width Modulation jack and the Pulse Width
slider are applied to Z4A and Z4B to set the clock
pulse width. The collector of Q8 will be apulse wave
with apulse width from 20% to 100% depending on
the position of the pulse width slider. The pulse
output of the clock oscillator is routed to the Gate
Output Processing circuit (schematic 2).
3.4 Randomizer, Skip &Reset
Z1 1Bis ahigh speed oscillator (approx. 5 microsec).
When Z16A pin 3is alogic 1,Z1 1Bproduces ahigh
frequency pulse chain on pin 9. When Z16Z pin 3is
at alogic (ground) Z11B stops oscillating. With
slide switch S21 in the Random position, Z10C pin
10 will enable (turn on) the high speed oscillator
(Z11B) through Z16A. Z11B will then provide a
pulse chain to Mask circuit. When pulsed by the
clock oscillator, the one shot will momentarily turn
off the high speed oscillator through Z10C (pin 12 &
13) to allow the latch in the Counter/Latch circuit to
memorize a(random) position. During this mode,
Z7B generates random voltage levels to vary the fre-
quency of Z11B to insure arandom sampling of
positions. With S21 in the Sequential mode, Z10C
will not affect the frequency of the high speed
oscillator. When S22 is in the skip position, pin 8
of Z9C is at logic 0. When the Jpoint is also at a
logic 0, Z9C pin 10 then turns on the high speed
oscillator which quickly advances the sequencer
to the next position (via Z16C).
In the reset position, the gate signal on the Jpoint
is supplied through S22 to Z9D. When the Jpoint
is at logic 0, Z9D supplies alogic 1which resets the
counter to position 1via Z16B. External reset gates
may be applied to Q27 and by depressing the reset
push button (S23).
3.5 Mask Circuit
Z15A pin 3is logic 1when the sequencer is in the
"sequential" mode which allows the latch (Z8) in
the Counter/Latch circuit to transmit data con-
tinuously. When pin 3of Z15A is logic 0, (random
mode only) Z8 in the Counter/Latch circuit holds or
stores the data on the counter output.
The one shot pulse will cause the Qand Qbar out-
puts of Z2A to momentarily reverse state. The
output of the high speed oscillator (Z11B) and the
Qbar output of Z2A are then combined on Z16C
which advances the counter in the Counter/Latch
circuit. A"mask" pulse is generated by combining
the one shot pulse (4 msec, duration) and the pulse
from Z2A (8 microsec. duration) on the output of
Z15B (pin 4) to turn off all the gate outputs during
the time the counter is advanced from one position
to the next.
3.6 Step
When gate signals are applied to the step jack or from
the step push button, Z6A pin 3provides apulse to
the One Shot circuit and the Gate Output Processing
circuit.
3.7 Foot Switch Jack
The foot switch jack on the front panel provides a
+10 volts gate for as long as the foot switch is held
and can be patched to any of the input jacks on the
front panel.
3.8 Counter/Latch
Z7A is adivide by 16 counter providing a4bit code
to Z8. Z8 is alatch circuit but normally transmits
data to the Decoder circuit unaffected. Z9B and Z9A
are connected to the Qand Qbar outputs of Z8 to
enable Z13 and Z14 in the Decoder circuit one at a
time (sequentially).
3.9 Decoder
Z13 and Z14 decode the binary number from the
Latch circuit to one of 16 positions. When S4B is in
the 16 X1mode, Q1 1through 26 will turn on one at
atime sequentially (1 through 16). In the 8X2
mode, Z13 and Z14 decode in parallel (position
1-8 and 9-16). In the random mode, the counter
advances at the rate of the High Speed Oscillator
(Z11B, schematic 1) but in this mode, Z8 holds
the code which is supplied to the decoders constant.
The strobe input of the Z8 allows arandom binary
number to be memorized on each clock pulse which
is supplied to the decoder.
Q1 1and Q26 are turned on one at atime and supply
voltages to one of the three gate bus lines through the
three position gate switches. At the same time, the
LED is lit indicating which position is on. The three
position slide switches provide the path to ground
for the LEDs.

The voltages from the decoder chips are also supplied
to 100K sliders (R57 through R103) to provide a
variable voltage level (0 to +10V) for each position.
Voltages from the Abank sliders and the Bbank
sliders are summed in the output amplifier circuit
Z19A and Z18A. When the sequencer is in the 16 X
1position, the output of the Aand Bchannels are
summed together so that the outputs of Z19B and
Z18B will be the same. The Sequencer output
voltages supplied by the output amplifiers are routed
to the quantizer (schematic 3).
3.10 Gate Output Processing
Gate Output Processing circuit provides 6outputs:
Gate Bus 1, Gate Bus 2, Gate Bus 3, Clocked Gate
1, Clock Output, and Position 1Output.
The Gate Bus 1,2, and 3 outputs are driven from the
3position slide switches in the Decoder circuit.
Z15C and Z15D are aflip-flop which supplies the
Clocked Gate 1Output and turns on the clock
indicator light (CR22). The position 1output
obtains its signal from Position 1(Q1 1base) in the
Decoder circuit so that more than one sequencer
can be synchronized.
QUANTIZER
3.11 Current Source &Semitone Shift
Z29A supplies constant current through 13 equal
value resistors (100ohm) located in resistor pack
Z20. The voltage drop across each resistor is 2/12
of avolt (two semitones, or one whole tone). Q36
supplies an offset voltage to pin 3of Z29A to "shift"
or raise the output of the current source (and there-
fore pins 1through 14 of Z20) up 1/12 of avolt.
etc. one at atime sequentially. The remaining
bit (LSB) on the Counter output (pin 12) is supplied
to the Current Source to shift the resistor chain level
up 1/12 of avolt to obtain two voljage levels per
resistor in Z20.
3.14 Comparator
The scanner output (Z29B pin 7) is supplied to the
inverting input of the Comparator (Z23). An
external control voltage which is to be quantized
is supplied to the noninverting input of the Compara-
tor via the Input Channel Selector.
Initially, the Comparator output is logic 1(+15 volts)
which permits the counter to be advanced by the
Clock through Z24D. As the Counter advances, the
voltage on pin 2of Z23 "steps" in 1/12 volt incre-
ments until it exceeds the voltage level on pin 3of
Z23. The output of the Comparator then changes
to logic which immediately stops the Counter. The
voltage on the Scanner output (now constant) is the
nearest 1/12 of avolt level to the input control volt-
age; therefore, it is supplied to the Channel Memory
via Z30C to be stored.
3.15 Sample Control
Z30C is enabled when the Sample Control provides
alogic 1to the clock input of Z28A. Z28A then
turns on one of the transmission gates (either channel
Aor B) for atime period of half aclock cycle. After
the quantized control voltage from Z29C has been
supplied to one of the memory circuits, Z27C resets
both the Sample Control and the Counter. Addi-
tionally, the outputs of Z28A reverse state to switch
from one channel to the other (A to Bfor example).
The Quantizer is now ready to quantize the voltage
waiting on the other input.
3.12 CV Generator &Scanner
Z21 and Z22 are digitally controlled analog switches
which are connected to the CV generator outputs
(Z20). The three binary inputs (A, Band C) select
one of eight switches to be turned on and connect an
input (pins 13, 14, 15, 12, 1, 5, 2, or 4) to the output
(pin 3). All of the switches are off when alogic 1is
on pin 6(inhibit). The A, Band Cinputs of Z21
are driven by Z25.
3.13 COUNTER
Z25 generates abinary number which "counts" from
00000 to 11111. The first bit (MSB) inhibits either
Z21 or Z22 so that only one voltage from Z20 is ever
on at the same time. The next three bits (pins 6, 9,
and 11 of Z20) turn on channels 13, 14, 15, 12, 1
3.16 External CV Input
The External CV input allows acontrol voltage from
another synthesizer to be summed with the output of
the two Quantizer circuits. The keyboard CV of
other instruments can be added to the sequencer's
voltage to change the key in which the sequencer
plays simply by playing an external keyboard.
The test points on the following two pages illustrate
the operation of the circuits in the sequencer in
relation to one another.

SECTION 4SEQUENCER TEST POINTS
TEST
POINT
TP-1
FUNCTION
HIGH FREQ.
OSC.
SET UP
1.Put the SEQ/RAND switch in
the RANDOM mode.
2. Put the SEQ/RAND switch in
the SEQUENTIAL mode.
SPECIFICATIONS UiUflUI+15 V
V
volts (constant)
TP-2 CLOCK
ON/OFF
1.Put the TRIG/GATE switch in
the GATE position. Depress the
START/STOP button.
•4 Start/Stop button held down
+15 V
2. Put the TRIG/GATE switch in
the TRIGGER position. Depress
the START/STOP button.
Alternates between +15 Vand Vwhen START/STOP
is depressed.
TP-3
TP-4
ONE SHOT 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer. h^ >H 25msec. typical
CLOCK
SAWTOOTH 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer.
+15 v
-+ 15 v
TP-5
TP-6
TP-7
TP-8
TP-9
TP-10
COMPAR-
ATOR 1. Put the CLOCK FREQ. slider at %. 2. Put all other sliders fully DOWN.
3. Start the Sequencer.
20 usee, typical
CLOCK 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer.
4. Put the PULSE WIDTH slider
fully up.
+15 volts (constant)
ONE SHOT 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer.
4msec.
MASK
ADVANCE 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer.
8usee, typical
MASK 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer.
(4 msec +8usee)
ADVANCE 1. Put the CLOCK FREQ. slider at %.
2. Put all other sliders fully DOWN.
3. Start the Sequencer.
8usee, typical
+15 V
-+ 15 V
.+ 15 V
-0 V

The following test points all use the same panel settings:
1. Put the SEQ/RAND switch in the SEQUENTIAL position.
2. Put the GATE/TRIG switch in the GATE position.
QUANTIZER 3. Put the mode switch in the 8X2position.
4. Depress the RESET button (position 1LED should be lit).
5. Put the POSITION 1slider about 1/3 up.
6. Put the POSITION 9slider about 2/3 up.
NOTE: Test points 11-17 and 19-20
are +15 Vpulse waves.
TEST
POINT FUNCTION SPECIFICATIONS
TP-11 02
CLOCK JIUUUUlll^^
120 usee, period typical (8 KHz.)
TP-12 01
CLOCK IIUIIMMMM^
TP-13 SEM.
SHIFT .^mjiLnjinjijiJi^jiJiJirLnjmiriiinj
TP-14 SCANNER
Ani
TP-15 SCANNER
B
TP-16 SCANNER
CJl Jl
TP-17 SCANNER
I
TP-18 SCANNER
OUTPUT
2.0 V
«ACHAN. BCHAN. *<ACHAN.
IBCV IN (EXAMPLE)
|FROM SEQUENCER"
ACV IN (EXAMPLE)
FROM SEQUENCER
BCHAN.
TP-19 COMPAR-
ATOR 60 usee, typical 130 usee, typical
Ji
TP-20 SAMPLE 70 usee, typical
Jl
I
Jl
TP-21 RESET 5usee typical

SECTION 5CALIBRATIONS
5.1 Sequencer &Quantizer
REF. NO. TRIMMER. TRIM PROCEDURE
R19 FREQ. CAL. 1. Put the CLOCK FREQUENCY SLIDER fully UP.
2. Monitor the CLOCK OUTPUT with afrequency counter or oscilloscope.
3. Put all other sliders fully DOWN.
4. Adjust trimmer R19 for a10 msec, period waveform (100Hz.).
R26 PULSE WIDTH 1. Put all GATE ASSIGNMENT switches fully UP (Gate Bus 1position).
2. Monitor the CLOCKED GATE 1OUTPUT with an oscilloscope.
3. Put the GATE/TRIG switch in the TRIGGER mode.
4, Depress the START/STOP button to START the sequencer.
5. Put the CLOCK FREQUENCY slider fully UP.
6. Put the CLOCK FM slider fully DOWN.
7. Put the CLOCK PULSE WIDTH slider fully UP.
8. Turn trimmer R26 fully CLOCKWISE.
9. SLOWLY turn trimmer R26 COUNTER CLOCKWISE until waveform
disappears (constant +14 volts). TURN NO FURTHER.
R206& A OFFSET &1. Connect apatch cord from INPUT Ajack to INPUT Bjack (isolates
R207 BOFFSET
ADJUST quantizer inputs). 2. Adjust trimmer R206 for volts +.005 Von QUANTIZED AOUTPUT.
3. Adjust trimmer R207 for volts +.005 Von QUANTIZED BOUTPUT.
R226& QUANTIZER 1.Put all sliders on the sequencer fully DOWN.
R222 CV V/OCT 2. Put the TRIG/GATE switch in the GATE mode.
®3. Put the sequencer mode switch in the 16 X1POSITION.
4. Put the SEQ/RAND switch in the SEQUENTIAL position.
5. Depress the RESET button (position 1LED should be lit).
6. Put the POSITION 1SLIDER fully UP.
7. Adjust trimmer R266 for +2.00 volts on the QUANTIZED OUTPUT Ajack.
8. Adjust trimmer R222 for +2.00 volts on the QUANTIZED OUTPUT Bjack.
R217 &AMOD ADJUST 1.Put all the sliders on the sequencer fully DOWN.
R218 BMOD ADJUST 2, Put the GATE/TRIG switch in the GATE mode.
3. Put the mode switch in the 16 X1POSITION.
4. Put the SEQ/RAND switch in the SEQUENTIAL position.
5. Depress the RESET button (position 1LED should be lit).
6. Connect apatch cord from INPUT Ajack to INPUT Bjack (isolates
quantizer inputs).
7. Monitor the ASEQUENCER OUTPUT with aDVM.
8. Raise the POSITION 1SLIDER to 1
/
2.
9. Measure and record the EXACT VOLTAGE level on the Asequencer output
•
(should be near +5 volts).
10. Connect apatch cord from the ASEQUENCER OUTPUT jack to the
CV IN jack.
11. Monitor the QUANTIZER OUTPUT Awith aDVM.
12. Adjust trimmer R217 for EXACTLY the same voltage as measured in
step 9(unity gain).
13. Monitor the QUANTIZED OUTPUT Bwith aDVM.
14. Adjust trimmer R218 for EXACTLY the same voltage as measured in
step 9(unity gain).
10

5.2 Power Supply
REF.
R5
R11
TRIMMER
+5 VOLT SET
-15 VOLT SET
TRIM PROCEDURE
1. Monitor the power supply's +15 volt output with adigital voltmeter.
2. Adjust R5 for exactly +1 5.00 volts.
1. Set R5 (+15 volts) first.
2. Put the digital voltmeter's ground lead on the power supply's -15 volt output
and put the meter's plus lead on the power supply's ground output.
3. Adjust R1 1for exactly +15.00 volts (reversed polarity).
SECTION 6ASSEMBLY/DISASSEMBLY
5" ?
tf
•3
1. To Prevent shock when trouble shooting, unplug
the sequencer and mount the power supply on the
outside rear panel (see above illustration).
2. To remove the main printed circuit board, remove
11 bolts (illustrated above), remove all slider knobs
on the front panel, and gently push on the shafts of
the sliders until the board pops loose.
3. To remove the lower jack board assembly, remove
the jack nuts on the lower front panel. Then pull the
bottom of the power switch out so that the jack
board clears the power switch (see illustration to
right).
11

AND
A
B
OR
A
B
_A B_
1
1
11 1
A
B
A
B
-a oo
i
1o
i 1
1
1
i
o
A
B
A
B1
1
1 1
1
CMOS INTEGRATED CIRCUITS
CD4001AE
QUAD 2INPUT
NOR
CD4007AE
a) Triple lnv*rt«rt (14,2,11); (8,13),
SL_^\^.Lr\_» 114,2,. 1); (8,
92CS-I5JJ0
DUAL COMPLEMENTARY
PAIR PL US IN VERTER 14
o
n?
1>
13 3
64 'i o
Us
1
tf
^6j O
12
$
Terminal No. 14 =Vqq
Terminal No. 7=Vss
1
1
1 1
1
1
1
CD4011AE
QUAD 2INPUT
NAND
I
J=A-
G
e—
5
^
4
K=CD
c—
5
^I
10
7
vss
—
M=GH c
CD4011A
CD4013AE
CL' D;RsQ
_/~ ;1
_y~ 11
~\_ XQQ
XX1o;o:i
X X 110
XX1i111
NO
CHANGE
DUAL 'D' TYPE
FLIP-FLOP
T6
iLo,
as,
Li 2
0,-5
CLOCK ,-£
I
F/FI
I
CLOCK2—
SESET2l0
I
F/F2
I
i: SS
CD4016AE
QUAD BILATERAL
SWITCH

CD4024AE
7STAGE BINARY
COUNTER
1-*-
INPU T'
PULSED
<*frSET
-2l_o,
04
g
A
07
i
it
CD4025AE
TRIPLE 3INPUT
NOR 14
-1 11^
12-
12
4^1 II
5n10
K-OtE+F
78
J= AtT»c
CD4028AE
BINARY TO
OCTAL DECODER
TABLE t-TRUTH TABLE
PCBAQ1234S6709
00001000000000
00010100000000
00100010000000
001 10001000000
01000000100000
01010000010000
01 100000001000
01 110000000100
10000000000010
10010000000001
V0D
I6|
3-BIT 1OCTAL
BINARY DECODED
INPUTS 2OUTPUTS
(I0F6J
L46-BUFFERED
INPUTS 12 5'DECIMAL
DECODED
74OUTPUTS
9^ItOFlOl
knft
9|
5J
J
vss 9ICS-iSiSi
CD4042AE
QUAD CLOCKED
D' LATCH
CLOCK POLARITY
sLATCH
11D
n_ 1LATCH
tO-
oO-
«o-
CLOCK
sO-
-O!
-O'
^-O «J
-O"
POLAfllTY
CD4051AE
'"*?
8CHANNEL
MULTIPLEXER
(SIGNAL GATE)
CD4071BE
QUAD 2INPUT
OR
CD4520BE
DUAL BINARY
UP COUNTER
MC14528CP
DUAL
MONOSTABLE
MULTIVIBRATOR
INPUT STATES "ON" CHAW
CD4051A
INHIBIT c- BA
11
17
113
4
15
16
1 1 7
1• * NONE
:Don't care condition
CLOCK A
ENABLE A
c
*'%6
R
—QIA
4
—02A
-*-03A
-^04A
RESET A71
CLOCK B
c
+'0/
-
fl
—OIB
-*Q2B
UQ3B
^Q4B
ENABLE B''
RESET B,j- J
92CS- 24506
CD4518B/CD4520B
FUNCTIONAL DIAGRAM
BLOCK DIAGRAM
—ovOD
rn2
so
—
q/b _y
Tl, T2
O.
O
-
-ovDD
30 V
il •"x
r- n4
no
—
q/b J
T1 T2
Q
ents.
130
Ry and Cxar
V
\
eextern
'ss -Pi
1compon
i16
8
13

PARTS LIST
BOARD 1
REFERENCE ARP PART NUMBER ARP/MFG NUMBER DESCRIPTION
CR1,2,20,23,24 1200301 IN4148 DIODE, SIGNAL
CR4-19 5704801 DIODE, LIGHT EMITTING
Q4,5 7500801 TSTR ASSY, NPN/PNP
Ql, 2, 3, 9, 11-27 1302901 2N3904 TSTR, NPN, GP
Q6, 7,8, 10,29-36 1303001 2N3906 TSTR, PNP, GP
Z4,S 1400501 CA3086 IC, TSTR ARRAY
Z18, 19, 26, 29, 34, 35 5601801 IC, OP AMPL, DUAL
Z23 5601901 IC, OP AMPL, SELECTED
Z9.27 1404301 CD4001AE IC, GATE, 4X21 NOR
Z3, 31,32, 33 1404201 CD4007AE IC, CMOS PAIR, PLUS INVERTER
Zl,6, 12, 15, 24 1400601 CD4011AE IC, GATE 4X1 NAND
Z2.28 1404401 CD4013AE IC, DUAL D, FF, SET/RESET
Z30 1404501 CD4016AE IC, QUAD BILATERAL SWITCH
Z25 1400901 CD4024AE IC, BINARY COUNTER, 7BIT
Z10 1404601 CD4025AE IC, GATE, 3X31 NOR
Z13.14 1404701 CD4028AE IC, BCD-TO-DECIMAL DECODER
Z8 1404801 CD4042AE IC, QUAD CLOCKED 'D' LATCH
Z21.22 1404901 CD4051AE IC, SINGLE 8-CHANNEL MLTPLX
Z16.17 1405101 CD4071BE IC, GATE, 4X21 OR
Z7 1405201 CD4520BE IC, DUAL BINARY UP COUNTER
Zll 1405301 MC14528CP IC, DUAL MONOSTABLE MULTIVIB
Z20 5704101 IC, RESISTOR PACK
R222.226 1000904 U201R102B POT, ROTARY, IK, 'AW, 30%
R217.218 1000906 U201R252B POT, ROTARY, 2.5K, V4W, 30%
R19,26,206,207 1000915 U201R104B POT, ROTARY, 100K, ViW, 30%
R15, 25, 57, 60,63,66 v^5700703 POT, SLIDE, LIN, 100K, 1/3W, 30%
69,72,75,78,82,85,
88,91,94,97,100,
103
R14 5700702 POT, SLIDE, AUD, 100K, 1/3W, 30%
CI,
2
1100612 G-0-010-G-20-0 CAP, TANT, 10UF, 35V, 20%
SI,3, 23 1903001 DC-51-01 SWITCH, MOMENTARY, SP
S2.21 1902401 01-481-0006 SWITCH, SLIDE, DPDT
S4 1900701 01-481-0005 SWITCH, SLIDE, 4PDT
S5-20.22 1900601 01-481-0004 SWITCH, SLIDE, DPTT
P23-27 2102901 09-64-1067 CONN, PLUG, WAFER, 6-PIN
2102801 10-18-2031 CONN, RECEPTACLE, 3-PIN
BOARD 2
REFERENCE ARP PART NUMBER ARP/MFG NUMBER DESCRIPTION
CR22 5704501 DIODE
Jl, 6, 10-15, 20-22 2101201 142A JACK TINI-D
2503301 MP52 CLIP, MOUNTING, LED
BOARD 3
REFERENCE ARP PART NUMBER ARP/MFG NUMBER DESCRIPTION
J2, 3, 4, 5, 7,9,16, 2101201 142A JACKTINI-D
17,18,19,30,31,
32,22
J25,26,27 2101803 09-52-3062 CONN, BODY, PLUG, 6-PIN
POWER SUPPLY
REFERENCE ARP PART NUMBER ARP/MFG NUMBER DESCRIPTION
CR1-4 1200401 IN4448 RECTIFIER,SILICON, 75V, 200MA
Ql,5 1303401 2N6179 TSTR, NPN, PWR
Q4,6 1302901 2N3904 TSTR, SILICON, NPN
Q2,3 1303001 2N3906 TSTR, SILICON, PNP
Zl 1401301 U6A7723393C IC, VOLTAGE REGULATOR
R5.11 1000915 U201R104B POT, ROTARY, LIN, VtW, 10%, 100K
C3,4 1100612 G-0-010-G-20-0 CAP TANT, 35V, +50%-20%, 10UF
CI,
5
1101701 B41010-250/50 CAP ELECT, 50V, +50%-10%, 250UF
Tl 5701101 C2804-008 TRANSFORMER, POWER
Fl 1700402 MDV-1/8 FUSE, PIGTAIL, 1/8A, 250V
22