ARP Odyssey I 2800 User manual

MODELS 2800 THROUGH 2823

SECTION 1PRELIMINARY INFORMATION
1.1 Introduction
This service manual is divided into three major
sections: A) Circuit Descriptions, B) Trim Pro-
cedures, and C) Board Test Points. The circuit
descriptions should be consulted when aproblem is
suspected in aparticular area of the instrument.
The trim procedures should be used to verify cali-
brations or when acomponent has been changed.
The board test points are aquick reference to verify
circuits with suspected problems and should be
checked whenever aproblem has been identified.
1.2 Board Identification
Three types of Odyssey models have been produced:
I) 2800, 2) 2810-2815 and 3) 2820-2823. The model
and serial number are located at the rear or bottom
of the Odyssey chassis. Except for 2800, atypical
number might read: 2813-0490. For model 2800,
the first two digits of the serial number denote the
model, such as: 28490. Listed below are the board
identification numbers for each model; they will be
referenced in the service manual by model number
for easy identification.
ODYSSEY-
1
Model 2800
Board: A-1
B-1
C-1
PWR SUP-1
ODYSSEY!
!
Model 2810-2813 Model 2820-2823
Board: A-ll Board: A-ll (with PPC)
B-ll B-l I
C-ll C-ll
PWR SUP-II PWR SUP-1
1
Note: Some Odyssey-2 models employ the older
style Board B-L
1.3 Model Changes
The Odyssey has undergone major cosmetic and
electrical changes since its original production in
1972, however, the functional capabilities have
remained virtually unchanged. The following are
the most noticeable physical differences among
models:
MODEL 2800
Black and white face panel (some later models
have black and gold face panels).
Pitch Bend knob
No Factory installed interface jacks.
Wrap around vinyl bottom cover.
MODEL 2810-2813
Black and gold face panel.
New style power switch.
Factory installed interface jacks*
Pitch Bend knob. (Some later models have
PPC.)
Wrap around vinyl bottom cover.
MODEL 2820-2823 (current model, Odyssey '78)
Black and orange face panel-
Steel chassis
Leather endblocks -
PPC
The major electrical changes found in the Odyssey-ll *
as compared to the Odyssey-I are:
1. Uses 24db/octave filter in place of 12db/
octave.
2. Improved VCO design for better tracking*
and stability.
3. Improved power supply regulation.
4. Improved keyboard current source for C
V
generation.
5. Improved S/H memory circuit design.
1.4
Revisions/Changes
1.4.1 MODIFICATION KITS
The following modifications are available from the
Factory for updating older style Odysseys:
Modification For Model Kit No.
Interface Jacks 2800 6800101
PPC 2810-2815 6800301
PPC 2800 6800501
1.4.2 KEYBOARD CONVERSION
The Odyssey-ll is designed to be used with atwo bus
keyboard. When an Odyssey-ll is used with athree
bus keyboard, an interface board is inserted on the
molex pins on Board All to make the keyboard
compatible with the electronics. Illustrated below

1.4.3 TYPES OF VOLTAGE CONTROLLED FILTERS
The 4023 voltage controlled filter is no longer avail-
able from the Factory. Instead, the newer 4075 filter
can be used to replace the 4023 with the following
modification (see Field Change Notice 007):
The earlier model Odyssey-lls used a4035 voltage
controlled filter, which has since then been replaced
by the 4075. No modifications are necessary when
replacing a4035 filter with a4075.
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Voltage Controlled Filter
Type: Low pass
Frequency range: 16 Hz to 16 KHz
Maximum usable Q: 30
Resonance Va to self oscillate
Voltage controlled response: IV/oct.
1.4.4 NOISE MODIFICATION
The newer style Odysseys use azener diode as anoise
source instead of anoise transistor. Defective noise
transistors can be replaced with azener diode, pro-
vided the following circuit modification is performed:
Zener diodes tend to produce agreater spectrum of
white noise with little or no noise break-up.
1.9 Specifications
Noise Generator
Noise spectrum types: White and Pink
Voltage Controlled Oscillators
Waveforms: Sawtooth, Square, Pulse, Dynamic Pulse
Frequency range: VCO 1in low freq. mode, .2 Hz
to 20 Hz; VCO 1and VCO 2(audio range),
20 Hz to 20 KHz
Warm up drift: 1/30 semitone from turn on max.
Pulse width: 50% to 5%
Pulse width modulation: ADSR, +45%; LFO, +15%
Voltage controlled response: IV/oct.
Maximum frequency shifts: LFO sine wave, +%
oct.; LFO square wave, +1.5 oct.; ADSR +9oct.;
S/H +2 oct.
Note: VCO 1is alow note priority; VCO 2is high
note priority
Transpose
Positions: Down 2octaves, normal, up 2octaves
Pitch Bend
Frequency shift: About +1oct. (exactly 1octave
on Odyssey-2)
PPC
Frequency shift: About 5semitones ±1 semitone.
Portamento
Maximum speed: About .01 msec./oct.
Minimum speed: About 1.5 seconds/oct.
Ring Modulator
Type: Digital
Input signals: VCO 1and VCO 2pulse waves
Voltage Controlled Amplifier
Dynamic Range: 80dB
Sample and Hold
Command sources: Keyboard or LFO trigger
Sampled signals: VCO 1square wave and sawtooth
wave, VCO 2square wave and pink noise
ADSR Envelope Generator
Attack time: 5msec, to 5seconds
Decay time :10msec, to 8seconds
Sustain level: 0to 100% of peak
Release time: 15 msec, to 10 seconds
AR Envelope Generator
Attack time: 5msec, to 5seconds
Release time: 10 msec, to 8seconds
Audio Outputs
High level: 2.5VPP max.; 100K impedance
Low level: .25VPP max.; 10K impedance
Interface Jacks
Keyboard CV IN/OUT: IV/oct.
Gate OUT:+10V, key down; 0V all keys up
Gate IN: +8V minimum
Trigger OUT: +10V pulse on key depression, 10
microsec. duration
Trigger IN: +8V pulse min., 10 microsec. duration
minimum
External Audio Input: 500 millivolts for full output

4

Model
2800
(Odyssey
1
&
2)
Interconnect
Diagram
5

del
2820
-
2823
Interconnect
Diagram
6

SECTION 2CIRCUIT DESCRIPTIONS (Board A-l)
2.1.1 Trigger Circuit
Each key on the keyboard has its own capacitor-
resistor-diode network. The capacitors are normally
charged to +15 volts until akey is depressed at which
time the capacitor discharges through the diode
creating atrigger pulse on the trigger bus rod. Q1
through Q4 are amonostable multivibrator which
delays the trigger pulses 15 milliseconds to allow
the gate and CV to stabilize.
2.1.2 PITCH BEND
PI, the pitch bend control, supplies acontrol voltage
to both VCOs on Board B. CR4 and CR5 create a
'dead' zone when the control is centered.
2.1.3. CURRENT SOURCE
Q5 supplies constant current to aresistor divider
chain made up of thirty-six 100 ohm resistors con-
nected in series. The CV contacts are located at the
junction of each of the 100 ohm resistors to supply
aspecific voltage to the control voltage memory
when akey is depressed. There is athree volt drop
across the entire resistor chain, or one volt per octave.
T1, the Volts/Octave trimmer, adjusts the current
through the resistor chain to produce the correct
voltage drop across the keyboard.
2.1.4. TRANSPOSE SWITCH
Half of the transpose switch is connected to the
bottom end of the resistor chain to, in effect, add
two or four octaves worth of resistance (about
1200 or 2400 ohms) to the resistor chain. This raises
the control voltage level supplied to the CV memory.
The following chart summarizes the CV output for
low 'C' and high 'C' on the keyboard for each of the
transpose switch positions:
TRANSPOSE LOW HIGH
SWITCH: •c* *C*
DOWN 2OCT. 0V+3 V
NORMAL +2V+5 V
UP 2OCT. +4 V+7V
2.1.5 CV Memory Circuit
Q6 and A1A are aFET input op amp which buffers
the voltage from the keyboard CV bus and supplies
it to the memory circuit through R23 and CR3.
When akey is depressed, +15 volts is supplied from
the keyboard gate through CR2 and R21 which
reverse biases CR3 and allows Q7 to conduct. The
control voltage from A1A is then allowed to charge
the memory capacitor, C8. When akey is released,
Q7 turns off to prevent C8 from discharging. Q8 and
A1B are aFET op amp which buffers the control
voltage on C8 and supplies it to the control input of
VCO 1and VCO 2on Board B and to the VCF on
Board C.
2.1.6 Second Voice CV Generator
When two or more keys are depressed, asection of
the resistor chain is effectively shorted out which
drops the voltage at the top end of the resistor chain.
This voltage drop corresponds to the Voltage dif-
ference' between two held keys. A2A is aunity gain
buffer which monitors the voltage at the top of the
resistor chain and supplies it to A2B. A2B sums the
voltage from A2A with the voltage supplied by R31
and R30. These resistors are selected to produce zero
volts on the output of A2B when either no keys or
one key is depressed.
When two or more keys are depressed, the voltage at
the top end of the resistor chain drops, which, in
turn, decreases the voltage supplied to Z2B. Z2B
then supplies the difference voltage to the control
input of VCO 2where it is summed with the
control voltage from the CV memory circuit. This
summation allows VCO 2to be controlled by the
highest key depressed. Since VCO 1is fed the con-
trol voltage from the CV memory only, its pitch is
controlled by the lowest key depressed.
2.1.7 Noise Generator
The noise generator circuit produces 10VPP white
and pink noise signals which are supplied to the VCF
audio input and the S/H mixer. The noise is obtained
by amplifying areversed biased transistor junction
(Q9) in avalanche breakdown. Q9 is atransistor
selected for optimum avalanche characteristics; and
therefore, has good noise producing capability. A3
amplifies and clips the noise signal. A3 filters the
noise to provide pink noise to the VCF and S/H.
The remaining half of the transpose switch com-
pensates the second voice control voltage for the
difference in the resistor chain resistance.

CIRCUIT DESCRIPTIONS (Board B-l)
2.2.1 Sample &Hold (S/H)
The sample and hold circuit provides aDC voltage
output by sampling and storing the instantaneous
voltage level of signals on its input each time atrigger
pulse is provided. This stored voltage is held until the
next trigger pulse occurs. Signals which are to be
sampled and applied to pin 3of A3. A3 is an op-
erational transconductance amplifier (OTA), which
is used as a gated voltage follower: when apulse is
applied to pin 5of Z3, capacitor C7 charges to the
voltage level on pin 3. This voltage level is held until
another pulse is applied to pin 5. Q3 buffers the
voltage on C7 and supplies it to A2B through the lag
slider (P16). A2B is aunity gain buffer. The sample
and hold output is supplied to the control inputs of
VCO 1and VC02 and to the VCF on Board C.
2.2.2 Low Frequency Oscillator (LFO)
The LFO produces atriangle and square wave output
in afrequency range from about .1 Hz to 25 Hz.
Z1A and C3 are an integrator which charges from
current passing through R11. Z1B is ahysteretic
switch whose output switches from -15 volts to +15
volts when the output of Z1A reaches +5 volts. This
then reverses the direction of current through R11
and the rate control (Z5) and thus the direction of
integration at the output of Z1A. When the output
of Z1A reaches -5 volts, the output of Z1B switches
back to -15 volts and the cycle repeats.
An LFO reset pulse is supplied from the keyboard
every time akey is depressed. Q1 and Q2 are turned
on momentarily by the keyboard trigger pulse to
discharge the integrating capacitor (C3) thus reini-
tializing the LFO to zero.
2.2.3 Voltage Controlled Oscillators (VCO)
Oscillator circuit (VCO 1&2): Control voltages
from the keyboard, initial frequency and fine tune
sliders, pitch bend (2800 only) and both FM input
sliders are summed on the base of Q4. Q4 and Q5 are
alinear voltage to exponential current generator; for
every volt applied from the keyboard, the current
through Q5 will double. Cl 2is the integrating
capacitor; it is initially charged to +15 volts and
discharges through R51 and Q5 toward ground. Q5
determines the discharge time of the capacitor and
therefore the period of oscillation. Z1D is aCMOS
nand gate used as acomparator. When the voltage on
pin 12 of Z1D falls below +7.5 volts, the output of
Z1 (pin 11) changes from zero volts to +15 volts
which turns on Q10, Q7 and Q6. Q6 recharges the
integrating capacitor (Cl 2) to +15 volts to start the
cycle over again.
Q8 buffers the sawtooth wave on Cl 2and supplies it
to the sawtooth to pulse converter and Q9, the
output emitter follower. The oscillator circuit for
VCO 2is the same as VCO 1. When the 'SYNC'
switch is on, the reset pulse from VCO 1 is applied to
Z2D which causes VCO 2to reset at the same time as
VCO 1, regardless of the voltage level on pin 12 of
Z2D. The waveform on the output of VCO 2is then
synchronized with VCO 1.
Sawtooth to square wave converter: Z1A and Z1B
are aR-S flip-flop with pin 8used as acomparator.
The reset pulse from Z1C is supplied to pin 1and the
sawtooth wave to pin 8. As the sawtooth wave is
raised above the zero reference by the pulse width
trimmer and sliders (T2, P8 and P9) the flip-flop will
change state on adifferent point of the sawtooth
slope resulting in adifferent pulse width. With all
of the pulse width sliders on the front panel at mini-
mum, the pulse wave should be square (50% duty
cycle). The pulse wave output is supplied to the
audio input of the VCF on Board Cand to the ring
modulator circuit on Board B.
2.2.4 Ring Modulator
The ring modulator utilizes two CMOS nand gates
(Z1B and Z2B) and Q18 in an exclusive 'or' functiorf.
Square waves from VCO 1and VCO 2are supplied
to pin 5of Z1 and Z2 and the output is taken from
the emitter of Q18.
GATE TRUTH TABLES
9
NAND GATE EXCLUSIVE OR
ABCABC
001000
01101 1
101011
1 1 0110
VCO 1
i
1
VCO 2
RING MODULATOR OUTPUT

CIRCUIT DESCRIPTIONS (Board C-l)
2.3.1 Voltage Controlled Filter (VCF)
Audio signals from both VCOs, the ring modulator,
and the noise generator are applied to the audio input
of the voltage controlled filter (pin 1, 4023) through
Cl. Control voltage from the S/H, LFO, KYBD CV,
and the envelope generators are summed and inverted
by A1. The control input of the VCF accepts
negative going control voltages; as the voltage on pin
3of the 4023 module is decreased, the filter cutoff
increases. Signals on the output of the VCF (pin 10)
are fed back to the resonance input (pin 2) via the
resonance slider, (P2).
2.3.2 Voltage Controlled Amplifier (VCA)
Audio signals from the VCF are processed through
the high pass filter (C3, R13 and P3) and connected
to the noninverting input of A3. A3 is an operational
transconductance amplifier (OTA) whose gain is a
function of the current supplied to pin 5. Control
voltages from the two envelope generators and the
VCA gain slider are connected to Q1 which supplies
current to the OTA. T2, the control reject trimmer,
balances the inputs of the OTA to minimize the
effect of control voltages on the audio output of the
VCA.
2.3.3 AR Envelope Generator
The Attack-Release envelope generator produces a
control voltage with variable rise and fall times. It is
used to control the VCF or the VCA. When agate
voltage is supplied by the keyboard or the LFO
through S10, Q4 turns on which charges capacitor
C7 through P5, R32 and CR5. The position of P5
(Attack Slider) determines the time C7 takes to
charge up. When the gate voltage is removed, Q4
turns off which allows Q5 to turn on. The voltage on
C7 then discharges through CR6, P6, R31, and Q5.
P6 (Release slider) sets the release time. Q6 and Q7
buffer the voltage on C7 and supply it to the VCA
and VCF.
2.3.4 ADSR Envelope Generator
The Attack-Decay-Sustain-Release envelope generator
produces acontrol voltage with variable rise and fall
times. It is used to control the VCF or the VCA and
agate and trigger signal must be supplied from the
keyboard or LFO to start the ADSR voltage rising.
Attack: When agate signal (+10 volts) is supplied
through S8, Q8, Q9 and Q10 turn on which then
allows Q16 to turn off. With Q16 off, a trigger
applied through C9 and R55 will momentarily turn
GATE
NOTE: The ADSR is initiated with agate and trigger volt-
age, and the AR envelope requires only the gate.
on Q18 and Q17. Q17 then supplies +15 volts
through CR18, CR19, CR17 and R57 to hold Q18
on. Q18 and Q17 (the attack latch) now supplies
+15 volts through the attack slider (P4), R43, and
CR9 and charges up the integrating capacitor, C8.
Q12, Q13, and Q14 buffer the voltage on C8 and
provides it to the VCA and VCF. Q15 is the peak
detector which monitors the output of the ADSR.
When the ADSR voltage reaches its maximum, (about
+10 volts), Q15 will turn on and provide this voltage
to the base of Q16 through CR15. Q16 then grounds
out the voltage on the base of Q18 to unlatch Q18
and Q17 and end the attack portion of the ADSR
cycle.
Decay &Sustain: When the attack portion of the
ADSR cycle has completed, the voltage on C8 is
allowed to discharge through CR11, R47, and the
decay slider (PI 5) to the emitter of Q11. The sustain
slider (PI 6) sets the voltage level on the base of Q1 1.
When the voltage level on the emitter of Q1 1falls
below the level on the base, Q1 1turns off and
prevents the voltage on Q8 from discharging further.
Release: When the gate is removed, the remaining
voltage on C8 is discharged to ground through CR10,
R44 and the release slider (PI 7).

CIRCUIT DESCRIPTIONS (Board All)
2.4.1 Keyboard Current Source
The keyboard current source supplies constant
current through thirty-six 100 ohm resistors con-
nected in series. These resistors are avoltage divider
supplying specific voltages for each key on the key-
board. The top end of the resistor chain is connected
to J2-5 and the low end to J2-6. The current source
produces a3volt drop across the entire keyboard, or
1volt per octave. The keyboard voltage is fed to
the CV memory via the CV bus rod.
Pin 7of Z2A (high end of the resistor chain) is 0
volts when either no keys or one key is depressed and
pin 6of Z2A (low end of the resistor chain) is +3
volts. When two keys are depressed, the contacts and
bus rod short out asection of the resistors in the
divider chain which reduces the gain of Z1A thereby
raising the voltage on Z2A pin 7. This voltage
increase represents the voltage difference between
two held keys. When this difference voltage is sub-
sequently added to the control voltage at the control
input of VCO 2(Bd. B), high note priority control
over the pitch of VCO 2is produced.
2.4.2 Control Voltage Memory
Control voltages supplied from the keyboard CV bus
are buffered by aunity gain amplifier, Z4A. This
voltage is then supplied to the memory capacitor C8
through the portamento slider (R30) and the gating
FET (Q3). Q3 is turned on by the gate generator
circuit only while akey is depressed. Q4 and Z4B are
aFET follower with high input impedance to buffer
the voltage on capacitor C8. J3-1 and J3-2 are
connected to the portamento footswitch jack so that
the portamento slider can be bypassed while the foot-
switch is plugged in.
2.4.3 Pitch Bend
Pitch Bend: The Pitch Bend control supplies an off-
set voltage to Z2B to be summed with the control
voltage from Z4B (CV memory). CR3 and CR4
create a'dead' zone when the control is centered and
R27 calibrates the output to exactly plus and minus
avolt.
2.4.4 PPC
The PPC circuit contains three resistive carbon strips,
three conductive rubber strips and various summing
resistors. Each end of the carbon strip is connected
to adesignated voltage source, while each end of the
conductive rubber is making contact with the sum-
ming resistors. As the PPC button is depressed, the
conductive rubber makes contact at various points
on the carbon strip which, in turn, provides various
degrees of control voltage to the summing resistors.
The conductive rubber is tapered so that maximum
sensitivity is achieved at the top of the button.
2.4.5 Transpose Switch
Transpose: The transpose switch also supplies an
offset voltage to Z2B to be summed with the control
voltage from Z4B. R23 calibrates the output to
exactly plus and minus 2volts.
2.4.6 Summing Circuit
Summing: The output of Z4B is +3 volts when high
'C' is depressed and 0volts when low 'C' is depressed.
This control voltage is summed with the offset
voltages from the transpose and pitch bend circuits
on the input of Z2B. Z2B is aunity gain inverter
whose output will be 0volts with low 'C' depressed
(pitch bend and transpose in the normal position)
and +3 volts with high 'C' depressed. This voltage is
supplied to the VCOs on Board B(pitch control) and
the VCF on Board C(filter cutoff control).
2.4.7 Gate Generator
Each gate contact on the keyboard is connected to
a2.2K ohm resistor to ground. When akey is de-
pressed the gate bus voltage drops from +15 volts to
about +10 volts which turns on Q1. Q1 supplies two
gate signals:
2.4.8
Trigger Generator
When akey is depressed, the gate bus voltage drops
from +15 volts to about +10 volts. Additional key
depressions will drop this voltage still further. These
voltage transitions are coupled through capacitor Cl
and R4 to Q2. Capacitor C2 is charged to +15 volts
by Q2 when akey is depressed. Z1C and Z1D are
CMOS nand gates (threshold is +7.5 volts). As C2

charges up, Z1D pin 11 will produce a10 millisecond
pulse (the pulse width is determined by C2) which
is supplied to Q8. Q8 will conduct during the fall of
the pulse from Z1D to provide a+10 volt trigger
pulse (20 microsecond duration) to Board Cand B.
Trigger pulses from external sources are coupled
through C20, Z1A and Z1B to Q8. Z1A and Z1B
are connected in parallel to increase drive.
audio input and the S/H mixer. The noise is obtained
by amplifying areversed biased transistor junction
(Q5) in avalanche break down. Q5 is atransistor
selected for optimum avalanche characteristics and
therefore has good noise producing capability. Q6
is abuffer and Z5 amplifies and clips the noise signal.
Z3 filters the noise to provide pink noise to the VCF
and S/H.
2.4.9 Noise Generator
The noise generator circuit produces 10VPP white
and pink noise signals which are supplied to the VCF
CIRCUIT DESCRIPTIONS (Board B-ll)
2.5.1 Sample &Hold (S/H)
The sample and hold circuit provides aDC voltage
output by sampling and storing the instantaneous
voltage level of signals on its input each time atrigger
pulse is provided. This stored voltage is held until
the next trigger pulse occurs. Signals which are to be
sampled are applied to pin 3of Z1A. Z1A amplifies
and buffers the signal and supplies it to Q1. When a
trigger from either the LFO or the keyboard is
received through C3, Q1 conducts just long enough
for the memory capacitor (Cl) to assume the new
voltage level. Then Q1 turns off until another trigger
is supplied. Q2 and Z2A are aFET op amp follower
which buffers the voltage on Cl and provides it to the
lag circuit (R15 and C2) and the output buffer (Z2B).
Noise
Generator
LFO
Trigger
S/H
Output
NOTE: The more recent model Odysseys employ a
zener diode instead of anoise transistor. See the re-
visions section 1.4.4 for the circuit change.
of Z5A. When the output of Z5A reaches -5 volts,
the output of Z5B switches back to -15 volts and the
cycle repeats. An LFO reset pulse is supplied from
Q4 every time akey is depressed. Q5 is turned on
momentarily by the LFO reset pulse and discharges
the integrating capacitor (C7) thus reinitializing the
LFO output to zero.
2.5.3 Voltage Controlled Oscillators (VCO)
Control voltages from the keyboard, initial fre-
quency and fine tune sliders, the sample and hold
circuit, LFO square wave and sine wave, and the
ADSR are summed on the base of Q6. Q6 and Q7 are
alinear voltage to exponential current generator; for
every volt applied to the control input of the VCO
from the keyboard, Q6 will conduct twice as much
current. Cl 1is the integrating capacitor; it is initially
charged to 15 volts and discharges through R61
and Q7 towards ground. Q7 determines the discharge
current of the capacitor and therefore the period of
oscillation. Q9 buffers the voltage on C11 and
supplies it to acomparator, Z3B and Z3A. Pin 2of
Z3A is fixed at about +7.5 volts. When the voltage
on pin 4of Z3B decreases to below +7.5 volts, Z3A
turns on Q1 1which supplies +15 volts to the gate of
Q8. Q8 then charges capacitor Cl 1back to +15 volts
to start the cycle over again.
2.5.2 Low Frequency Oscillator (LFO)
The LFO produces atriangle and asquare wave out-
put in afrequency range from about .1 Hz to 25 Hz.
Z5A and C7 are an integrator which charges from cur-
rent passing through R33. Z5B is ahysteretic switch
whose output switches from -15 volts to +15 volts
when the output of Z5A reaches +5 volts. This
change in output polarity then reverses the direction
of current through R33 and the rate control (R34)
and thus the direction of integration of the output
R63. CIO and R59 supply current to Q7 as the
frequency of the oscillator is increased to prevent the
oscillator from going flat due to the recovery time of
the circuit. Q12 is aphase splitter which takes the
sawtooth from pin 3of Z3 and supplies it to the
oscillator output and the pulse converter. The wave-
form on the emitter of Q12 is 7.5VPP negative going
(+7.5 volts offset), and the collecter is about 5VPP
positive going (zero referenced).
Sawtooth To Pulse Converter: Z3C and Z3D is a

slider (R87) sets the voltage level on the base of Q1 1*
When the voltage level on the emitter of Q11 falls
below the level on the base, Q11 turns off and pre-
vents the voltage on Q8 from discharging further.
CIRCUIT DESCRIPTIONS (Power Supply)
-15 Volt Supply: The -15 volt supply derives its
regulation from the +15 volt supply through R8.
When the output of the -15 volt supply is at the
correct voltage, the junction of R8 and R12 is zero
volts. The base of Q2 is referenced to zero volts
through R9. Should the output of the minus supply
increase, the voltage on the base of Q3 will also
increase which begins to turn off Q3. Q2 conducts
more current which requires Q4 to conduct more.
Q4 drives the pass transistor (Q5) which then con-
ducts more current thereby lowering the output to
-15 volts.
+15 Volt Supply: Z1 contains avoltage reference
which supplies +7.4 volts to pin 6of Z1. This voltage
Release: When the gate is removed, the remaining
voltage on C8 is discharged to ground through CR10,
R44 and the release slider (R88).
is connected through pin 5to the noninverting input
of an op amp. The output of the op amp is con-
nected to an emitter follower, also located in Z1,
which controls the pass transistor (Q1 ).Should the
output of the power supply change, the voltage at
the junction of R3 and R6 will supply the inverting
input of the op amp in Z1 with the voltage differ-
ence. The op amp will then supply acorrection
voltage to the emitter follower and pass transistor and
bring the power supply's voltage to normal.
Short circuit protection: R2 and the transistor in Z1
connects to pins 2and 3limit the +15 supply's
current to amaximum of 180 milliamps. Q6 and
R16 limit the -15 supply's current to amaximum of
150 milliamps.
NOTE: Although the circuit description above is for the Power Supply -// Board,the information applies
to the the Power Supply -/Board as well. The schematics and reference numbers for the two supplies are
different,but the circuits are the same.

slider (R87) sets the voltage level on the base of Q1 1*
When the voltage level on the emitter of Q11 falls
below the level on the base, Q11 turns off and pre-
vents the voltage on Q8 from discharging further.
CIRCUIT DESCRIPTIONS (Power Supply)
-15 Volt Supply: The -15 volt supply derives its
regulation from the +15 volt supply through R8.
When the output of the -15 volt supply is at the
correct voltage, the junction of R8 and R12 is zero
volts. The base of Q2 is referenced to zero volts
through R9. Should the output of the minus supply
increase, the voltage on the base of Q3 will also
increase which begins to turn off Q3. Q2 conducts
more current which requires Q4 to conduct more.
Q4 drives the pass transistor (Q5) which then con-
ducts more current thereby lowering the output to
-15 volts.
+15 Volt Supply: Z1 contains avoltage reference
which supplies +7.4 volts to pin 6of Z1. This voltage
Release: When the gate is removed, the remaining
voltage on C8 is discharged to ground through CR10,
R44 and the release slider (R88).
is connected through pin 5to the noninverting input
of an op amp. The output of the op amp is con-
nected to an emitter follower, also located in Z1,
which controls the pass transistor (Q1 ).Should the
output of the power supply change, the voltage at
the junction of R3 and R6 will supply the inverting
input of the op amp in Z1 with the voltage differ-
ence. The op amp will then supply acorrection
voltage to the emitter follower and pass transistor and
bring the power supply's voltage to normal.
Short circuit protection: R2 and the transistor in Z1
connects to pins 2and 3limit the +15 supply's
current to amaximum of 180 milliamps. Q6 and
R16 limit the -15 supply's current to amaximum of
150 milliamps.
NOTE: Although the circuit description above is for the Power Supply -// Board,the information applies
to the the Power Supply -/Board as well. The schematics and reference numbers for the two supplies are
different,but the circuits are the same.

SECTION 3TRIM PROCEDURES NOTE: The following procedures must be performed in the order presented.
3.1 Power Supply-1 Trim Procedure NOTE: Always execute Power Supply trims first.
REF. TRIMMER TRIM PROCEDURE
T2 +15 VOLT SET 1.Monitor the power supply's +1 5volt output with adigital voltmeter
2. Adjust T2 for exactly +1 5.00 volts.
15 VOLT SET 1.Set T2 (+1 5volts) first.
2. Put the digital voltmeter's ground lead on the power supply's -15 volt output
and put the meter's plus lead on the power supply's ground output.
3. Adjust T1for exactly +1 5.00 volts (reversed polarity).
3.2 Board A-l Trim Procedures
V/OCT
T3 NORM
1. Monitor pin 8on Board A(CV-1 on the interconnecting board) with adigital
2.
6.
7.
8.
volt meter.
Put the TRANSPOSE switch in the DOWN 2OCTAVES position.
3. Pin low 'C' on the keyboard.
4. Measure the voltage on pin 8(CV-1 ).
5. Pin high 'C' on the keyboard. Pin high 'C' on the keyboard.
Adjust the V/OCT trimmer on Board A(T1) for exactly 3volts higher than
the voltage measured in step 4.
Pin low 'C' on the keyboard.
Put the TRANSPOSE switch in the NORMAL position.
9.
Adjust the NORM trimmer (T3) for exactly 2volts higher than step 4.
T4 UP 2OCT 10. Put the TRANSPOSE trimmer in the UP 2OCTAVES position.
11. Adjust the UP 2OCT trimmer on Board A(T4) for exactly 4volts higher
than step 4.
T2 2ND VOICE 12. Put the TRANSPOSE switch in the NORMAL position.
13. Monitor pin 6on Board A(CV-2 on the interconnection board) and measure
14.
the exact voltage with aDVM (should be about 15 millivolts).
Put the TRANSPOSE switch in the UP 2OCTAVES position.
15. Adjust the 2ND VOICE trimmer on Board A(T2) for exactly the same
voltage as measured in step 13.
3.3 Board B-l (& B-ll) Trim Procedures NOTE: The reference numbers for the B-l/boards are in parenthesis.
T2&
T5
(R141
,
R80)
T3&
T6
(R118,
R42)
VCO 1&2
50% PULSE
WIDTH
1.Put the TRANSPOSE switch in the normal position.
2. Depress akey in the middle of the keyboard.
3. Monitor TP-5 (square wave output) with an oscilloscope.
4. Adjust the VCO 1(or VCO 2) COARSE FREQUENCY slider to display
exactly one complete cycle.
5. Adjust the 50% PULSE WIDTH trimmer until the duty cycle of the waveform
is exactly 50% (exactly square).
VCO 1&2
CALIBRATE
4
1. Monitor TP-5 in VCO 1(or VCO 2) with either an oscilloscope or afrequency
counter.
2. Put the VCO 1(or VCO 2) COARSE FREQUENCY slider DOWN fully.
3. Put the VCO 1(or VCO 2) FINE TUNE slider exactly in the MIDDLE.
4. Pin low 'C' on the keyboard (transpose switch midposition).
5. Adjust the VCO CAL trimmer for a50 msec, period, or 20 Hz.

Board B-l &B-II Trim Procedures (Continued)
REF. TRIMMER TRIM PROCEDURE
T1, T4
T7
(R104,
R44,
R56)
VCO V/OCT 1. Set the following sliders on the front panel at maximum: VCO 1(square
wave) to AUDIO MIXER, VCF FREQUENCY, VCA GAIN.
2. Put all other sliders on the front panel down.
3. Put the TRANSPOSE and PITCH BEND controls in the NORMAL position.
4.
5.
6.
7.
8.
15.
16.
Put the VCO 1range slide switch in the KYBD ON position.
Put the VCO 2SYNC switch in the OFF position.
Monitor the HIGH OUTPUT of the Odyssey with afrequency counter or
strobe tuner.
Pin low 'C' on the keyboard.
Adjust VCO 1COARSE FREQUENCY slider for exactly 100 Hz (or 'C' on
the strobe tuner).
9. Pin high 'C' on the keyboard.
10. Using the VCO 1V/OCT trimmer on Board B, adjust the frequency of VCO 1
to exactly 800 Hz (or 'C' three octaves higher on astrobe tuner).
11. Repeat steps 7through 10 until the frequency of VCO 1is correct on low 'C'
and high 'C\
12. Pin low 'C' on the keyboard.
13. Raise the VCO 2(square wave) slider to the AUDIO MIXER.
0
14. Adjust the VCO 2COARSE and FINE TUNE sliders until VCO 2is exactly
in tune with VCO 1.
15. Pin high 'C' on the keyboard.
16. Using the VCO 2V/OCT trimmer on Board B, adjust the frequency of VCO 2
until it is exactly the same as VCO 1.
17. Repeat steps 12 through 16 until the frequency of VCO 2is the same as VCO
1on low 'C' and high 'C'.
19. Pin high 'C' on the keyboard.
20. Depress and release low 'C' (while high 'C' is pinned).
21. Adjust the VCO 2ND VOICE V/OCT trimmer on Board Buntil the pitch of
oscillator does not change in step 20.
THE FOLLOWING ADJUSTMENT IS FOR THE MODEL 2800 ONL Y.
22. Pin low 'C' on the keyboard.
23. Raise the VCO 1(square wave) slider in the AUDIO MIXER.
24. Adjust VCO 1&2FINE TUNE sliders so that VCO 1&2are in unison.
25. Set the TRANSPOSE switch to the UP 2OCTAVES position.
26. If the two oscillators are not exactly in tune with each other, adjust the 2nd
VOICE TRIMMER on BOARD Auntil the two oscillators are zero beating.
—NOtSC —
GENERATOR
WHITE
PORTAMENTO TRANSPOSE
2OCTAVES
2OCTAVES
DOWN
1*0
run AOSA AOSA
L*0
S/H
MIXER
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VCO INO«34
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*ENVELOPE 1
GENERATOR
ATTACK RELEASE
>*• : Ma \fN’U :• .ii
4Vi#t•* !l **
1
VCO 1VCO-2
BBB
XVM> KVOO
GATE REPEAT
VCO lVCO
2
BB
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IPO IAUTO
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RTPO
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run
TUNING SET-UP
15

3.4 Board C- 1Trim Procedures
REF. TRIMMER TRIM PROCEDURE
T4 VCF BAL 1. Put the VCF RESONANCE slider at MAXIMUM.
2. Monitor pin 10 of the 4023 module with an oscilloscope.
3. Put all other sliders on the front panel DOWN.
4. Adjust the VCF FREQUENCY slider for asine wave of about 1000 Hz.
5. Measure the peak to peak amplitude of the sine wave on pin 10.
6. Measure the peak to peak amplitude of the sine wave on pin 9of the 4023
(should be about half the amplitude of pin 10).
7. Adjust the BAL trimmer on Board Cuntil the sine wave on pin 9is exactly
half the amplitude of the sine wave on pin 20.
T3 VCF 1. Put the VCF RESONANCE slider at MAXIMUM.
CUTOFF 2. Put all other sliders on the front panel DOWN.
3. Monitor pin 10 of the 4023 module with an oscilloscope or frequency
counter.
4. Adjust the VCF CUTOFF trimmer for a62.5 msec, period, or, 16 Hz.
T5 VCF 1. Put the following sliders at MAXIMUM: VCF RESONANCE, VCA GAIN,
V/OCT and VCF KYBD CV.
2. Put all other sliders on the front panel DOWN.
3. Pin low 'C' on the keyboard.
4. Monitor the HIGH OUTPUT of the Odyssey with afrequency counter.
5. Adjust the VCF FREQUENCY slider for 100 Hz.
6. Pin high 'C' on the keyboard.
7. Adjust the VCF V/OCT trimmer on Board Cfor 800 Hz.
8. Repeat steps 3through 7until the frequency of the VCF is correct on low
'C' and high 'C\
T1VCA GAIN 1. Put the following sliders at MAXIMUM: VCO 2'SQUARE WAVE' to the
AUDIO MIXER, VCF FREQUENCY ,and VCA GAIN.
2. Put all other sliders on the front panel DOWN.
3. Measure the peak to peak amplitude of the waveform on pin 10 of the 4023
module with an oscilloscope.
4. Monitor the HIGH OUTPUT of the Odyssey with an oscilloscope.
5. Adjust the VCA GAIN trimmer on Board Cso that the amplitude of the
waveform on the output of the Odyssey is that same as the amplitude
measured in step 3.
T2 VCA CVR 1. Put the following sliders at MAXIMUM: VCA 'ADSR', and LFO FRE-
QUENCY.
2. Put the ADSR 'DECAY' slider at ONE-FOURTH.
3. Put all other sliders on the front panel DOWN.
4. Put the three slide switches under the ADSR sliders DOWN.
5. Monitor the HIGH OUTPUT of the Odyssey with an oscilloscope (set to
about .5 volts per division).
6. Adjust the VCA CVR trimmer on Board Cfor the minimum amplitude
signal on the output of the Odyssey.

3.5 Power Supply-1 1Trim Procedures
.. —.-.1 —I
REF. TRIMMER TRIM PROCEDURE
R5 +15 VOLT SET 1. Monitor the power supply's +1 5volt output with adigital voltmeter.
2.
Adjust R5 for exactly +1 5.00 volts.
R1 1 -15 VOLT SET 1. Set R5 (+15 volts) first.
2. Put the digital voltmeter's ground lead on the power supply's -15 volt
output and put the meter's plus lead on the power supply's ground output.
3. Adjust R1 1 for exactly +15.00 volts (reversed polarity).
THE FOLLOWING PROCEDURE RECALIBRA TES THE +15 VOL TSUPPL YSO THA TTHE CV
OUTPUTJACK WILL PROVIDE EXACTL Y1V/OCT. THIS TRIM PROCEDURE MUSTBE PER-
FORMED WHEN THE ODYSSEY IS TO BE USED ASA 'MASTER' SYNTHESIZER.
R5 +3V CV SET 1. Connect adigital voltmeter to the CV OUTPUT jack on the rear of the
Odyssey.
2. Pin low 'C' on the
keyboard (transpose and pitch bend normal).
3. Measure the exact voltage on the CV output (millivolt range).
4. Pin high 'C' on the keyboard.
5. Re-adjust the +15 volt trimmer (R5) for EXACTLY +3.00 volts higher than
the voltage measured in step 3.
6. Perform the A-ll trim procedure and the B-ll (or B-l) trim procedure.
3.6 Board A-ll Trim Procedures
R23 TRANSPOSE 1. Perform the PWR SUP-1 1trim procedure.
2. Perform the V/OCT section of the Board B-l (or B-ll) trim procedure.
3. Put the following sliders at MAXIMUM: VCO 1(square wave) to the AUDIO
MIXER, VCF FREQUENCY, and VCA GAIN.
4. Put all other sliders on the front panel DOWN.
5. Put the TRANSPOSE switch in the NORMAL position.
6. Pin low 'C' on the keyboard.
7. Connect afrequency counter or strobe tuner to the HIGH OUTPUT of the
Odyssey.
8. Adjust the VCO 1COARSE FREQUENCY and FINE TUNE sliders to 100
Hz or ('C' on astrobe tuner).
9. Put the TRANSPOSE switch in the UP 2OCT position.
10. Adjust the TRANSPOSE trimmer (R23) for exactly 400 Hz (or 'C' two
octaves higher than step 8).
NOTE: Disregard the following adjustment for circuits containing PPC.
R26 PITCH BEND 1. Perform the PWR SUP-1 1trim procedure.
2. Perform the V/OCT section of the Board B-l (or B-ll) trim procedure.
3. Put the following sliders at MAXIMUM: VCO 1(square wave) to the AUDIO
MIXER, VCF FREQUENCY, and VCA GAIN.
4. Put all other sliders on the front panel DOWN.
5. Put the PITCH BEND control in the CENTER.
6. Pin low 'C' on the keyboard.
7. Connect afrequency counter or strobe tuner to the HIGH OUTPUT of the
Odyssey.
8. Adjust the VCO 1COARSE FREQUENCY and FINE TUNE sliders to 100
Hz (or 'C' on astrobe tuner).
9. Put the PITCH BEND control fully CLOCKWISE.
10. Adjust the PITCH BEND trimmer (R26) for exactly 200 Hz (or 'C' one
octave higher than step 8).
17

3.7 Board B-l ITrim Procedures (See Section 3.3 on page 14)
3.8 Board C-ll Trim Procedures
REF. TRIMMER TRIM PROCEDURE
R67 VCF BAL 1. Put the following sliders at MAXIMUM: VCA GAIN, and LFO FRE-
QUENCY.
2. Put the ADSR 'DECAY' slider at ONE-FOURTH.
3. Put all other sliders on the front panel DOWN.
4. Put the three slide switches under the ADSR sliders DOWN.
5. Monitor the HIGH OUTPUT of the Odyssey with an oscilloscope (set to
about .5 volts per division).
6. Adjust the VCF BAL trimmer on Board Cfor the minimum amplitude signal
on the output of the Odyssey.
R71 VCF 1. Put the VCF RESONANCE slider at MAXIMUM.
CUTOFF 2. Put all other sliders on the front panel DOWN.
3. Monitor pin 10 of Ml with an oscilloscope or frequency counter.
4. Adjust the VCF CUTOFF trimmer for a62.5 msec, period, or, 16 Hz.
R68 VCF 1. Put the following sliders at MAXIMUM: VCF RESONANCE, VCA GAIN,
V/OCT and VCF KYBD CV.
2. Put all other sliders on the front panel DOWN.
3. Pin low 'C' on the keyboard.
4. Monitor the HIGH OUTPUT of the Odyssey with afrequency counter.
5. Adjust the VCF FREQUENCY slider for 100 Hz.
6. Pin high 'C' on the keyboard.
7. Adjust the VCF V/OCT trimmer on Board Cfor 800 Hz.
8. Repeat steps 3through 7until the frequency of the VCF is correct on low
'C' and high 'C'.
R69 VCA GAIN 1. Put the following sliders at MAXIMUM :VCO 1'SQUARE WAVE' to the
AUDIO MIXER, VCF FREQUENCY, and VCA GAIN.
2. Put all other sliders on the front panel DOWN.
3. Monitor the HIGH OUTPUT of the Odyssey with an oscilloscope.
4. Adjust the VCA GAIN trimmer on Board Cso that the amplitude of the
waveform on the output of the Odyssey is 2VPP.
R70 VCACVR 1. Put the following sliders at MAXIMUM: VCA 'ADSR', and LFO FRE-
QUENCY.
2. Put the ADSR 'DECAY' slider at ONE-FOURTH.
3. Put all other sliders on the front panel DOWN.
4. Put the three slide switches under the ADSR DOWN.
5. Monitor the HIGH OUTPUT of the Odyssey with an oscilloscope (set to
about .5 volts per division).
6. Adjust the VCA CVR trimmer on Board Cfor the minimum amplitude signal
on the output of the Odyssey.
18

SECTION 4BOARD TEST POINTS
4.1 Board A- 1Test Points
TEST POINT FUNCTION SETUP SPECIFICATIONS
TP-1 2ND VOICE
CV OUTPUT
1. No keys depressed ov
2. High 'C' and low 'C' both depressed. +3V
TP-2 CURRENT
SOURCE
1. Transpose switch: Down 2octaves
(no keys depressed). +3V
2. Transpose switch: Normal position. +5V
3. Transpose switch: Up 2octaves. +7V
TP-3 CV BUFFER
1. Depress and hold low 'C' (transpose
switch in the normal position). +2V
2. Depress and hold high 'C'. +5V
TP-4 CV OUTPUT
1. Depress and release low 'C' (transpose
switch in the normal position).
+2V (Should not change more than 20
millivolts in one minute.)
2. Depress and release high 'C\ +5V(Should not change more than 20
millivolts in one minute.)
TP-5 GATE
OUTPUT
1. No keys depressed. OV
2. Depress any key. +12V
TP-6 GATE BUS
1. No keys depressed. -13V
2. Depress any key. +13V
TP-7 TRIGGER
BUS 1. Depress any key. 1+15
i.
TP-8 TRIGGER
OUTPUT 1. Depress any key.
+15
—i—i o
DELAYED 15 msec.
%
TP-9 WHITE NOISE
OUTPUT iiiHiil
TP- 10 PINK NOISE
OUTPUT