Artesyn MVME7100 User manual

MVME7100 Single Board Computer
Programmer’s Reference
P/N: 6806800E82B
June 2014

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Contents
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 3
About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
1.5 Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2 Memory Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1.1 Default Processor Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1.2 Suggested Processor Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1.3 PCI Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.1.4 VME Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3 Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1.1 System Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.1.2 System Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.1.3 Status Indicator Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.1.4 NOR Flash Control/Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.1.5 Interrupt Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.1.6 Interrupt Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.1.7 Presence Detect Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.1.8 NAND Flash Chip 1 Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.1.9 NAND Flash Chip 1 Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.1.10 NAND Flash Chip 1 Presence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.11 NAND Flash Chip 1 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.12 NAND Flash Chip 2 Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.1.13 NAND Flash Chip 2 Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.1.14 NAND Flash Chip 2 Presence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.1.15 NAND Flash Chip 2 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.1.16 Watch Dog Timer Load Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Contents

MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
Contents
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Contents
3.1.17 Watch Dog Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.1.18 Watch Dog Timer Resolution Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.1.19 Watch Dog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.1.20 PLD Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.1.21 PLD Date Code Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.1.22 Test Register 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.1.23 Test Register 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.1.24 External Timer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.1.24.1 Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.1.24.2 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.1.24.3 Compare Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.1.24.4 Counter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.1.25 Geographical Address Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4 Programming Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4.2 MC864xD Reset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4.3 MC864xD Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.4 Local Bus Controller Chip Select Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.5 I2C Device Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.6 User Configuration EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.7 VPD EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.8 RTM VPD EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.9 Ethernet PHY Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.10 Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.11 PCI/PCI-X Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.11.1 PCI IDSEL and Interrupt Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.11.2 PCI Arbitration Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.12 Other Software Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.12.1 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.12.2 USB Oscillator Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.13 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.13.1 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.13.2 Real Time Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.13.3 Local Bus Controller Clock Divisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Contents
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 5
A Programmable Configuration Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
A.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
A.2 List of Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
A.3 Vital Product Data (VPD) Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
A.4 How to Read and Modify VPD Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
A.5 What Happens if VPD Information is Corrupted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
A.6 How to Fix Corrupted VPD Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
A.7 What if Your Board Has the Wrong VPD? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
A.8 How to Fix Wrong VPD Problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
A.9 Checksum Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
A.9.1 Vital Product Data CRC Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
A.9.2 Serial Presence Detect Checksum Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
A.10 VPD Contents for MVME7100 Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
A.11 SPD Contents for MVME7100 Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
B Related Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
B.1 Artesyn Embedded Technologies - Embedded Computing Documentation . . . . . . . . . . . . . . . . 95
B.2 Manufacturers’ Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
B.3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
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List of Tables
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 7
Table 1-1 Board Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 1-2 Features List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 2-1 Default Processor Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 2-2 Suggested Processor Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 2-3 PCI Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 3-1 System I/O Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 3-2 System Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 3-3 System Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 3-4 Status Indicator Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 3-5 NOR Flash Control/Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 3-6 Interrupt Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 3-7 Interrupt Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 3-8 Presence Detect Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 3-9 NAND Flash Chip 1 Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 3-10 NAND Flash Chip 1 Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 3-11 NAND Flash Chip 1 Presence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 3-12 NAND Flash Chip 1 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 3-13 NAND Flash Chip 2 Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 3-14 NAND Flash Chip 2 Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 3-15 NAND Flash Chip 2 Presence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 3-16 NAND Flash Chip 2 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 3-17 Watch dog timer Load Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 3-18 Watch Dog Timer Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 3-19 Watch Dog Timer count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 3-20 Watch Dog Timer Resolution Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 3-21 PLD Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 3-22 PLD Date Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 3-23 Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 3-24 Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 3-25 Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 3-26 Tick Timer Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 3-27 Tick Timer Compare Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 3-28 Tick Timer Counter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 4-1 MC864xD POR Configuration Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 4-2 MC864xD Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 4-3 LBC Chip Select Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

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List of Tables
Table 4-4 I2C Bus Device Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 4-5 PHY Types and MII Management Bus Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 4-6 NOR Flash Memory Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 4-7 NAND Flash Memory Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 4-8 IDSEL and Interrupt Mapping for PCI Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 4-9 Planar PCI Device Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 4-10 PCI Arbitration Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 4-11 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 4-12 Clock Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 4-13 Clock Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table A-1 Programmable Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table A-2 Onboard Serial EEPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table A-3 Checksum Calculation Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table A-4 Static VPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table A-5 Variable VPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table A-6 Static SPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table A-7 Variable SPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications . . . . . . . . . . . . . . . 95
Table B-2 Manufacturer’s Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table B-3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

List of Figures
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 9
Figure 1-1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 3-1 Boot Flash Bank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
10
List of Figures

MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 11
About this Manual
Overview of Contents
This manual is divided into the following chapters and appendices:
Chapter 1, Introduction, provides a brief product description and a block diagram showing the
architecture of the MVME7100 Single Board Computer.
Chapter 2, Memory Maps, provides information on the board’s memory maps.
Chapter 3, Register Descriptions, contains status registers for the system resources.
Chapter 4, Programming Details, includes additional programming information for the
MVME7100 single-board computer.
Appendix A, Programmable Configuration Data, provides additional programming information
including IDSEL mapping, interrupt assignments for the MC864xD interrupt controller, Flash
memory, two-wire serial interface addressing, and other device and system considerations.
Appendix B, Related Documentation, provides a listing of related Artesyn manuals, vendor
documentation, and industry specifications.
Abbreviations
This document uses the following abbreviations:
Acronym Description
ASCII American Standard Code for Information Interchange
CRC Cyclic Redundancy Check
EEPROM Electrically Erasable Programmable Read Only Memory
FRU Field Replaceable Unit
Flash Flash Memory
GB Gigabyte
HEX Hexadecimal
Hz Hertz
IPMI Intelligent Platform Management Interface

MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
About this Manual
12
About this Manual
Conventions
The following table describes the conventions used throughout this manual.
MB Megabyte
Mfg Manufacturing
SPD Serial Presence Detect
VPD Vital Product Data
Acronym Description
Notation Description
0x00000000 Typical notation for hexadecimal numbers
(digits are 0 through F), for example used for
addresses and offsets
0b0000 Same for binary numbers (digits are 0 and 1)
bold Used to emphasize a word
Screen Used for on-screen output and code related
elements or commands in body text
Courier + Bold Used to characterize user input and to separate
it from system output
Reference Used for references and for table and figure
descriptions
File > Exit Notation for selecting a submenu
<text> Notation for variables and keys
[text] Notation for software buttons to click on the
screen and parameter description
... Repeated item for example node 1, node 2, ...,
node 12
.
.
.
Omission of information from
example/command that is not necessary at the
time being
.. Ranges, for example: 0..4 means one of the
integers 0,1,2,3, and 4 (used in registers)

About this Manual
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 13
Summary of Changes
This is the first edition of this manual..
| Logical OR
Indicates a hazardous situation which, if not
avoided, could result in death or serious injury
Indicates a hazardous situation which, if not
avoided, may result in minor or moderate
injury
Indicates a property damage message
No danger encountered. Pay attention to
important information
Notation Description
Part Number Publication Date Description
6806800E82A January 2009 First Release
6806800E82B June 2014 Re- branded to Artesyn template.

MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
About this Manual
14
About this Manual

Chapter 1
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 15
Introduction
1.1 Overview
This chapter briefly describes the board level hardware features of the MVME7100 Single Board
Computer. Refer to the MC864xD Reference Manual listed in Appendix B, Related
Documentation, for more detail and programming information.
At the time of publication of this manual, the MVME7100 Single Board Computer is available in
the configurations shown below.
1.2 Features
Refer to the following table for a summary of the features common to all board variations.
Table 1-1 Board Variants
Marketing # Processor
MVME7100-0161 MC8640D 1.067 GHz, 1 GB DDR, 4 GB NAND Flash, Scanbe handles
MVME7100-0163 MC8640D 1.067 GHz, 1 GB DDR, 4 GB NAND Flash, IEEE handles
MVME7100-0171 MC8641D 1.33 GHz, 2 GB DDR, 8 GB NAND Flash, Scanbe handles
MVME7100-0173 MC8641D 1.33 GHz2 GB DDR, 8 GB NAND Flash, IEEE handles
Table 1-2 Features List
Function Features
Processor / Host Controller /
Memory Controller
One MC864xD Integrated Processor
Two e600 cores with integrated L2
Core frequency of 1.067 or 1.33 GHz
One integrated four channel DMA controller
Two integrated PCIE interfaces
Four integrated 10/100/1000 Ethernet controllers
One integrated DUART
Two integrated I2C controllers
One integrated Programmable Interrupt Controller
One integrated Local Bus Controller
Two integrated DDR2 SDRAM controllers

Introduction
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
16
System Memory Two banks of DDR2 SDRAM with ECC
1GB, 2 GB, or 4 GB
I2C One 8 KB VPD serial EEPROM
Two 64 KB user configuration serial EEPROMs
One Real Time Clock (RTC) with removable battery
Dual temperature sensor
Two SPDs for memory
Connection to XMCspan and RTM
NOR Flash 128 MB soldered flash with two alternate 1 MB boot sectors selectable via
hardware switch
H/W switch or S/W bit write protection for entire logical bank
NAND Flash Up to two devices available:
4 GB - 1 device
8 GB - 1 device
16 GB - 2 devices
NVRAM One 512 KB MRAM extended temperature range (-40°C to
105°C/-40°F to 221°F)
Two 64 KB serial EEPROMs
PCI-E 8X Port to XMC Expansion
8X Port to 5 Port PCI Express switch
I/O One front panel mini DB-9 connector for front I/O: one serial channel
Two front panel RJ-45 connectors with integrated LEDs for front I/O: two
10/100/1000 Ethernet channels
One front panel USB Type A upright receptacle for front I/O: one USB 2.0
channel
PMC site 1 front I/O and rear P2 I/O
PMC site 2 front I/O
USB One four-channel USB 2.0 controller: one channel for front panel I/O
Ethernet Four 10/100/1000 MC864xD Ethernet channels: two front panel Ethernet
connectors and two channels for rear P2 I/O
Table 1-2 Features List (continued)
Function Features

Introduction
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 17
Serial Interface One 16550-compatible, 9.6 to 115.2 Kbaud, MC864xD, asynchronous
serial channel: one channel for front panel I/O
One quad UART (QUART) controller to provide four 16550-compatible,
9.6 to 115.2 Kbaud, asynchronous serial channels: four channels for rear
P2 I/O
Timers Four 32-bit MC864xD timers
Four 32-bit timers in a PLD
Watchdog Timer One watchdog timer in PLD
VME Interface VME64 (ANSI/VITA 1-1994) compliant (3 row backplane 96-pin VME
connector)
VME64 Extensions (ANSI/VITA 1.1-1997) compliant (5 row backplane
160-pin VME connector)
2eSST (ANSI/VITA 1.5-2003) compliant
Two five-row P1 and P2 backplane connectors
One Tsi148 VMEbus controller
Form Factor Standard 6U VME, one slot
Miscellaneous One front panel RESET/ABORT switch
Six front panel status indicators:
Two 10/100/1000 Ethernet link/speed and activity (4 total)
Board fail
User S/W controlled LED
Planar status indicators
One standard 16-pin JTAG/COP header
Boundary scan support
Switches for VME geographical addressing in a three-row backplane
Software Support VxWorks OS support
Linux OS support
Table 1-2 Features List (continued)
Function Features

Introduction
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18
1.3 Block Diagram
The following figure is a block diagram of the MVME7100 architecture.

Introduction
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B) 19
Figure 1-1 Block Diagram

Introduction
MVME7100 Single Board Computer Programmer’s Reference (6806800E82B)
20
1.4 Functional Description
The MVME7100 is a VMEbus board based on the MC8640D and MC8641D Integrated
Processors. The MVME7100 provides USB 2.0, and 2eSST VMEbus interfaces, dual 64-bit/100
MHz PMC sites, 128 MB of NOR flash and up to 32 GB of NAND flash, up to 4 GB of DDR2
SDRAM, quad 10/100/1000 Ethernet, and five serial ports. The MVME7100 supports front and
rear I/O with access to the rear I/O via the MVME7216E transition module.
The MVME7100 provides front panel access to one serial port with a mini DB-9 connector, two
10/100/1000 Ethernet ports with two RJ-45 connectors, and one USB port with one type A
connector. The front panel includes a fail indicator LED, user-defined indicator LED, and a
reset/abort switch.
The MVME7216E transition module provides rear panel access to four serial ports with one
RJ-45 connector per port and two 10/100/1000 Ethernet ports with two RJ-45 connectors. The
RTM also provides two planar connectors for one PIM with front I/O.
The block diagram for the MVME7100 SBC is shown in Figure 1-1.
1.5 Programming Model
The MVME7100 programming model is based on the MC864xD local memory map, which
refers to the 36-bit address space seen by the processor as it accesses memory and I/O space.
DMA engines also see the same local memory map. All memory accessed by the MC864xD
DDR2 SDRAM and local bus memory controllers exists in this memory map in addition to all
memory mapped configuration, control, and status registers. Memory maps and registers are
described in Chapter 2, Memory Maps and Chapter 3, Register Descriptions.