Atmel AT91SAM9RL-EK User manual

6325A–ATARM–08-Jan-08
AT91SAM9RL-EK Evaluation Board
....................................................................................................................
User Guide

AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08

AT91SAM9RL-EK Evaluation Board User Guide i
6325A–ATARM–08-Jan-08
Table of Contents
Section 1
Overview ....................................................................................................................1-1
1.1 Scope................................................................................................................................. 1-1
1.2 Deliverables ....................................................................................................................... 1-1
1.3 AT91SAM9RL-EK Evaluation Board.................................................................................. 1-1
Section 2
Setting Up the AT91SAM9RL-EK Board ....................................................................2-1
2.1 Electrostatic Warning......................................................................................................... 2-1
2.2 Requirements..................................................................................................................... 2-1
2.3 Layout ................................................................................................................................ 2-2
2.4 Powering Up the Board...................................................................................................... 2-4
2.5 Backup Power Supply........................................................................................................ 2-4
2.6 Getting Started................................................................................................................... 2-4
2.7 AT91SAM9RL-EK Block Diagram...................................................................................... 2-5
Section 3
Board Description.......................................................................................................3-1
3.1 AT91SAM9RL64 Microcontroller ....................................................................................... 3-1
3.2 AT91SAM9RL Block Diagram............................................................................................ 3-4
3.3 Microcontroller ................................................................................................................... 3-4
3.4 Memory.............................................................................................................................. 3-4
3.5 Clock Circuitry.................................................................................................................... 3-4
3.6 Reset Circuitry ................................................................................................................... 3-5
3.7 Shutdown Controller ..........................................................................................................3-5
3.8 Power Supply Circuitry.......................................................................................................3-5
3.9 Remote Communication .................................................................................................... 3-5
3.10 Audio Stereo Interface ....................................................................................................... 3-5
3.11 User Interface .................................................................................................................... 3-5
3.12 Debug Interface ................................................................................................................. 3-5
3.13 Expansion Slot................................................................................................................... 3-6
3.14 PIO Usage ......................................................................................................................... 3-7
Section 4
Jumpers......................................................................................................................4-1
4.1 Jumpers ............................................................................................................................. 4-1
4.2 JTAG/ICE........................................................................................................................... 4-1

Table of Contents (Continued)
ii AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
4.3 Microcontroller Clock ......................................................................................................... 4-2
4.4 Memory.............................................................................................................................. 4-2
4.5 Miscellaneous .................................................................................................................... 4-2
Section 5
Schematics.................................................................................................................5-1
5.1 Board Schematics.............................................................................................................. 5-1
Section 6
Revision History .........................................................................................................6-1
6.1 Revision History ................................................................................................................. 6-1

AT91SAM9RL-EK Evaluation Board User Guide 1-1
6325A–ATARM–08-Jan-08
Section 1
Overview
1.1 Scope
The AT91SAM9RL-EK evaluation kit enables the evaluation of and code development for applications
running on an AT91SAM9RL device. It significantly reduces design cycle time, increasing confidence in
a right-first-time system solution.
This guide focuses on the AT91SAM9RL-EK board as an evaluation platform.
The board supports the AT91SAM9RL in an LFBGA217 package.
1.2 Deliverables
The AT91SAM9RL-EK package contains the following items:
an AT91SAM9RL-EK board
universal input AC/DC power supply with US, UK and Europe plug adapter
one 3V battery backup (CR1225 or equivalent)
one A/B-type USB cable
one serial RS232 cable
one CD-ROM that allows the user to begin evaluating the AT91 ARM®Thumb®32-bit microcontroller
quickly.
1.3 AT91SAM9RL-EK Evaluation Board
The board is equipped with an AT91SAM9RL64 (217-ball LFBGA package) together with the
following:
64 Mbytes of SDRAM memory
256 Mbytes of NAND Flash memory
one Atmel serial DataFlash®
one Atmel TWI serial EEPROM (footprint only)
one USB High Speed device port interface
one DBGU serial communication port
one additional serial communication port with RTS/CTS handshake control
JTAG/ICE debug interface
one AC97 Audio Codec
one 3.5" 1/4 VGA TFT LCD Module with TouchScreen and backlight
one Power LED and two general-purpose LED

Overview
1-2 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
two user input push buttons
one Wakeup input push button
one reset push button
one MCI SD/MMC card slot
four expansion connectors (PIOA, PIOB, PIOC, PIOD)
one BGA-like EBI expansion footprint connector
one Lithium Coin Cell Battery Retainer for 12 mm cell size

AT91SAM9RL-EK Evaluation Board User Guide 2-1
6325A–ATARM–08-Jan-08
Section 2
Setting Up the AT91SAM9RL-EK Board
2.1 Electrostatic Warning
Upon delivery, the AT91SAM9RL-EK evaluation board is wrapped in a protective anti-static bag. The
board must not be exposed to electrostatic discharges. A grounding strap or similar protective device
should be worn when handling the board. Avoid touching the component pins or any other on-board
metallic element.
2.2 Requirements
In order to set up the AT91SAM9RL-EK evaluation board, the following items are needed:
The AT91SAM9RL-EK evaluation board itself
AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm

Setting Up the AT91SAM9RL-EK Board
2-2 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
2.3 Layout
Figure 2-1. AT91SAM9RL-EK Layout - Top View

Setting Up the AT91SAM9RL-EK Board
AT91SAM9RL-EK Evaluation Board User Guide 2-3
6325A–ATARM–08-Jan-08
Figure 2-2. AT91SAM9RL-EK Layout - Bottom View

Setting Up the AT91SAM9RL-EK Board
2-4 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
2.4 Powering Up the Board
The AT91SAM9RL-EK requires 5V DC (±5%). DC power is supplied to the board via the 2.1 mm by 5.5
mm socket J1. Coaxial plug center positive standard.
2.5 Backup Power Supply
The user has the possibility to plug a battery (3V Lithium Battery CR1225 or equivalent) in order to per-
manently power the backup part of the device.
Refer to Section 4.
2.6 Getting Started
The AT91SAM9RL-EK evaluation board is delivered with a CD-ROM containing all necessary informa-
tion and step-by-step procedures for working with the most common development toolchains. Please
refer to this CD-ROM, or to the AT91 web site, http://www.atmel.com/products/AT91/, for the most up-to-
date information on getting started with the AT91SAM9RL-EK.

Setting Up the AT91SAM9RL-EK Board
AT91SAM9RL-EK Evaluation Board User Guide 2-5
6325A–ATARM–08-Jan-08
2.7 AT91SAM9RL-EK Block Diagram
Figure 2-3. AT91SAM9RL-EK Block Diagram
7 7
6 6
5 5
4 4
3 3
2 2
1 1
D C B A
DTXD DRXD TXD0 RTS0 RXD0 CTS0
PA[0..31]
PA0 MC_DA0 PA1 MC_CDA PA2 MC_CK PA3 MC_DA1 PA5 MC_DA3 PA6 TXD0 PA7 RXD0 PA4 MC_DA2 PA9 RTS0 PA10 CTS0 PA11 PA8 PA13 PA14 PA15 PA12 PA17 AD0_XR PA18 AD1_XL PA19 AD2_YT PA16 PA21 DRXD PA22 DTXD PA23 TWD0 PA20 AD3_YB PA25 MISO PA26 MOSI PA27 SPCK PA24 TWCK0 PA29 PA30 PA31 PA28 NPCS0
PB1 PB2 A21_NANDALE PB3 A22_NANDCLE PB5 NANDWE PB6 NCS3_NANDCS PB7 PB4 NANDOE PB9 PB10 PB11 PB8 PB13 PB14 PB15 PB12 PB17 D17 PB18 D18 PB19 D19 PB16 D16 PB21 D21 PB22 D22 PB23 D23 PB20 D20 PB25 D25 PB26 D26 PB27 D27 PB24 D24 PB29 D29 PB30 D30 PB31 D31 PB28 D28
PB[0..31]
PB0 PC1 LCDPWR
PC2 PC3 LCDCC PC5 LCDHSYNC PC6 LCDDOTCK PC7 LCDDEN PC4 PC9 LCDD3 PC10 LCDD4 PC11 LCDD5 PC8 PC13 LCDD7 PC14 PC15 LCDD11 PC12 LCDD6 PC17 LCDD13 PC18 LCDD14 PC19 LCDD15 PC16 LCDD12 PC21 LCDD19 PC22 LCDD20 PC23 LCDD21 PC20 LCDD18 PC25 LCDD23 PC26 PC27 PC24 LCDD22 PC29 PC30 PC31 PC28
PC[0..31]
PC0 PD1 AC97FS
PD2 AC97CK PD3 AC97TX PD5 PD6 PD7 PD4 AC97RX PD9 PD10 PD11 PD8 PD13 PD14 PWM0 PD15 PWM1 PD12 PCK1 PD17 PD18 PD19 PD16 PWM2 PD21 PD20
PD[0..21]
PD0
SDCS_NCS1 SDCK SDCKE
NANDOE NANDWE A22_NANDCLE
CFIOR_NBS1_NWR1
NCS3_NANDCS A16 PD17 A21_NANDALE A17
CFIOR_NBS3_NWR3 RAS CAS SDA10 SDWE
A[0..17]
MC_DA0 MC_DA1 PA15 MC_DA3 MC_CDA MC_DA2 MC_CK
PWM0 AC97RX AC97CK AC97TX PCK1
NRST
AC97FS LCDCC LCDPWR LCDHSYNC LCDDEN LCDDOTCK PWM1 PWM2 PB0 PB1
A[0..14]
AD0_XR AD1_XL AD2_YT AD3_YB
NPCS0 NRST
D[0..15]
D[16..31] D[0..15]
D[0..31]
CFWE_NWE_NWR0 CFOE_NRD NCS0 NCS0 CFIOR_NBS1_NWR1 CFIOR_NBS3_NWR3 CFOE_NRD SDCS_NCS1 SDCK SDCKE RAS CAS SDA10 SDWE CFWE_NWE_NWR0
PA8
NANDWE NANDOE
PD[0..21] PC[0..31] PB[0..31] PA[0..31]
D[0..7]
LCDD20 LCDD21 LCDD22 LCDD23 LCDD18 LCDD11 LCDD12 LCDD13 LCDD14 LCDD15 LCDD19 LCDD3 LCDD4 LCDD5 LCDD6 LCDD7 MOSI
SPCK MISO TWCK0 TWD0
SDRAMNANFLASH
12VDC
DBGU COM0
RS232
EEPROM
SERIAL
PIO USAGE
MMC SD/SDIO
AUDIO
USER'S
INTERFACE
MIC OUTIN
LCD INTERFACE
TOUCH SCREEN
3.5" QVGA
DATAFLASH
CARD
READER
SPI
(USBCNX) (MCI_CD)
(RIGHT CLIC) (LEFT CLIC)
USB
DEVICE
I2C
(NAME)
SIGNAL NAMING CONVENTIONS
SOFTWARE ASSIGNED I/O SIGNALPxx
Pxx FREE I/O SIGNAL Pxx PERIPH PERIPHERAL ASSIGNED I/O SIGNAL ITALIC FONTS
COMMENT
(RDYBSY)
SERIAL
04 - EBI MEMORY
RAS CAS SDA10 SDWE SDCKE SDCK NANDOE NANDWE NANDCS RDYBSY ALE CLE BA0 BA1 D[0..31] SDCS_NCS1 D[0..7] A[0..14] CFIOR_NBS1_NWR1 CFIOW_NBS3_NWR3
02 - POWER SUPPLY
POWERLED
SHDN
USERLED1
LEFTCLIC
USERLED2
RIGHTCLIC
09 - EXPANSION CONNECTORS
PC[0..31] PB[0..31] PA[0..31] PD[0..21] CAS
SDWE
NANDOE SDCS_NCS1
NCS0NRST
CFWE_NWE_NWR0
CFOE_NRD
SDCKE
SDCK
CFIOR_NBS1_NWR1
NANDWE
SDA10
D[0..31]
RAS
CFIOW_NBS3_NWR3
A[0..17]
08 - LCD
PCI
VCTRL
DTMG
HSYNC
DCLK
Y_UP
X_RIGHT
Y_LOW
X_LEFT
R1 R2 R3 R4 R5
G0 G1 G2 G3 G4 G5
B1 B2 B3 B4 B5
03 - MICROCONTROLLER
PC[0..31] PA[0..31] DM PD[0..21]
NCS0
DP PB[0..31] SHDN
CAS
SDWE
SDCS_NCS1
A[0..17]
CFWE_NWE_NWR0
CFOE_NRD
SDCKE
D[0..15]
CFIOR_NBS1_NWR1
SDCK
SDA10
RAS
CFIOW_NBS3_NWR3
NRST
06 - AUDIO
EXT_CLK
SDATA_OUT
SYNC
RST#
BITCLK
SDATA_IN
05 - MCI & TWI
SDA SCL DA0 DA1 DA2 DA3 NRST SCK SI CK SO CDA MCI_CD CS
07 - COMMUNICATION
USBCNX
DRXD
DTXD
RXD
CTS RTS TXD
DM
DP

AT91SAM9RL-EK Evaluation Board User Guide 3-1
6325A–ATARM–08-Jan-08
Section 3
Board Description
3.1 AT91SAM9RL64 Microcontroller
Incorporates the ARM926EJ-S™ARM®Thumb®Processor
– DSP Instruction Extensions
– ARM Jazelle®Technology for Java®Acceleration
– 4 Kbyte Data Cache, 4 Kbyte Instruction Cache, Write Buffer
– 210 MIPS at 190 MHz
– Memory Management Unit
– EmbeddedICE™In-circuit Emulation, Debug Communication Channel Support
– Mid-level implementation Embedded Trace Macrocell™
Multi-layer AHB Bus Matrix for Large Bandwidth Transfers
– Six 32-bit-layer Matrix
– Boot Mode Select Option, Remap Command
One 32-KByte internal ROM, Single-cycle Access at Maximum Speed
One 64-KByte internal SRAM, Single-cycle Access at Maximum Speed
– 4 Blocks of 16 Kbytes Configurable in TCM or General-purpose SRAM on the AHB Bus Matrix
Single-cycle Accessible on AHB Bus at Bus Speed
Single-cycle Accessible on TCM Interface at Processor Speed
2-channel DMA
– Memory to Memory Transfer
– 16 Bytes FIFO
– LInked List
External Bus Interface (EBI)
– EBI Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash®
LCD Controller
– Supports Passive or Active Displays
– Up to 24 Bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode
– Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Virtual Screen Support
High Speed (480 Mbit/s) USB 2.0 Device Controller
– On-Chip High Speed Transceiver, UTMI+ Physical Interface
– Integrated FIFOs and Dedicated DMA
– 4 Kbyte Configurable Integrated DPRAM
Fully-featured System Controller, including
– Reset Controller, Shutdown Controller

Board Description
3-2 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer and Real-time Clock
Reset Controller (RSTC)
– Based on Two Power-on Reset Cells
– Reset Source Identification and Reset Output Control
Shutdown Controller (SHDC)
– Programmable Shutdown Pin Control and Wake-up Circuitry
Clock Generator (CKGR)
– Selectable 32768 Hz Low-power oscillator or Internal Low-power RC Oscillator on Battery
Backup Power Supply, Providing a Permanent Slow Clock
– 12 MHz On-chip Oscillator for Main System Clock and USB Clock
– One PLL up to 240 MHz
– One PLL 480 MHz Optimized for USB HS
Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
– Two Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– One External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
Debug Unit (DBGU)
– 2-wire UART and support for Debug Communication Channel
Periodic Interval Timer (PIT)
– 20-bit interval timer plus 12-bit interval counter
Watchdog Timer (WDT)
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
Real-time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
Real-time Clock (RTC)
– Time, Date and Alarm 32-bit Parallel Load
– Low Power Consumption
– Programmable Periodic Interrupt
One 6-channel 10-Bit Analog-to-Digital Converter
– Touch Screen Interface Compatible with Industry Standard 4-wire Sensitive Touch Panels
Four 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC and PIOD)
– 118 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os for 217-ball BGA package
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
24-channel Peripheral DMA Controller (PDC)
One Multimedia Card Interface (MCI)
– SDCard/SDIO 1.0 and MultiMedia Card 3.1 Compliant

Board Description
AT91SAM9RL-EK Evaluation Board User Guide 3-3
6325A–ATARM–08-Jan-08
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
Two Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
One AC97 Controller (AC97C)
– 6-channel Single AC97 Analog Front End Interface, Slot Assigner
Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation, Manchester
Encoding/Decoding
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
One Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– High-speed Synchronous Communications
One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
One Four-channel 16-bit PWM Controller (PWMC)
Two Two-wire Interfaces (TWI)
– Compatible with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address
– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers
in Master Mode Only (TWI0 only)
SAM-BA Boot Assistant
– Default Boot Program
– Interface with SAM-BA Graphic User Interface
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
– 1.08 to 1.32V for VDDCORE, VDDPLLB and VDDBU
– 3.0V to 3.6V for VDDPLLA, VDDANA, VDDUTMI and VDDIOP
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM
Available in a 144-ball BGA (AT91SAM9R64) and a 217-ball LFBGA (AT91SAM9RL64) Package

Board Description
3-4 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
3.2 AT91SAM9RL Block Diagram
Figure 3-1. AT91SAM9RL Block Diagram
3.3 Microcontroller
One AT91SAM9RL64 217-ball LFBGA fitted on board
3.4 Memory
32 Kbytes of Internal ROM
64 Kbyte of Internal SRAM
Atmel serial DataFlash
64 Mbytes of SDRAM memory (32-bit bus width)
256 Mbytes of NAND Flash memory (8-bit bus width)
TWI serial EEPROM (footprint only)
3.5 Clock Circuitry
12 MHz standard crystal for the embedded oscillator
AIC
D0-D15
A0/NBS0
A2-A15
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NWR3/NBS3/CFIO
W
SDCK, SDCKE
RAS, CAS
SDWE, SDA10
FIQ
IRQ
PLLRCA
DRXD
DTXD
APB
PLLA
A1/NBS2/NWR2
TST
PCK0-PCK1
System Controller
VDDBU
SHDN
WKUP
XIN
NRST NANDOE, NANDWE
PMC
UPLL
XOUT
PIT
WDT
RTT
OSC
32K
XIN32
XOUT32
SHDC
RSTC
DBGU
SLAVEMASTER
PDC
4
GPBREG
A23-A24 A18-A20
NCS5/CFCS1
A25/CFRNW
NCS4/CFCS0
D16-D31
NWAIT
CFCE1-CFCE2
EBI
Static
Memory
Controller
CompactFlash
NAND Flash
& ECC
NCS2
NCS3/NANDCS
MCI TWI0
USART0
USART1
USART2
USART3
SPI
PDC
PWM
TC0
TC1
TC2 AC97
PDC
SSC0
SSC1
PDC
Peripheral
DMA
Controller
Peripheral
Bridge
ROM
32K Bytes
2-channel
DMA
OSC
12M
DMA
USB
Device
HS
6-channel 10-bit ADC
PDC
SDRAM
Controller
DA0-DA3
CDA
CK
TWD0
TWCK0
CTS0-CTS3
RTS0-RTS3
SCK0-SCK3
RDX0-RDX3
TXD0-TXD3
NPCS0-NPCS3
SPCK
MOSI
MISO
PWM0-PWM3
TCLK0-TCLK2
TIOA0-TIOA2
TIOB0-TIOB2
AC97CK
AC97FS
AC97RX
AC97TX
TK0-TK1
TF0-TF1
TD0-TD1
RD0-RD1
RF0-RF1
RK0-RK1
TSADTRG
AD0XP
TSADVREF
VDDANA
GNDAN
VBG
DFSDP
DFSDM
PIOA PIOB
LCDC
SRAM
64K Bytes
HS UTMI
Transceiver
POR
PIOC
DHSDP
DHSDM
GNDUTMI VDDUTMI
ARM926EJ-S Processor
JTAG Selection and Boundary Scan
In-Circuit Emulator
TDI
TDO
TMS
TCK
JTAGSEL
I
RTCK
ICache
4 Kbytes
PDC
BMS
NTRST
RTC
RC
TCM
Interface
ITCM DTCM
PIOD
A21/NANDALE
A22/NANDCLE
POR
VDDCORE
AD1XM
Touch
Screen
Controller
GPAD4
GPAD5
DCD0
DSR0
DTR0
RI0
PDC
AD2YP
AD3YM
PDC
TWI1
TWD1
TWCK1
6-layer AHB Bus Matrix
D
DMA
DCache
4 Kbytes
LCDD0-LCDD23
LCDVSYNC
LCDHSYNC
LCDDOTCK
LDDEN
LCDCC
LCDPWR
LCDMOD

Board Description
AT91SAM9RL-EK Evaluation Board User Guide 3-5
6325A–ATARM–08-Jan-08
Software selectable, 32768Hz Low-power external standard crystal Oscillator or Internal Low Power
RC Oscillator
3.6 Reset Circuitry
Internal reset controller with bi-directional reset pin
External reset pushbutton
3.7 Shutdown Controller
Programmable shutdown and Wake-Up
Wake-up push button
3.8 Power Supply Circuitry
On-board 1.2V High Efficiency step-down charge pump regulator with shutdown control
On-board 3.3V linear regulator with shutdown control
3.9 Remote Communication
One serial interface (DBGU COM Port) via RS-232 DB9 male socket
One additional serial interface (COM Port 1) with RTS/CTS handshake control via RS-232 DB9 male
socket
One High Speed USB 2.0 port 480 Mbits per second (UDP)
3.10 Audio Stereo Interface
One AC97 audio CODEC with:
One 32 Ohm Stereo Headset output (J16) with master volume and mute controls
One line-in
One Mono/Stereo Microphone input.
3.11 User Interface
Two user input pushbuttons
Two user green LED
One yellow power LED (can be also software controlled)
3.12 Debug Interface
20-pin JTAG/ICE interface connector
DBGU COM port

Board Description
3-6 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
3.13 Expansion Slot
One DataFlash, SD/MMC card slot
All I/Os of the AT91SAM9RL are routed to peripheral extension connectors (J23, J24, J25, J26).
All EBI Signals of the AT91SAM9RL are routed to extension footprint connectors (J27). Refer to the
Atmel application note Connecting EBI Memory Daughter Boards to AT91SAM Evaluation Boards, lit.
no. 6309.
This allows the developer to check the integrity of the components and to extend the features of the
board by adding external hardware components or boards.

Board Description
AT91SAM9RL-EK Evaluation Board User Guide 3-7
6325A–ATARM–08-Jan-08
3.14 PIO Usage
Table 3-1. PIO Controller A
I/O Line Peripheral A Peripheral B Application Usage Powered by
PA0 MC_DA0 SD/MMC CARD READER MC_DA0 VDDIOP
PA1 MC_CDA SD/MMC CARD READER MC_CDA VDDIOP
PA2 MC_CK SD/MMC CARD READER MC_CK VDDIOP
PA3 MC_DA1 TCLK0 SD/MMC CARD READER MC_DA1 VDDIOP
PA4 MC_DA2 TIOA0 SD/MMC CARD READER MC_DA2 VDDIOP
PA5 MC_DA3 TIOB0 SD/MMC CARD READER MC_DA3 VDDIOP
PA6 TXD0 RS232 COM PORT TXD0 VDDIOP
PA7 RXD0 RS232 COM PORT RXD0 VDDIOP
PA8 SCK0 RF1 USB DEVICE PA8 as USB_CNX VDDIOP
PA9 RTS0 RK1 RS232 COM PORT RTS0 VDDIOP
PA10 CTS0 RK0 RS232 COM PORT CTS0 VDDIOP
PA1 1 TX D1 VDDIOP
PA12 RXD1 VDDIOP
PA13 TXD2 TD1 VDDIOP
PA14 RXD2 RD1 VDDIOP
PA15 TD0 SD/MMC CARD READER PA15 as MCI_CD VDDIOP
PA16 RD0 VDDIOP
PA17 AD0 TOUCH SCREEN PANEL AD0_XR VDDIOP
PA18 AD1 RTS1 TOUCH SCREEN PANEL AD1_XL VDDIOP
PA19 AD2 CTS1 TOUCH SCREEN PANEL AD2_YT VDDIOP
PA20 AD3 SCK3 TOUCH SCREEN PANEL AD3_YB VDDIOP
PA21 DRXD SERIAL DEBUG PORT DRXD VDDIOP
PA22 DTXD RF0 SERIAL DEBUG PORT DTXD VDDIOP
PA23 TWD0 I2C MEMORY TWD0 VDDIOP
PA24 TWCK0 I2C MEMORY TWCK0 VDDIOP
PA25 MISO DATAFLASH DEVICE MISO VDDIOP
PA26 MOSI DATAFLASH DEVICE MOSI VDDIOP
PA27 SPCK DATAFLASH DEVICE SPCK VDDIOP
PA28 NPCS0 DATAFLASH DEVICE NPCS0 VDDIOP
PA2 9 RTS2 TF1 VDDIOP
PA3 0 CTS2 TK1 VDDIOP
PA3 1 NWAIT IRQ VDDIOP

Board Description
3-8 AT91SAM9RL-EK Evaluation Board User Guide
6325A–ATARM–08-Jan-08
Table 3-2. PIO Controller B
I/O Line Peripheral A Peripheral B Application Usage Powered by
PB0 TXD3 USER’S PUSH BUTTON 1 PB0 as LEFT CLICK VDDIOP
PB1 RXD3 USER’S PUSH BUTTON 2 PB1 as RIGHT CLICK VDDIOP
PB2 A21/NANDALE NAND FLASH MEMORY NANDALE VDDIOM
PB3 A22/NANDCLE NAND FLASH MEMORY NANDCLE VDDIOM
PB4 NANDOE NAND FLASH MEMORY NANDOE VDDIOM
PB5 NANDWE NAND FLASH MEMORY NANDWE VDDIOM
PB6 NCS3/NANDCS NAND FLASH MEMORY NCS3/NANDCS VDDIOM
PB7 NCS4/CFCS0 NPCS1 VDDIOM
PB8 CFE1 PWM0 VDDIOM
PB9 CFE2 PWM1 VDDIOM
PB10 A25/CFRNW FIQ VDDIOM
PB11 A18 VDDIOM
PB12 A19 VDDIOM
PB13 A20 VDDIOM
PB14 A23 PCK0 VDDIOM
PB15 A24 ADTRG VDDIOM
PB16 D16 SDRAM MEMORY D16 VDDIOM
PB17 D17 SDRAM MEMORY D17 VDDIOM
PB18 D18 SDRAM MEMORY D18 VDDIOM
PB19 D19 SDRAM MEMORY D19 VDDIOM
PB20 D20 SDRAM MEMORY D20 VDDIOM
PB21 D21 SDRAM MEMORY D21 VDDIOM
PB22 D22 SDRAM MEMORY D22 VDDIOM
PB23 D23 SDRAM MEMORY D23 VDDIOM
PB24 D24 SDRAM MEMORY D24 VDDIOM
PB25 D25 SDRAM MEMORY D25 VDDIOM
PB26 D26 SDRAM MEMORY D26 VDDIOM
PB27 D27 SDRAM MEMORY D27 VDDIOM
PB28 D28 SDRAM MEMORY D28 VDDIOM
PB29 D29 SDRAM MEMORY D29 VDDIOM
PB30 D30 SDRAM MEMORY D30 VDDIOM
PB31 D31 SDRAM MEMORY D31 VDDIOM

Board Description
AT91SAM9RL-EK Evaluation Board User Guide 3-9
6325A–ATARM–08-Jan-08
Table 3-3. PIO Controller C
I/O Line Peripheral A Peripheral B Application Usage Powered by
PC0 TF0 VDDIOP
PC1 TK0 LCDPWR LCD PANEL LCDPWR VDDIOP
PC2 LCDMOD PWM0 VDDIOP
PC3 LCDCC PWM1 LCD PANEL LCDCC VDDIOP
PC4 LCDVSYNC VDDIOP
PC5 LCDHSYNC LCD PANEL LCDHSYNC VDDIOP
PC6 LCDDOTCK LCD PANEL LCDDOTCK VDDIOP
PC7 LCDDEN LCD PANEL LCDDEN VDDIOP
PC8 LCDD0 LCDD2 LCD PANEL LCDD2 VDDIOP
PC9 LCDD1 LCDD3 LCD PANEL LCDD3 VDDIOP
PC10 LCDD2 LCDD4 LCD PANEL LCDD4 VDDIOP
PC11 LCDD3 LCDD5 LCD PANEL LCDD5 VDDIOP
PC12 LCDD4 LCDD6 LCD PANEL LCDD6 VDDIOP
PC13 LCDD5 LCDD7 LCD PANEL LCDD7 VDDIOP
PC14 LCDD6 LCDD10 LCD PANEL LCDD10 VDDIOP
PC15 LCDD7 LCDD11 LCD PANEL LCDD11 VDDIOP
PC16 LCDD8 LCDD12 LCD PANEL LCDD12 VDDIOP
PC17 LCDD9 LCDD13 LCD PANEL LCDD13 VDDIOP
PC18 LCDD10 LCDD14 LCD PANEL LCDD14 VDDIOP
PC19 LCDD11 LCDD15 LCD PANEL LCDD15 VDDIOP
PC20 LCDD12 LCDD18 LCD PANEL LCDD18 VDDIOP
PC21 LCDD13 LCDD19 LCD PANEL LCDD19 VDDIOP
PC22 LCDD14 LCDD20 LCD PANEL LCDD20 VDDIOP
PC23 LCDD15 LCDD21 LCD PANEL LCDD21 VDDIOP
PC24 LCDD16 LCDD22 LCD PANEL LCDD22 VDDIOP
PC25 LCDD17 LCDD23 LCD PANEL LCDD23 VDDIOP
PC26 LCDD18 VDDIOP
PC27 LCDD19 VDDIOP
PC28 LCDD20 VDDIOP
PC29 LCDD21 TIOA1 VDDIOP
PC30 LCDD22 TIOB1 VDDIOP
PC31 LCDD23 TCLK1 VDDIOP